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From: Fabio Estevam <festevam@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/4] mmc: fsl_esdhc: Allow all supported prescaler values
Date: Mon, 29 May 2017 08:17:34 -0300	[thread overview]
Message-ID: <CAOMZO5BawJi7Hh6t9HY54fPkQBe_Pp4L3gC=FHgVvX4+mNpaeA@mail.gmail.com> (raw)
In-Reply-To: <1493805546-3567-1-git-send-email-benoit@wsystem.com>

On Wed, May 3, 2017 at 6:59 AM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
> On i.MX, SYSCTL.SDCLKFS may be set to 0 in order to make the SD clock
> frequency prescaler divide by 1 in SDR mode. In DDR mode, the prescaler
> can divide by up to 512. Allow both of these settings.
>
> The maximum SD clock frequency in High Speed mode is 50 MHz. On i.MX25,
> this change makes it possible to get 48 MHz from the USB PLL
> (240 MHz / 5 / 1) instead of only 40 MHz from the USB PLL
> (240 MHz / 3 / 2) or 33.25 MHz from the AHB clock (133 MHz / 2 / 2).
>
> Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

  parent reply	other threads:[~2017-05-29 11:17 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-03  9:59 [U-Boot] [PATCH 1/4] mmc: fsl_esdhc: Allow all supported prescaler values Benoît Thébaudeau
2017-05-03  9:59 ` [U-Boot] [PATCH 2/4] mx25: Fix imx_get_perclk() Benoît Thébaudeau
2017-05-29 11:18   ` Fabio Estevam
2017-05-31  8:50   ` Stefano Babic
2017-05-03  9:59 ` [U-Boot] [PATCH 3/4] mx25: Add function to set PER clocks Benoît Thébaudeau
2017-05-29 11:19   ` Fabio Estevam
2017-05-31  8:50   ` Stefano Babic
2017-05-03  9:59 ` [U-Boot] [PATCH 4/4] mx25pdk: Set the eSDHC PER clock to 48 MHz Benoît Thébaudeau
2017-05-29 11:20   ` Fabio Estevam
2017-05-31  8:50   ` Stefano Babic
2017-05-29 11:17 ` Fabio Estevam [this message]
2017-05-31  8:50 ` [U-Boot] [PATCH 1/4] mmc: fsl_esdhc: Allow all supported prescaler values Stefano Babic

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