* drm: imx: multi-display support questions
@ 2015-05-26 14:47 Gary Bisson
2015-05-27 9:38 ` Philipp Zabel
0 siblings, 1 reply; 16+ messages in thread
From: Gary Bisson @ 2015-05-26 14:47 UTC (permalink / raw)
To: dri-devel; +Cc: slongerbeam
Hi all,
After a few days of experimentation on multi-display support on i.MX6, I
have some questions regarding the status of the imx-drm driver.
Here is description of my testing setup:
- Nitrogen6x (a SabreLite would work the same)
- Mainline kernel 4.1-rc2 + a few patches for display support (some are
pending, other are scheduled for 4.2)
https://patchwork.kernel.org/project/linux-arm-kernel/list/?submitter=132811
https://patchwork.kernel.org/patch/6439221/
https://patchwork.kernel.org/patch/6439231/
https://patchwork.kernel.org/patch/6212451/
- Available displays:
- 1 LVDS 10" Hannstar HSD100PXN1 display
- 1 LCD 7" Okaya display
- 1 HDMI 1080p TV
- U-boot script used to boot the mainline kernel properly:
https://github.com/boundarydevices/u-boot-imx6/blob/staging/board/boundary/nitrogen6x/6x_bootscript-mainline.txt
- Basic Buildroot filesystem with libdrm and its test binaries
First of all, using the standard imx_v6_v7_defconfig, everything runs
fine with a single-display setup, no matter if it is using LVDS, RGB or
HDMI interface.
But in multi-display setup, the first observation is that
CONFIG_DRM_IMX_FB_HELPER seems to be problematic. When this option is
set, only one display can be used either using the /dev/fb0 or 'modetest
-s' from libdrm test binaries. As soon as the option is removed, every
display can be used properly with the following commands:
# modetest -M imx-drm -s 32:800x480
# modetest -M imx-drm -s 34:1920x1080
# modetest -M imx-drm -s 36:1024x768
Is this option only meant for single-display setup? Has it been tested
in multi-display?
It seems limited to fb0 creation, would it be possible to make the
driver create as many fbs as the number of monitors?
Also, when trying to display different patterns on each and every
display at once, I have been using the example provided by David
Herrmann:
https://github.com/dvdhrm/docs/blob/master/drm-howto/modeset.c
This shows a clocking issue when using both DRM_IMX_PARALLEL_DISPLAY and
DRM_IMX_LDB at the same time. Although the driver is smart enough to
connect ipu1_di0 to the RGB interface and ipu1_di1 to the LVDS
interface, the clock set by the LDB driver (65MHz) is overwritten when
the parallel interface is enabled as they both share pll5_video.
Has anyone successfully tried using both drivers, LVDS and parallel, at
the same time?
Then I've run into Steve's series that seems to address some clocking
issues.
http://lists.freedesktop.org/archives/dri-devel/2014-October/070996.html
Is there the equivalent series for the driver since it has moved from
staging?
Hope the above description is sufficient, if needed I can provide
modeprint/modetest/clk_summary outputs.
Regards,
Gary
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-05-26 14:47 drm: imx: multi-display support questions Gary Bisson
@ 2015-05-27 9:38 ` Philipp Zabel
2015-05-27 13:31 ` Gary Bisson
0 siblings, 1 reply; 16+ messages in thread
From: Philipp Zabel @ 2015-05-27 9:38 UTC (permalink / raw)
To: Gary Bisson; +Cc: dri-devel, slongerbeam
Hi Gary,
Am Dienstag, den 26.05.2015, 16:47 +0200 schrieb Gary Bisson:
> Hi all,
>
> After a few days of experimentation on multi-display support on i.MX6, I
> have some questions regarding the status of the imx-drm driver.
>
> Here is description of my testing setup:
> - Nitrogen6x (a SabreLite would work the same)
> - Mainline kernel 4.1-rc2 + a few patches for display support (some are
> pending, other are scheduled for 4.2)
> https://patchwork.kernel.org/project/linux-arm-kernel/list/?submitter=132811
> https://patchwork.kernel.org/patch/6439221/
> https://patchwork.kernel.org/patch/6439231/
> https://patchwork.kernel.org/patch/6212451/
> - Available displays:
> - 1 LVDS 10" Hannstar HSD100PXN1 display
> - 1 LCD 7" Okaya display
> - 1 HDMI 1080p TV
> - U-boot script used to boot the mainline kernel properly:
> https://github.com/boundarydevices/u-boot-imx6/blob/staging/board/boundary/nitrogen6x/6x_bootscript-mainline.txt
> - Basic Buildroot filesystem with libdrm and its test binaries
>
> First of all, using the standard imx_v6_v7_defconfig, everything runs
> fine with a single-display setup, no matter if it is using LVDS, RGB or
> HDMI interface.
>
> But in multi-display setup, the first observation is that
> CONFIG_DRM_IMX_FB_HELPER seems to be problematic. When this option is
> set, only one display can be used either using the /dev/fb0 or 'modetest
> -s' from libdrm test binaries. As soon as the option is removed, every
> display can be used properly with the following commands:
> # modetest -M imx-drm -s 32:800x480
> # modetest -M imx-drm -s 34:1920x1080
> # modetest -M imx-drm -s 36:1024x768
>
> Is this option only meant for single-display setup? Has it been tested
> in multi-display?
>
> It seems limited to fb0 creation, would it be possible to make the
> driver create as many fbs as the number of monitors?
According to the kerneldoc comment for drm_fb_helper_initial_config
(which is used by imx-drm via drm_fbdev_cma_init), it should set up a
single /dev/fb cloned over all connectors. This works here with LVDS and
HDMI.
> Also, when trying to display different patterns on each and every
> display at once, I have been using the example provided by David
> Herrmann:
> https://github.com/dvdhrm/docs/blob/master/drm-howto/modeset.c
> This shows a clocking issue when using both DRM_IMX_PARALLEL_DISPLAY and
> DRM_IMX_LDB at the same time. Although the driver is smart enough to
> connect ipu1_di0 to the RGB interface and ipu1_di1 to the LVDS
> interface, the clock set by the LDB driver (65MHz) is overwritten when
> the parallel interface is enabled as they both share pll5_video.
>
> Has anyone successfully tried using both drivers, LVDS and parallel, at
> the same time?
For parallel and LVDS we'd either need to force the parallel panel to be
clocked by the IPU internal clock, or move one or the other external
clock source off of pll5_video.
I have used a LVDS panel which could be driven from the mmdc_ch1_axi
clock, but there are some issues when switching the LDB_DI clock
parents:
http://marc.info/?l=linux-arm-kernel&m=142055950831840&w=2
> Then I've run into Steve's series that seems to address some clocking
> issues.
> http://lists.freedesktop.org/archives/dri-devel/2014-October/070996.html
>
> Is there the equivalent series for the driver since it has moved from
> staging?
A few of the patches have been reposted and some of them applied.
I'm not aware of a rebased version of the DI clock parent patch.
regards
Philipp
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-05-27 9:38 ` Philipp Zabel
@ 2015-05-27 13:31 ` Gary Bisson
2015-05-28 10:58 ` Philipp Zabel
` (2 more replies)
0 siblings, 3 replies; 16+ messages in thread
From: Gary Bisson @ 2015-05-27 13:31 UTC (permalink / raw)
To: Philipp Zabel; +Cc: dri-devel, slongerbeam
Philipp, All,
On Wed, May 27, 2015 at 11:38 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> Hi Gary,
>
> Am Dienstag, den 26.05.2015, 16:47 +0200 schrieb Gary Bisson:
>> Hi all,
>>
>> After a few days of experimentation on multi-display support on i.MX6, I
>> have some questions regarding the status of the imx-drm driver.
>>
>> Here is description of my testing setup:
>> - Nitrogen6x (a SabreLite would work the same)
>> - Mainline kernel 4.1-rc2 + a few patches for display support (some are
>> pending, other are scheduled for 4.2)
>> https://patchwork.kernel.org/project/linux-arm-kernel/list/?submitter=132811
>> https://patchwork.kernel.org/patch/6439221/
>> https://patchwork.kernel.org/patch/6439231/
>> https://patchwork.kernel.org/patch/6212451/
>> - Available displays:
>> - 1 LVDS 10" Hannstar HSD100PXN1 display
>> - 1 LCD 7" Okaya display
>> - 1 HDMI 1080p TV
>> - U-boot script used to boot the mainline kernel properly:
>> https://github.com/boundarydevices/u-boot-imx6/blob/staging/board/boundary/nitrogen6x/6x_bootscript-mainline.txt
>> - Basic Buildroot filesystem with libdrm and its test binaries
>>
>> First of all, using the standard imx_v6_v7_defconfig, everything runs
>> fine with a single-display setup, no matter if it is using LVDS, RGB or
>> HDMI interface.
>>
>> But in multi-display setup, the first observation is that
>> CONFIG_DRM_IMX_FB_HELPER seems to be problematic. When this option is
>> set, only one display can be used either using the /dev/fb0 or 'modetest
>> -s' from libdrm test binaries. As soon as the option is removed, every
>> display can be used properly with the following commands:
>> # modetest -M imx-drm -s 32:800x480
>> # modetest -M imx-drm -s 34:1920x1080
>> # modetest -M imx-drm -s 36:1024x768
>>
>> Is this option only meant for single-display setup? Has it been tested
>> in multi-display?
>>
>> It seems limited to fb0 creation, would it be possible to make the
>> driver create as many fbs as the number of monitors?
>
> According to the kerneldoc comment for drm_fb_helper_initial_config
> (which is used by imx-drm via drm_fbdev_cma_init), it should set up a
> single /dev/fb cloned over all connectors. This works here with LVDS and
> HDMI.
Does it require the two displays to have the exact same resolution?
I'm wondering what is wrong with my setup but with a 1024x768 LVDS and
a 1920x1080 HDMI display no image is shown on the HDMI (no signal).
The CRTC settings show that both have the same origin (0,0) so I
expected the LVDS to display a part of what the HDMI *should* display.
I get the following traces when trying to display something on HDMI:
# modetest -M imx-drm -s 34:1920x1080
setting mode 1920x1080-50Hz@XR24 on connectors 34, crtc 18
[ 350.915681] imx-ipuv3 2400000.ipu: DC stop timeout after 50 ms
Then trying to display something through the fbdev results in the LVDS
being updated but still no signal on HDMI.
# cat /dev/urandom > /dev/fb0
Once again, as soon as I remove the IMX_FB_HELPER configuration
everything runs fine.
>> Also, when trying to display different patterns on each and every
>> display at once, I have been using the example provided by David
>> Herrmann:
>> https://github.com/dvdhrm/docs/blob/master/drm-howto/modeset.c
>> This shows a clocking issue when using both DRM_IMX_PARALLEL_DISPLAY and
>> DRM_IMX_LDB at the same time. Although the driver is smart enough to
>> connect ipu1_di0 to the RGB interface and ipu1_di1 to the LVDS
>> interface, the clock set by the LDB driver (65MHz) is overwritten when
>> the parallel interface is enabled as they both share pll5_video.
>>
>> Has anyone successfully tried using both drivers, LVDS and parallel, at
>> the same time?
>
> For parallel and LVDS we'd either need to force the parallel panel to be
> clocked by the IPU internal clock, or move one or the other external
> clock source off of pll5_video.
Do you have a preference for one solution over the other?
> I have used a LVDS panel which could be driven from the mmdc_ch1_axi
> clock, but there are some issues when switching the LDB_DI clock
> parents:
> http://marc.info/?l=linux-arm-kernel&m=142055950831840&w=2
I will look into this approach.
>> Then I've run into Steve's series that seems to address some clocking
>> issues.
>> http://lists.freedesktop.org/archives/dri-devel/2014-October/070996.html
>>
>> Is there the equivalent series for the driver since it has moved from
>> staging?
>
> A few of the patches have been reposted and some of them applied.
> I'm not aware of a rebased version of the DI clock parent patch.
Ok, thanks, I'll check and see what I need to get all the displays to
work together.
Regards,
Gary
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-05-27 13:31 ` Gary Bisson
@ 2015-05-28 10:58 ` Philipp Zabel
2015-05-28 19:30 ` Eric Nelson
2015-05-28 19:39 ` Fabio Estevam
2015-06-23 17:49 ` Fabio Estevam
2 siblings, 1 reply; 16+ messages in thread
From: Philipp Zabel @ 2015-05-28 10:58 UTC (permalink / raw)
To: Gary Bisson; +Cc: dri-devel, slongerbeam
Hi Gary,
Am Mittwoch, den 27.05.2015, 15:31 +0200 schrieb Gary Bisson:
> > According to the kerneldoc comment for drm_fb_helper_initial_config
> > (which is used by imx-drm via drm_fbdev_cma_init), it should set up a
> > single /dev/fb cloned over all connectors. This works here with LVDS and
> > HDMI.
>
> Does it require the two displays to have the exact same resolution?
> I'm wondering what is wrong with my setup but with a 1024x768 LVDS and
> a 1920x1080 HDMI display no image is shown on the HDMI (no signal).
> The CRTC settings show that both have the same origin (0,0) so I
> expected the LVDS to display a part of what the HDMI *should* display.
No, but it does require the HDMI and LVDS display to use different clock
sources (unless LVDS serializer clock happens to be the same as the HDMI
pixel clock).
I wonder what we should do about this for devices that have both LVDS
and HDMI output and can only use PLL5 for both. Register a clock
notifier that vetoes changes?
[...]
> > For parallel and LVDS we'd either need to force the parallel panel to be
> > clocked by the IPU internal clock, or move one or the other external
> > clock source off of pll5_video.
>
> Do you have a preference for one solution over the other?
That depends on the board. Is there an LVDS display that can be driven
by a PLL other than PLL5? Since there is no sane way to change the
LDB_DI parent in a running system, that should be configured in the
device tree.
regards
Philipp
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-05-28 10:58 ` Philipp Zabel
@ 2015-05-28 19:30 ` Eric Nelson
2015-05-29 9:30 ` Philipp Zabel
0 siblings, 1 reply; 16+ messages in thread
From: Eric Nelson @ 2015-05-28 19:30 UTC (permalink / raw)
To: Philipp Zabel, Gary Bisson; +Cc: dri-devel, slongerbeam
Hi Philipp,
On 05/28/2015 03:58 AM, Philipp Zabel wrote:
> Hi Gary,
>
> Am Mittwoch, den 27.05.2015, 15:31 +0200 schrieb Gary Bisson:
>>> According to the kerneldoc comment for drm_fb_helper_initial_config
>>> (which is used by imx-drm via drm_fbdev_cma_init), it should set up a
>>> single /dev/fb cloned over all connectors. This works here with LVDS and
>>> HDMI.
>>
>> Does it require the two displays to have the exact same resolution?
>> I'm wondering what is wrong with my setup but with a 1024x768 LVDS and
>> a 1920x1080 HDMI display no image is shown on the HDMI (no signal).
>> The CRTC settings show that both have the same origin (0,0) so I
>> expected the LVDS to display a part of what the HDMI *should* display.
>
> No, but it does require the HDMI and LVDS display to use different clock
> sources (unless LVDS serializer clock happens to be the same as the HDMI
> pixel clock).
>
> I wonder what we should do about this for devices that have both LVDS
> and HDMI output and can only use PLL5 for both. Register a clock
> notifier that vetoes changes?
>
The LDB can be clocked from PLL2.
Here's a snippet of the clock tree from our 3.10.53 (Android) kernel
running both HDMI at 720P and the Hannstar hsd070pww1 panel:
pll2_pfd0_352m 1 1 500210526
ldb_di1_div_7 0 0 71458646
ldb_di1_div_sel 0 0 71458646
ldb_di1 0 0 71458646
ldb_di1_div_3_5 0 0 142917293
ldb_di0_div_7 1 1 71458646
ldb_di0_div_sel 1 1 71458646
ldb_di0 1 1 71458646
ipu1_di1_sel 1 1 71458646
ipu1_di1 1 1 71458646
ipu1_pclk1_sel 1 1 71458646
ipu1_pclk1_div 1 1
71458646
ipu1_pclk_1 1 1
71458646
I believe that the Freescale kernels always clock the LVDS display
bridge from PLL2 but perhaps not.
I'll test a dual-channel (1080P) display and trace the code
in this branch of our kernel tree:
https://github.com/boundarydevices/linux-imx6/tree/boundary-imx-kk4.4.3_2.0.0-ga/
> [...]
>>> For parallel and LVDS we'd either need to force the parallel panel to be
>>> clocked by the IPU internal clock, or move one or the other external
>>> clock source off of pll5_video.
>>
>> Do you have a preference for one solution over the other?
>
> That depends on the board. Is there an LVDS display that can be driven
> by a PLL other than PLL5? Since there is no sane way to change the
> LDB_DI parent in a running system, that should be configured in the
> device tree.
>
That would certainly be best (to allow the use of the more accurate
PLL5 in the normal case), but the PLL2 clock parent works well in
the most common cases.
Regards,
Eric
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-05-27 13:31 ` Gary Bisson
2015-05-28 10:58 ` Philipp Zabel
@ 2015-05-28 19:39 ` Fabio Estevam
2015-06-23 17:49 ` Fabio Estevam
2 siblings, 0 replies; 16+ messages in thread
From: Fabio Estevam @ 2015-05-28 19:39 UTC (permalink / raw)
To: Gary Bisson; +Cc: DRI mailing list, Steve Longerbeam
Hi Gary,
On Wed, May 27, 2015 at 10:31 AM, Gary Bisson
<gary.bisson@boundarydevices.com> wrote:
> Does it require the two displays to have the exact same resolution?
> I'm wondering what is wrong with my setup but with a 1024x768 LVDS and
> a 1920x1080 HDMI display no image is shown on the HDMI (no signal).
I have seen this error sometime ago.
Do you get HDMI image if you unplug/plug the HDMI cable?
This was also fixed by Steve Longerbeam series and we still need to
fix it in mainline.
Regards,
Fabio Estevam
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-05-28 19:30 ` Eric Nelson
@ 2015-05-29 9:30 ` Philipp Zabel
2015-05-30 16:27 ` Eric Nelson
0 siblings, 1 reply; 16+ messages in thread
From: Philipp Zabel @ 2015-05-29 9:30 UTC (permalink / raw)
To: Eric Nelson; +Cc: Gary Bisson, dri-devel, slongerbeam
Hi Eric,
Am Donnerstag, den 28.05.2015, 12:30 -0700 schrieb Eric Nelson:
> Hi Philipp,
>
> On 05/28/2015 03:58 AM, Philipp Zabel wrote:
> > Hi Gary,
> >
> > Am Mittwoch, den 27.05.2015, 15:31 +0200 schrieb Gary Bisson:
> >>> According to the kerneldoc comment for drm_fb_helper_initial_config
> >>> (which is used by imx-drm via drm_fbdev_cma_init), it should set up a
> >>> single /dev/fb cloned over all connectors. This works here with LVDS and
> >>> HDMI.
> >>
> >> Does it require the two displays to have the exact same resolution?
> >> I'm wondering what is wrong with my setup but with a 1024x768 LVDS and
> >> a 1920x1080 HDMI display no image is shown on the HDMI (no signal).
> >> The CRTC settings show that both have the same origin (0,0) so I
> >> expected the LVDS to display a part of what the HDMI *should* display.
> >
> > No, but it does require the HDMI and LVDS display to use different clock
> > sources (unless LVDS serializer clock happens to be the same as the HDMI
> > pixel clock).
> >
> > I wonder what we should do about this for devices that have both LVDS
> > and HDMI output and can only use PLL5 for both. Register a clock
> > notifier that vetoes changes?
> >
>
> The LDB can be clocked from PLL2.
>
> Here's a snippet of the clock tree from our 3.10.53 (Android) kernel
> running both HDMI at 720P and the Hannstar hsd070pww1 panel:
>
> pll2_pfd0_352m 1 1 500210526
What is the parent of gpu2d_core_sel? This looks like it would severely
overclock the vivante 2d core.
regards
Philipp
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-05-29 9:30 ` Philipp Zabel
@ 2015-05-30 16:27 ` Eric Nelson
0 siblings, 0 replies; 16+ messages in thread
From: Eric Nelson @ 2015-05-30 16:27 UTC (permalink / raw)
To: Philipp Zabel; +Cc: Gary Bisson, dri-devel, slongerbeam
[-- Attachment #1: Type: text/plain, Size: 2009 bytes --]
Hi Philipp,
On 05/29/2015 02:30 AM, Philipp Zabel wrote:
> Hi Eric,
>
> Am Donnerstag, den 28.05.2015, 12:30 -0700 schrieb Eric Nelson:
>> Hi Philipp,
>>
>> On 05/28/2015 03:58 AM, Philipp Zabel wrote:
>>> Hi Gary,
>>>
>>> Am Mittwoch, den 27.05.2015, 15:31 +0200 schrieb Gary Bisson:
>>>>> According to the kerneldoc comment for drm_fb_helper_initial_config
>>>>> (which is used by imx-drm via drm_fbdev_cma_init), it should set up a
>>>>> single /dev/fb cloned over all connectors. This works here with LVDS and
>>>>> HDMI.
>>>>
>>>> Does it require the two displays to have the exact same resolution?
>>>> I'm wondering what is wrong with my setup but with a 1024x768 LVDS and
>>>> a 1920x1080 HDMI display no image is shown on the HDMI (no signal).
>>>> The CRTC settings show that both have the same origin (0,0) so I
>>>> expected the LVDS to display a part of what the HDMI *should* display.
>>>
>>> No, but it does require the HDMI and LVDS display to use different clock
>>> sources (unless LVDS serializer clock happens to be the same as the HDMI
>>> pixel clock).
>>>
>>> I wonder what we should do about this for devices that have both LVDS
>>> and HDMI output and can only use PLL5 for both. Register a clock
>>> notifier that vetoes changes?
>>>
>>
>> The LDB can be clocked from PLL2.
>>
>> Here's a snippet of the clock tree from our 3.10.53 (Android) kernel
>> running both HDMI at 720P and the Hannstar hsd070pww1 panel:
>>
>> pll2_pfd0_352m 1 1 500210526
>
> What is the parent of gpu2d_core_sel? This looks like it would severely
> overclock the vivante 2d core.
>
PLL3.
Here's a full clock tree for a Nitrogen6x configured for 1280x800
LVDS and 720P HDMI.
The GPU 2d core is running at 480MHz and the 3d core at 528MHz, so
they're both under the limits of 532 and 540.
Looking at the clock tree for 4.1, it appears that the gpu3d_core
is being over-clocked at 594 MHz.
Regards,
Eric
[-- Attachment #2: ldb-1280x800-plus-hdmi720p.txt --]
[-- Type: text/plain, Size: 16456 bytes --]
clock enable_cnt prepare_cnt rate
---------------------------------------------------------------------
anaclk2 0 0 0
lvds2_in 0 0 0
anaclk1 0 0 0
lvds1_in 0 0 0
dummy 2 3 0
usbphy2_gate 1 1 0
usbphy1_gate 1 1 0
clk24m 0 0 24000000
osc 7 7 24000000
cko2_sel 1 1 24000000
cko2_podf 1 1 24000000
cko2 1 1 24000000
cko 2 2 24000000
gpt_3m 1 1 3000000
pll4_sel 0 0 24000000
pll4_audio 0 0 1083801600
pll4_post_div 0 0 541900800
pll4_audio_div 0 0 541900800
esai_sel 0 0 541900800
esai_pred 0 0 270950400
esai_podf 0 0 33868800
esai_extal 0 0 33868800
ssi3_sel 0 0 541900800
ssi3_pred 0 0 135475200
ssi3_podf 0 0 67737600
ssi3 0 0 67737600
ssi2_sel 0 0 541900800
ssi2_pred 0 0 135475200
ssi2_podf 0 0 67737600
ssi2 0 0 67737600
ssi1_sel 0 0 541900800
ssi1_pred 0 0 135475200
ssi1_podf 0 0 67737600
ssi1 0 0 67737600
pll7_usb_host 1 1 480000000
usbphy2 1 1 480000000
pll6_enet 0 0 500000000
enet_ref 0 0 50000000
pcie_ref 0 0 125000000
pcie_ref_125m 0 0 125000000
sata_ref 0 0 100000000
lvds1_sel 0 0 100000000
lvds1_out 0 0 100000000
sata_ref_100m 0 0 100000000
pll5_video 1 1 1188000000
pll5_post_div 1 1 297000000
pll5_video_div 1 1 74250000
ipu2_di1_pre_sel 0 0 74250000
ipu2_di1_pre 0 0 24750000
ipu2_di1_sel 0 0 24750000
ipu2_di1 0 0 24750000
ipu2_di0_pre_sel 1 1 74250000
ipu2_di0_pre 1 1 74250000
ipu2_di0_sel 1 1 74250000
ipu2_di0 1 1 74250000
ipu2_pclk0_sel 1 1 74250000
ipu2_pclk0_div 1 1 74250000
ipu2_pclk_0 1 1 74250000
ipu1_di1_pre_sel 0 0 74250000
ipu1_di1_pre 0 0 24750000
ipu1_di0_pre_sel 0 0 74250000
ipu1_di0_pre 0 0 24750000
ipu1_di0_sel 0 0 24750000
ipu1_di0 0 0 24750000
pll3_usb_otg 3 4 480000000
gpu2d_core_sel 0 0 480000000
gpu2d_core_podf 0 0 480000000
gpu2d_core 0 0 480000000
spdif1_sel 0 0 480000000
spdif1_pred 0 0 240000000
spdif1_podf 0 0 30000000
periph2_clk2_sel 0 0 480000000
periph2_clk2 0 0 480000000
periph_clk2_sel 0 0 480000000
periph_clk2 0 0 480000000
pll3_60m 0 1 60000000
ecspi_root 0 1 60000000
ecspi5 0 0 60000000
ecspi4 0 0 60000000
ecspi3 0 0 60000000
ecspi2 0 0 60000000
ecspi1 0 2 60000000
can_root 0 0 30000000
can2_serial 0 0 30000000
can1_serial 0 0 30000000
pll3_80m 1 1 80000000
uart_serial_podf 1 1 80000000
uart_serial 1 2 80000000
pll3_120m 0 0 120000000
pll3_pfd3_454m 0 0 454736842
spdif_sel 0 0 454736842
spdif_pred 0 0 227368421
spdif_podf 0 0 227368421
spdif 0 0 227368421
pll3_pfd2_508m 0 0 508235294
pll3_pfd1_540m 1 1 540000000
hdmi_isfr 1 1 540000000
video_27m 0 0 27000000
pll3_pfd0_720m 0 0 720000000
usbphy1 1 1 480000000
pll2_bus 3 3 528000000
periph2_pre 0 0 528000000
periph2 0 0 528000000
mmdc_ch1_axi_podf 0 0 528000000
periph_pre 1 1 528000000
periph 3 3 528000000
ahb 7 8 132000000
sdma 8 2 132000000
rom 1 1 132000000
ocram 2 2 132000000
hdmi_iahb 1 1 132000000
esai_mem 0 0 132000000
caam_aclk 1 1 132000000
caam_mem 1 1 132000000
asrc_gate 0 1 132000000
asrc_mem 0 1 132000000
asrc_ipg 0 0 132000000
cko1_sel 0 0 132000000
cko1_podf 0 0 16500000
cko1 0 0 16500000
ipg 6 7 66000000
usboh3 2 2 66000000
uart_ipg 1 2 66000000
ssi3_ipg 0 0 66000000
ssi2_ipg 0 0 66000000
ssi1_ipg 0 0 66000000
spba 0 0 66000000
sata 1 1 66000000
iim 0 1 66000000
gpt_ipg 1 1 66000000
esai_ipg 0 0 66000000
epit2 0 0 66000000
epit1 0 0 66000000
enet 0 0 66000000
can2_ipg 0 0 66000000
can1_ipg 0 0 66000000
caam_ipg 1 1 66000000
ipg_per 3 3 66000000
pwm4 1 1 66000000
pwm3 1 1 66000000
pwm2 0 0 66000000
pwm1 1 1 66000000
i2c3 0 0 66000000
i2c2 0 0 66000000
i2c1 0 0 66000000
gpt_ipg_per 0 0 66000000
mmdc_ch0_axi_podf 3 3 528000000
gpu3d_core_sel 0 0 528000000
gpu3d_core_podf 0 0 528000000
gpu3d_core 0 0 528000000
tzasc2 0 0 528000000
ipu1_sel 1 1 528000000
ipu1_podf 1 1 264000000
ipu1 1 1 264000000
ipu1_pclk0_sel 0 0 264000000
ipu1_pclk0_div 0 0 0
ipu1_pclk_0 0 0 0
dcic1 0 0 264000000
ipu2_sel 1 1 528000000
ipu2_podf 1 1 264000000
ipu2 1 1 264000000
ipu2_pclk1_sel 0 0 264000000
ipu2_pclk1_div 0 0 0
ipu2_pclk_1 0 0 0
dcic2 0 0 264000000
axi_sel 1 1 528000000
axi 1 1 264000000
openvg_axi 0 0 264000000
mlb 0 0 264000000
gpu2d_axi 0 0 264000000
gpu3d_axi 0 0 264000000
pcie_axi_sel 0 0 264000000
pcie_axi 0 0 264000000
emi_slow_sel 1 1 264000000
emi_slow_podf 1 1 132000000
eim_slow 1 1 132000000
vdo_axi_sel 0 0 264000000
vdo_axi 0 0 264000000
vdoa 0 0 264000000
vpu_axi_sel 0 0 264000000
vpu_axi_podf 0 0 264000000
vpu_axi 0 0 264000000
pll2_pfd2_396m 2 2 396000000
enfc_sel 0 0 396000000
enfc_pred 0 0 79200000
enfc_podf 0 0 19800000
enfc 0 0 19800000
gpmi_io 0 0 19800000
emi_sel 0 0 396000000
emi_podf 0 0 198000000
usdhc4_sel 1 1 396000000
usdhc4_podf 1 1 198000000
usdhc4 3 3 198000000
gpmi_bch 0 0 198000000
usdhc3_sel 0 0 396000000
usdhc3_podf 0 0 198000000
usdhc3 0 0 198000000
apbh_dma 0 0 198000000
per1_bch 0 0 198000000
gpmi_bch_apb 0 0 198000000
gpmi_apb 0 0 198000000
usdhc2_sel 0 0 396000000
usdhc2_podf 0 0 198000000
usdhc2 0 0 198000000
usdhc1_sel 0 0 396000000
usdhc1_podf 0 0 198000000
usdhc1 0 0 198000000
hsi_tx_sel 1 1 396000000
hsi_tx_podf 1 1 198000000
hsi_tx 1 1 198000000
axi_alt_sel 0 0 396000000
step 0 0 396000000
pll2_198m 0 0 198000000
pll2_pfd1_594m 0 0 594000000
gpu3d_shader_sel 0 0 594000000
gpu3d_shader 0 0 594000000
pll2_pfd0_352m 1 1 500210526
ldb_di1_div_7 0 0 71458646
ldb_di1_div_sel 0 0 71458646
ldb_di1 0 0 71458646
ldb_di1_div_3_5 0 0 142917293
ldb_di0_div_7 1 1 71458646
ldb_di0_div_sel 1 1 71458646
ldb_di0 1 1 71458646
ipu1_di1_sel 1 1 71458646
ipu1_di1 1 1 71458646
ipu1_pclk1_sel 1 1 71458646
ipu1_pclk1_div 1 1 71458646
ipu1_pclk_1 1 1 71458646
ldb_di0_div_3_5 0 0 142917293
pll1_sys 1 1 996000000
pll1_sw 1 1 996000000
arm 2 2 996000000
lvds2_sel 0 0 996000000
lvds2_out 0 0 996000000
twd 1 1 498000000
ckih1 0 0 0
ckil 0 0 32768
[-- Attachment #3: Type: text/plain, Size: 159 bytes --]
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-05-27 13:31 ` Gary Bisson
2015-05-28 10:58 ` Philipp Zabel
2015-05-28 19:39 ` Fabio Estevam
@ 2015-06-23 17:49 ` Fabio Estevam
2015-06-23 17:50 ` Fabio Estevam
2 siblings, 1 reply; 16+ messages in thread
From: Fabio Estevam @ 2015-06-23 17:49 UTC (permalink / raw)
To: Gary Bisson; +Cc: DRI mailing list, Steve Longerbeam
Hi Gary,
On Wed, May 27, 2015 at 10:31 AM, Gary Bisson
<gary.bisson@boundarydevices.com> wrote:
> Ok, thanks, I'll check and see what I need to get all the displays to
> work together.
With this patch:
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/352189.html
I am able to get HDMI and LVDS working on a mx6q-sabresd.
Regards,
Fabio Estevam
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-06-23 17:49 ` Fabio Estevam
@ 2015-06-23 17:50 ` Fabio Estevam
2015-06-29 16:04 ` Gary Bisson
0 siblings, 1 reply; 16+ messages in thread
From: Fabio Estevam @ 2015-06-23 17:50 UTC (permalink / raw)
To: Gary Bisson; +Cc: DRI mailing list, Steve Longerbeam
On Tue, Jun 23, 2015 at 2:49 PM, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Gary,
>
> On Wed, May 27, 2015 at 10:31 AM, Gary Bisson
> <gary.bisson@boundarydevices.com> wrote:
>
>> Ok, thanks, I'll check and see what I need to get all the displays to
>> work together.
>
> With this patch:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/352189.html
>
> I am able to get HDMI and LVDS working on a mx6q-sabresd.
Sorry, the correct URL is:
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/352179.html
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-06-23 17:50 ` Fabio Estevam
@ 2015-06-29 16:04 ` Gary Bisson
2015-06-29 16:08 ` Fabio Estevam
0 siblings, 1 reply; 16+ messages in thread
From: Gary Bisson @ 2015-06-29 16:04 UTC (permalink / raw)
To: Fabio Estevam; +Cc: Eric Nelson, DRI mailing list, Steve Longerbeam
Hi Fabio,
On Tue, Jun 23, 2015 at 7:50 PM, Fabio Estevam <festevam@gmail.com> wrote:
> On Tue, Jun 23, 2015 at 2:49 PM, Fabio Estevam <festevam@gmail.com> wrote:
>> Hi Gary,
>>
>> On Wed, May 27, 2015 at 10:31 AM, Gary Bisson
>> <gary.bisson@boundarydevices.com> wrote:
>>
>>> Ok, thanks, I'll check and see what I need to get all the displays to
>>> work together.
>>
>> With this patch:
>> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/352189.html
>>
>> I am able to get HDMI and LVDS working on a mx6q-sabresd.
>
> Sorry, the correct URL is:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/352179.html
Thank you for your e-mail and sorry for the delay in my response. I
confirm this patch, ported over to my dtsi file, makes the HDMI and
LVDS work together.
I'll check with Eric but we will most likely use the same
configuration for our platforms.
Regards,
Gary
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-06-29 16:04 ` Gary Bisson
@ 2015-06-29 16:08 ` Fabio Estevam
2015-06-29 16:12 ` Gary Bisson
2015-06-29 16:22 ` Eric Nelson
0 siblings, 2 replies; 16+ messages in thread
From: Fabio Estevam @ 2015-06-29 16:08 UTC (permalink / raw)
To: Gary Bisson; +Cc: Eric Nelson, DRI mailing list, Steve Longerbeam
[-- Attachment #1: Type: text/plain, Size: 532 bytes --]
Hi Gary,
On Mon, Jun 29, 2015 at 1:04 PM, Gary Bisson
<gary.bisson@boundarydevices.com> wrote:
> Thank you for your e-mail and sorry for the delay in my response. I
> confirm this patch, ported over to my dtsi file, makes the HDMI and
> LVDS work together.
>
> I'll check with Eric but we will most likely use the same
> configuration for our platforms.
What do you mean by "use the same configuration for our platforms"?
I was planning to send the two attached patches.
Are you and Eric OK with them?
Regards,
Fabio Estevam
[-- Attachment #2: 0001-hdmiandldbsabrelite.patch --]
[-- Type: text/x-diff, Size: 1307 bytes --]
From 6a9a8e344eb672e7a847a4e81f0f289183ee0c39 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Mon, 29 Jun 2015 11:07:07 -0300
Subject: [PATCH 1/3] ARM: dts: imx6qdl-sabrelite: Allow HDMI and LVDS to work simultaneously
Currently it is not possible to have HDMI and LVDS working simultaneously,
because both ports try to use PLL5.
Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
driven from independent sources.
With this change the LDB pixel clock goes to 68.57 MHz, which is still
within the valid range for the HSD100PXN1 LVDS panel.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index e00c44f..d87e71c 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -148,6 +148,13 @@
status = "okay";
};
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
+ <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
+ <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
+};
+
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 19 0>;
--
1.9.1
[-- Attachment #3: 0002-hdmiandldbnitrogen.patch --]
[-- Type: text/x-diff, Size: 1313 bytes --]
From 40ef0598f717d542d7c5ff2cd7e71d3df0693e1a Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Mon, 29 Jun 2015 11:07:59 -0300
Subject: [PATCH 2/3] ARM: dts: imx6qdl-nitrogen6x: Allow HDMI and LVDS to work simultaneously
Currently it is not possible to have HDMI and LVDS working simultaneously,
because both ports try to use PLL5.
Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
driven from independent sources.
With this change the LDB pixel clock goes to 68.57 MHz, which is still
within the valid range for the HSD100PXN1 LVDS panel.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 3af16df..1cba390 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -149,6 +149,13 @@
status = "okay";
};
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
+ <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
+ <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
+};
+
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 19 0>;
--
1.9.1
[-- Attachment #4: Type: text/plain, Size: 159 bytes --]
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^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-06-29 16:08 ` Fabio Estevam
@ 2015-06-29 16:12 ` Gary Bisson
2015-06-29 16:14 ` Fabio Estevam
2015-06-29 16:22 ` Eric Nelson
1 sibling, 1 reply; 16+ messages in thread
From: Gary Bisson @ 2015-06-29 16:12 UTC (permalink / raw)
To: Fabio Estevam; +Cc: Eric Nelson, DRI mailing list, Steve Longerbeam
Hi Fabio,
On Mon, Jun 29, 2015 at 6:08 PM, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Gary,
>
> On Mon, Jun 29, 2015 at 1:04 PM, Gary Bisson
> <gary.bisson@boundarydevices.com> wrote:
>
>> Thank you for your e-mail and sorry for the delay in my response. I
>> confirm this patch, ported over to my dtsi file, makes the HDMI and
>> LVDS work together.
>>
>> I'll check with Eric but we will most likely use the same
>> configuration for our platforms.
>
> What do you mean by "use the same configuration for our platforms"?
I meant the clock tree configuration, having LDB under the PLL3.
> I was planning to send the two attached patches.
I am ok with it but I'd like Eric to ack it too as he might have some remarks.
Regards,
Gary
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-06-29 16:12 ` Gary Bisson
@ 2015-06-29 16:14 ` Fabio Estevam
0 siblings, 0 replies; 16+ messages in thread
From: Fabio Estevam @ 2015-06-29 16:14 UTC (permalink / raw)
To: Gary Bisson; +Cc: Eric Nelson, DRI mailing list, Steve Longerbeam
On Mon, Jun 29, 2015 at 1:12 PM, Gary Bisson
<gary.bisson@boundarydevices.com> wrote:
> I am ok with it but I'd like Eric to ack it too as he might have some remarks.
Ok, I will submit it to the linux-arm mailing list with you and Eric on Cc.
Regards,
Fabio Estevam
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-06-29 16:08 ` Fabio Estevam
2015-06-29 16:12 ` Gary Bisson
@ 2015-06-29 16:22 ` Eric Nelson
2015-06-29 17:57 ` Gary Bisson
1 sibling, 1 reply; 16+ messages in thread
From: Eric Nelson @ 2015-06-29 16:22 UTC (permalink / raw)
To: Fabio Estevam, Gary Bisson; +Cc: DRI mailing list, Steve Longerbeam
Thanks Fabio,
On 06/29/2015 09:08 AM, Fabio Estevam wrote:
> Hi Gary,
>
> On Mon, Jun 29, 2015 at 1:04 PM, Gary Bisson
> <gary.bisson@boundarydevices.com> wrote:
>
>> Thank you for your e-mail and sorry for the delay in my response. I
>> confirm this patch, ported over to my dtsi file, makes the HDMI and
>> LVDS work together.
>>
>> I'll check with Eric but we will most likely use the same
>> configuration for our platforms.
>
> What do you mean by "use the same configuration for our platforms"?
>
> I was planning to send the two attached patches.
>
> Are you and Eric OK with them?
>
These look good to me.
Gary, did you test one of these against either of our 1280x800 panels?
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: drm: imx: multi-display support questions
2015-06-29 16:22 ` Eric Nelson
@ 2015-06-29 17:57 ` Gary Bisson
0 siblings, 0 replies; 16+ messages in thread
From: Gary Bisson @ 2015-06-29 17:57 UTC (permalink / raw)
To: Eric Nelson; +Cc: DRI mailing list, Steve Longerbeam
Fabio, Eric,
On Mon, Jun 29, 2015 at 6:22 PM, Eric Nelson
<eric.nelson@boundarydevices.com> wrote:
> Thanks Fabio,
>
> On 06/29/2015 09:08 AM, Fabio Estevam wrote:
>> Hi Gary,
>>
>> On Mon, Jun 29, 2015 at 1:04 PM, Gary Bisson
>> <gary.bisson@boundarydevices.com> wrote:
>>
>>> Thank you for your e-mail and sorry for the delay in my response. I
>>> confirm this patch, ported over to my dtsi file, makes the HDMI and
>>> LVDS work together.
>>>
>>> I'll check with Eric but we will most likely use the same
>>> configuration for our platforms.
>>
>> What do you mean by "use the same configuration for our platforms"?
>>
>> I was planning to send the two attached patches.
>>
>> Are you and Eric OK with them?
>>
>
> These look good to me.
>
> Gary, did you test one of these against either of our 1280x800 panels?
Yes I've tested with both Hannstar 10" 1024x768 and 7" 1280x800. I
will answer to the patches sent for Sabrelite and Nitrogen6x.
Regards,
Gary
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^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2015-06-29 17:57 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-05-26 14:47 drm: imx: multi-display support questions Gary Bisson
2015-05-27 9:38 ` Philipp Zabel
2015-05-27 13:31 ` Gary Bisson
2015-05-28 10:58 ` Philipp Zabel
2015-05-28 19:30 ` Eric Nelson
2015-05-29 9:30 ` Philipp Zabel
2015-05-30 16:27 ` Eric Nelson
2015-05-28 19:39 ` Fabio Estevam
2015-06-23 17:49 ` Fabio Estevam
2015-06-23 17:50 ` Fabio Estevam
2015-06-29 16:04 ` Gary Bisson
2015-06-29 16:08 ` Fabio Estevam
2015-06-29 16:12 ` Gary Bisson
2015-06-29 16:14 ` Fabio Estevam
2015-06-29 16:22 ` Eric Nelson
2015-06-29 17:57 ` Gary Bisson
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