From: Oliver Upton <oupton@google.com> To: Marc Zyngier <maz@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mark Rutland <mark.rutland@arm.com>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Peter Shier <pshier@google.com>, Raghavendra Rao Ananta <rananta@google.com>, Ricardo Koller <ricarkol@google.com>, Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Linus Walleij <linus.walleij@linaro.org>, kernel-team@android.com Subject: Re: [PATCH 12/13] arm64: Add a capability for FEAT_EVC Date: Mon, 9 Aug 2021 09:34:26 -0700 [thread overview] Message-ID: <CAOQ_QshvUVB-Ey3P0MJbj9OxU46kis6=Lo4soz_g_WebgRuvyg@mail.gmail.com> (raw) In-Reply-To: <CAOQ_QsjT8DUoXQsxWGgGiZkwNe2itRswGomtq6-p+7_oU01orQ@mail.gmail.com> On Mon, Aug 9, 2021 at 9:30 AM Oliver Upton <oupton@google.com> wrote: > > Hi Marc, > > On Mon, Aug 9, 2021 at 8:48 AM Marc Zyngier <maz@kernel.org> wrote: > > > > Add a new capability to detect the Enhanced Counter Virtualization > > feature (FEAT_EVC). > > > > s/FEAT_EVC/FEAT_ECV/g > > > Signed-off-by: Marc Zyngier <maz@kernel.org> > > --- > > arch/arm64/kernel/cpufeature.c | 10 ++++++++++ > > arch/arm64/tools/cpucaps | 1 + > > 2 files changed, 11 insertions(+) > > > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index 0ead8bfedf20..9c2ce5408811 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -1899,6 +1899,16 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > > .sign = FTR_UNSIGNED, > > .min_field_value = 1, > > }, > > + { > > + .desc = "Enhanced counter virtualization", > > + .capability = ARM64_HAS_ECV, > > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > > + .matches = has_cpuid_feature, > > + .sys_reg = SYS_ID_AA64MMFR0_EL1, > > + .field_pos = ID_AA64MMFR0_ECV_SHIFT, > > + .sign = FTR_UNSIGNED, > > + .min_field_value = 1, > > + }, > > Per one of your other patches in the series, it sounds like userspace > access to the self-synchronized registers hasn't been settled yet. > However, if/when available to userspace, should this cpufeature map to > an ELF HWCAP? > > Also, w.r.t. my series I have out for ECV in KVM. All the controls > used in EL2 depend on ECV=0x2. I agree that ECV=0x1 needs a cpufeature > bit, but what about EL2's use case? Forgot to link the series: http://lore.kernel.org/r/20210804085819.846610-1-oupton@google.com > > Besides the typo: > > Reviewed-by: Oliver Upton <oupton@google.com> > > -- > Thanks, > Oliver > > > #ifdef CONFIG_ARM64_PAN > > { > > .desc = "Privileged Access Never", > > diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps > > index 49305c2e6dfd..7a7c58acd8f0 100644 > > --- a/arch/arm64/tools/cpucaps > > +++ b/arch/arm64/tools/cpucaps > > @@ -18,6 +18,7 @@ HAS_CRC32 > > HAS_DCPODP > > HAS_DCPOP > > HAS_E0PD > > +HAS_ECV > > HAS_EPAN > > HAS_GENERIC_AUTH > > HAS_GENERIC_AUTH_ARCH > > -- > > 2.30.2 > >
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From: Oliver Upton <oupton@google.com> To: Marc Zyngier <maz@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mark Rutland <mark.rutland@arm.com>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Peter Shier <pshier@google.com>, Raghavendra Rao Ananta <rananta@google.com>, Ricardo Koller <ricarkol@google.com>, Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Linus Walleij <linus.walleij@linaro.org>, kernel-team@android.com Subject: Re: [PATCH 12/13] arm64: Add a capability for FEAT_EVC Date: Mon, 9 Aug 2021 09:34:26 -0700 [thread overview] Message-ID: <CAOQ_QshvUVB-Ey3P0MJbj9OxU46kis6=Lo4soz_g_WebgRuvyg@mail.gmail.com> (raw) In-Reply-To: <CAOQ_QsjT8DUoXQsxWGgGiZkwNe2itRswGomtq6-p+7_oU01orQ@mail.gmail.com> On Mon, Aug 9, 2021 at 9:30 AM Oliver Upton <oupton@google.com> wrote: > > Hi Marc, > > On Mon, Aug 9, 2021 at 8:48 AM Marc Zyngier <maz@kernel.org> wrote: > > > > Add a new capability to detect the Enhanced Counter Virtualization > > feature (FEAT_EVC). > > > > s/FEAT_EVC/FEAT_ECV/g > > > Signed-off-by: Marc Zyngier <maz@kernel.org> > > --- > > arch/arm64/kernel/cpufeature.c | 10 ++++++++++ > > arch/arm64/tools/cpucaps | 1 + > > 2 files changed, 11 insertions(+) > > > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index 0ead8bfedf20..9c2ce5408811 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -1899,6 +1899,16 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > > .sign = FTR_UNSIGNED, > > .min_field_value = 1, > > }, > > + { > > + .desc = "Enhanced counter virtualization", > > + .capability = ARM64_HAS_ECV, > > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > > + .matches = has_cpuid_feature, > > + .sys_reg = SYS_ID_AA64MMFR0_EL1, > > + .field_pos = ID_AA64MMFR0_ECV_SHIFT, > > + .sign = FTR_UNSIGNED, > > + .min_field_value = 1, > > + }, > > Per one of your other patches in the series, it sounds like userspace > access to the self-synchronized registers hasn't been settled yet. > However, if/when available to userspace, should this cpufeature map to > an ELF HWCAP? > > Also, w.r.t. my series I have out for ECV in KVM. All the controls > used in EL2 depend on ECV=0x2. I agree that ECV=0x1 needs a cpufeature > bit, but what about EL2's use case? Forgot to link the series: http://lore.kernel.org/r/20210804085819.846610-1-oupton@google.com > > Besides the typo: > > Reviewed-by: Oliver Upton <oupton@google.com> > > -- > Thanks, > Oliver > > > #ifdef CONFIG_ARM64_PAN > > { > > .desc = "Privileged Access Never", > > diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps > > index 49305c2e6dfd..7a7c58acd8f0 100644 > > --- a/arch/arm64/tools/cpucaps > > +++ b/arch/arm64/tools/cpucaps > > @@ -18,6 +18,7 @@ HAS_CRC32 > > HAS_DCPODP > > HAS_DCPOP > > HAS_E0PD > > +HAS_ECV > > HAS_EPAN > > HAS_GENERIC_AUTH > > HAS_GENERIC_AUTH_ARCH > > -- > > 2.30.2 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-08-09 16:34 UTC|newest] Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-09 15:26 [PATCH 00/13] clocksource/arm_arch_timer: Add basic ARMv8.6 support Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-09 15:26 ` [PATCH 01/13] clocksource/arm_arch_timer: Drop CNT*_TVAL read accessors Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-11 7:02 ` Oliver Upton 2021-08-11 7:02 ` Oliver Upton 2021-08-24 16:20 ` Mark Rutland 2021-08-24 16:20 ` Mark Rutland 2021-08-09 15:26 ` [PATCH 02/13] clocksource/arm_arch_timer: Extend write side of timer register accessors to u64 Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-09 16:12 ` Oliver Upton 2021-08-09 16:12 ` Oliver Upton 2021-08-24 16:20 ` Mark Rutland 2021-08-24 16:20 ` Mark Rutland 2021-08-09 15:26 ` [PATCH 03/13] clocksource/arm_arch_timer: Move system register timer programming over to CVAL Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-11 7:15 ` Oliver Upton 2021-08-11 7:15 ` Oliver Upton 2021-08-24 16:21 ` Mark Rutland 2021-08-24 16:21 ` Mark Rutland 2021-08-09 15:26 ` [PATCH 04/13] clocksource/arm_arch_timer: Move drop _tval from erratum function names Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-09 16:16 ` Oliver Upton 2021-08-09 16:16 ` Oliver Upton 2021-08-24 16:29 ` Mark Rutland 2021-08-24 16:29 ` Mark Rutland 2021-08-09 15:26 ` [PATCH 05/13] clocksource/arm_arch_timer: Fix MMIO base address vs callback ordering issue Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-09 16:52 ` Oliver Upton 2021-08-09 16:52 ` Oliver Upton 2021-08-10 8:27 ` Marc Zyngier 2021-08-10 8:27 ` Marc Zyngier 2021-08-24 16:44 ` Mark Rutland 2021-08-24 16:44 ` Mark Rutland 2021-08-09 15:26 ` [PATCH 06/13] clocksource/arm_arch_timer: Move MMIO timer programming over to CVAL Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-09 15:26 ` [PATCH 07/13] clocksource/arm_arch_timer: Advertise 56bit timer to the core code Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-09 15:26 ` [PATCH 08/13] clocksource/arm_arch_timer: Work around broken CVAL implementations Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-10 12:34 ` Mark Rutland 2021-08-10 12:34 ` Mark Rutland 2021-08-10 13:15 ` Marc Zyngier 2021-08-10 13:15 ` Marc Zyngier 2021-08-09 15:26 ` [PATCH 09/13] clocksource/arm_arch_timer: Remove any trace of the TVAL programming interface Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-09 15:26 ` [PATCH 10/13] clocksource/arm_arch_timer: Drop unnecessary ISB on CVAL programming Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-09 15:26 ` [PATCH 11/13] clocksource/arm_arch_timer: Fix masking for high freq counters Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-09 16:45 ` Oliver Upton 2021-08-09 16:45 ` Oliver Upton 2021-08-10 8:40 ` Marc Zyngier 2021-08-10 8:40 ` Marc Zyngier 2021-08-10 9:09 ` Oliver Upton 2021-08-10 9:09 ` Oliver Upton 2021-08-09 15:26 ` [PATCH 12/13] arm64: Add a capability for FEAT_EVC Marc Zyngier 2021-08-09 15:26 ` Marc Zyngier 2021-08-09 16:30 ` Oliver Upton 2021-08-09 16:30 ` Oliver Upton 2021-08-09 16:34 ` Oliver Upton [this message] 2021-08-09 16:34 ` Oliver Upton 2021-08-09 18:02 ` Marc Zyngier 2021-08-09 18:02 ` Marc Zyngier 2021-08-09 18:21 ` Oliver Upton 2021-08-09 18:21 ` Oliver Upton 2021-08-09 18:23 ` Oliver Upton 2021-08-09 18:23 ` Oliver Upton 2021-08-09 15:26 ` [PATCH 13/13] arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0 Marc Zyngier 2021-08-09 15:26 ` [PATCH 13/13] arm64: Add CNT{P, V}CTSS_EL0 alternatives to cnt{p, v}ct_el0 Marc Zyngier 2021-08-09 16:42 ` [PATCH 13/13] arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0 Oliver Upton 2021-08-09 16:42 ` [PATCH 13/13] arm64: Add CNT{P, V}CTSS_EL0 alternatives to cnt{p, v}ct_el0 Oliver Upton 2021-08-09 18:11 ` [PATCH 13/13] arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0 Marc Zyngier 2021-08-09 18:11 ` [PATCH 13/13] arm64: Add CNT{P, V}CTSS_EL0 alternatives to cnt{p, v}ct_el0 Marc Zyngier 2021-08-09 18:17 ` [PATCH 13/13] arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0 Oliver Upton 2021-08-09 18:17 ` [PATCH 13/13] arm64: Add CNT{P, V}CTSS_EL0 alternatives to cnt{p, v}ct_el0 Oliver Upton 2021-08-10 7:59 ` [PATCH 13/13] arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0 Marc Zyngier 2021-08-10 7:59 ` [PATCH 13/13] arm64: Add CNT{P, V}CTSS_EL0 alternatives to cnt{p, v}ct_el0 Marc Zyngier
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