From: "Oliver O'Halloran" <oohall@gmail.com> To: Bjorn Helgaas <helgaas@kernel.org> Cc: "Pali Rohár" <pali@kernel.org>, "Aaron Ma" <aaron.ma@canonical.com>, jesse.brandeburg@intel.com, anthony.l.nguyen@intel.com, "David S. Miller" <davem@davemloft.net>, "Jakub Kicinski" <kuba@kernel.org>, intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>, "Krzysztof Wilczyński" <kw@linux.com>, linux-pci <linux-pci@vger.kernel.org> Subject: Re: [PATCH 1/2] igc: don't rd/wr iomem when PCI is removed Date: Thu, 8 Jul 2021 12:04:02 +1000 [thread overview] Message-ID: <CAOSf1CGVpogQGAatuY_N0db6OL2BFegGtj6VTLA9KFz0TqYBQg@mail.gmail.com> (raw) In-Reply-To: <20210707221042.GA939059@bjorn-Precision-5520> On Thu, Jul 8, 2021 at 8:40 AM Bjorn Helgaas <helgaas@kernel.org> wrote: > > If we add the check as proposed in this patch, I think people will > read it and think this is the correct way to avoid MMIO errors. It > does happen to avoid some MMIO errors, but it cannot avoid them all, > so it's not a complete solution and it gives a false sense of > security. I think it's helpful to classify MMIO errors as either benign or poisonous with the poison MMIOs causing some kind of crash. Most of the discussions about pci_dev_is_disconnected(), including this one, seem to stem from people trying to use it to avoid the poison case. I agree that using pci_dev_is_disconnected() that way is hacky and doesn't really fix the problem, but considering poison MMIOs usually stem from broken hardware or firmware maybe we should allow it anyway. We can't do anything better and it's an improvement compared to crashing. > A complete solution requires a test *after* the MMIO read. If you > have the test after the read, you don't really need one before. Sure, > testing before means you can avoid one MMIO read failure in some > cases. But avoiding that failure costs quite a lot in code clutter. It's not that much clutter if the checks are buried in the MMIO helpers which most drivers define. Speaking of which: > u32 igc_rd32(struct igc_hw *hw, u32 reg) > { > struct igc_adapter *igc = container_of(hw, struct igc_adapter, hw); > u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr); > u32 value = 0; > > value = readl(&hw_addr[reg]); > > /* reads should not return all F's */ > if (!(~value) && (!reg || !(~readl(hw_addr)))) { > struct net_device *netdev = igc->netdev; > > hw->hw_addr = NULL; > netif_device_detach(netdev); > netdev_err(netdev, "PCIe link lost, device now detached\n"); > WARN(pci_device_is_present(igc->pdev), > "igc: Failed to read reg 0x%x!\n", reg); > } > > return value; > } I think I found where that page fault is coming from. I wonder if we should provide drivers some way of invoking the error recovery mechanisms manually or even just flagging itself as broken. Right now even if the driver bothers with synchronous error detection the driver can't really do anything other than parking itself and hoping AER/EEH recovery kicks in. Oliver
WARNING: multiple messages have this Message-ID (diff)
From: Oliver O'Halloran <oohall@gmail.com> To: intel-wired-lan@osuosl.org Subject: [Intel-wired-lan] [PATCH 1/2] igc: don't rd/wr iomem when PCI is removed Date: Thu, 8 Jul 2021 12:04:02 +1000 [thread overview] Message-ID: <CAOSf1CGVpogQGAatuY_N0db6OL2BFegGtj6VTLA9KFz0TqYBQg@mail.gmail.com> (raw) In-Reply-To: <20210707221042.GA939059@bjorn-Precision-5520> On Thu, Jul 8, 2021 at 8:40 AM Bjorn Helgaas <helgaas@kernel.org> wrote: > > If we add the check as proposed in this patch, I think people will > read it and think this is the correct way to avoid MMIO errors. It > does happen to avoid some MMIO errors, but it cannot avoid them all, > so it's not a complete solution and it gives a false sense of > security. I think it's helpful to classify MMIO errors as either benign or poisonous with the poison MMIOs causing some kind of crash. Most of the discussions about pci_dev_is_disconnected(), including this one, seem to stem from people trying to use it to avoid the poison case. I agree that using pci_dev_is_disconnected() that way is hacky and doesn't really fix the problem, but considering poison MMIOs usually stem from broken hardware or firmware maybe we should allow it anyway. We can't do anything better and it's an improvement compared to crashing. > A complete solution requires a test *after* the MMIO read. If you > have the test after the read, you don't really need one before. Sure, > testing before means you can avoid one MMIO read failure in some > cases. But avoiding that failure costs quite a lot in code clutter. It's not that much clutter if the checks are buried in the MMIO helpers which most drivers define. Speaking of which: > u32 igc_rd32(struct igc_hw *hw, u32 reg) > { > struct igc_adapter *igc = container_of(hw, struct igc_adapter, hw); > u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr); > u32 value = 0; > > value = readl(&hw_addr[reg]); > > /* reads should not return all F's */ > if (!(~value) && (!reg || !(~readl(hw_addr)))) { > struct net_device *netdev = igc->netdev; > > hw->hw_addr = NULL; > netif_device_detach(netdev); > netdev_err(netdev, "PCIe link lost, device now detached\n"); > WARN(pci_device_is_present(igc->pdev), > "igc: Failed to read reg 0x%x!\n", reg); > } > > return value; > } I think I found where that page fault is coming from. I wonder if we should provide drivers some way of invoking the error recovery mechanisms manually or even just flagging itself as broken. Right now even if the driver bothers with synchronous error detection the driver can't really do anything other than parking itself and hoping AER/EEH recovery kicks in. Oliver
next prev parent reply other threads:[~2021-07-08 2:04 UTC|newest] Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-02 4:51 [PATCH 1/2] igc: don't rd/wr iomem when PCI is removed Aaron Ma 2021-07-02 4:51 ` [Intel-wired-lan] " Aaron Ma 2021-07-02 4:51 ` [PATCH 2/2] igc: wait for the MAC copy when enabled MAC passthrough Aaron Ma 2021-07-02 4:51 ` [Intel-wired-lan] " Aaron Ma 2021-07-04 5:36 ` Neftin, Sasha 2021-07-04 5:36 ` Neftin, Sasha 2021-07-05 7:38 ` Aaron Ma 2021-07-05 7:38 ` Aaron Ma 2021-07-05 11:54 ` Neftin, Sasha 2021-07-05 11:54 ` Neftin, Sasha 2021-07-06 6:46 ` Aaron Ma 2021-07-06 6:46 ` Aaron Ma 2021-07-08 4:24 ` Neftin, Sasha 2021-07-08 4:24 ` Neftin, Sasha 2021-07-13 13:45 ` Aaron Ma 2021-07-13 13:45 ` Aaron Ma 2021-07-14 9:13 ` Ruinskiy, Dima 2021-07-14 9:13 ` Ruinskiy, Dima 2021-07-04 14:28 ` [PATCH 1/2] igc: don't rd/wr iomem when PCI is removed Pali Rohár 2021-07-04 14:28 ` [Intel-wired-lan] " Pali =?unknown-8bit?q?Roh=C3=A1r?= 2021-07-05 7:23 ` Aaron Ma 2021-07-05 7:23 ` [Intel-wired-lan] " Aaron Ma 2021-07-05 23:02 ` Krzysztof Wilczyński 2021-07-05 23:02 ` [Intel-wired-lan] " Krzysztof =?unknown-8bit?q?Wilczy=C5=84ski?= 2021-07-06 14:23 ` Pali Rohár 2021-07-06 14:23 ` [Intel-wired-lan] " Pali =?unknown-8bit?q?Roh=C3=A1r?= 2021-07-05 7:47 ` Dave Airlie 2021-07-05 7:47 ` [Intel-wired-lan] " Dave Airlie 2021-07-06 6:42 ` Aaron Ma 2021-07-06 6:42 ` [Intel-wired-lan] " Aaron Ma 2021-07-06 20:12 ` Bjorn Helgaas 2021-07-06 20:12 ` [Intel-wired-lan] " Bjorn Helgaas 2021-07-07 21:53 ` Pali Rohár 2021-07-07 21:53 ` [Intel-wired-lan] " Pali =?unknown-8bit?q?Roh=C3=A1r?= 2021-07-07 22:10 ` Bjorn Helgaas 2021-07-07 22:10 ` [Intel-wired-lan] " Bjorn Helgaas 2021-07-08 2:04 ` Oliver O'Halloran [this message] 2021-07-08 2:04 ` Oliver O'Halloran 2021-07-08 15:45 ` Bjorn Helgaas 2021-07-08 15:45 ` [Intel-wired-lan] " Bjorn Helgaas 2021-07-18 16:31 ` Oliver O'Halloran 2021-07-18 16:31 ` [Intel-wired-lan] " Oliver O'Halloran 2021-07-18 22:50 ` Pali Rohár 2021-07-18 22:50 ` [Intel-wired-lan] " Pali =?unknown-8bit?q?Roh=C3=A1r?= 2021-07-19 2:49 ` Oliver O'Halloran 2021-07-19 2:49 ` [Intel-wired-lan] " Oliver O'Halloran 2021-07-19 8:13 ` Pali Rohár 2021-07-19 8:13 ` [Intel-wired-lan] " Pali =?unknown-8bit?q?Roh=C3=A1r?= 2021-07-20 0:17 ` Bjorn Helgaas 2021-07-20 0:17 ` [Intel-wired-lan] " Bjorn Helgaas 2021-07-13 13:00 ` [PATCH v2] igc: fix page fault when thunderbolt is unplugged Aaron Ma 2021-07-13 13:00 ` [Intel-wired-lan] " Aaron Ma 2021-08-04 12:06 ` Fuxbrumer, Dvora 2021-08-04 12:06 ` Fuxbrumer, Dvora
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=CAOSf1CGVpogQGAatuY_N0db6OL2BFegGtj6VTLA9KFz0TqYBQg@mail.gmail.com \ --to=oohall@gmail.com \ --cc=aaron.ma@canonical.com \ --cc=anthony.l.nguyen@intel.com \ --cc=davem@davemloft.net \ --cc=helgaas@kernel.org \ --cc=intel-wired-lan@lists.osuosl.org \ --cc=jesse.brandeburg@intel.com \ --cc=kuba@kernel.org \ --cc=kw@linux.com \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-pci@vger.kernel.org \ --cc=netdev@vger.kernel.org \ --cc=pali@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.