[PATCH V4 0/2] Add reset entries for SDCC controllers

[PATCH V4 0/2] Add reset entries for SDCC controllers

[Shaik Sajida Bhanu]

Changes since V3:
	- Removed reset-names from bindings and DT file as suggested by
	  Stephen Boyd.
	- Removed comments for resets as suggested by Stephen Boyd.

Changes since V2:
	- Updated commit subject and comments in dtsi file.
	- Added resets entry in sdhci-msm dt-bindings.

Changes since V1:
	- Updated commit message, subject and comments in dtsi file as
	  suggested by Krzysztof Kozlowski.

Shaik Sajida Bhanu (2):
  dt-bindings: mmc: sdhci-msm: Add gcc resets strings
  arm64: dts: qcom: sc7280: Add reset entries for SDCC controllers

 Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 5 +++++
 arch/arm64/boot/dts/qcom/sc7280.dtsi                | 4 ++++
 2 files changed, 9 insertions(+)

-- 
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of Code Aurora Forum, hosted by The Linux Foundation

[PATCH V4 1/2] dt-bindings: mmc: sdhci-msm: Add gcc resets strings

[Shaik Sajida Bhanu]

Add gcc hardware reset supported strings for qcom-sdhci controller.

Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
---
 Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 6216ed7..9f02461 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -76,6 +76,7 @@ Optional Properties:
 		"cpu-sdhc".
 		Please refer to Documentation/devicetree/bindings/
 		interconnect/ for more details.
+- resets: Phandle and reset specifier for the device's reset.
 
 Example:
 
@@ -98,6 +99,8 @@ Example:
 				<&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
 		interconnect-names = "sdhc-ddr","cpu-sdhc";
 
+		resets = <&gcc GCC_SDCC1_BCR>;
+
 		qcom,dll-config = <0x000f642c>;
 		qcom,ddr-config = <0x80040868>;
 	};
@@ -118,6 +121,8 @@ Example:
 		clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
 		clock-names = "core", "iface";
 
+		resets = <&gcc GCC_SDCC2_BCR>;
+
 		qcom,dll-config = <0x0007642c>;
 		qcom,ddr-config = <0x80040868>;
 	};
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation

[PATCH V4 2/2] arm64: dts: qcom: sc7280: Add reset entries for SDCC controllers

[Shaik Sajida Bhanu]

Add gcc hardware reset entries for eMMC and SD card.

Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index f0b64be..e2393d1 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -881,6 +881,8 @@
 			mmc-hs400-1_8v;
 			mmc-hs400-enhanced-strobe;
 
+			resets = <&gcc GCC_SDCC1_BCR>;
+
 			sdhc1_opp_table: opp-table {
 				compatible = "operating-points-v2";
 
@@ -2686,6 +2688,8 @@
 
 			qcom,dll-config = <0x0007642c>;
 
+			resets = <&gcc GCC_SDCC2_BCR>;
+
 			sdhc2_opp_table: opp-table {
 				compatible = "operating-points-v2";
 
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation

Re: [PATCH V4 1/2] dt-bindings: mmc: sdhci-msm: Add gcc resets strings

[Krzysztof Kozlowski]

On 12/04/2022 12:32, Shaik Sajida Bhanu wrote:
> Add gcc hardware reset supported strings for qcom-sdhci controller.
> 
> Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
> ---
>  Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 5 +++++
>  1 file changed, 5 insertions(+)
> 


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

Re: [PATCH V4 1/2] dt-bindings: mmc: sdhci-msm: Add gcc resets strings

[Ulf Hansson]

+ Bhupesh

On Tue, 12 Apr 2022 at 12:33, Shaik Sajida Bhanu
<quic_c_sbhanu@quicinc.com> wrote:
>
> Add gcc hardware reset supported strings for qcom-sdhci controller.
>
> Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>

As stated earlier, I would really like to see the binding being
converted to the yaml format first. It seems like Bhupesh is working
on the conversion [1].

Kind regards
Uffe

[1]
https://www.spinics.net/lists/linux-arm-msm/msg107809.html


> ---
>  Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index 6216ed7..9f02461 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -76,6 +76,7 @@ Optional Properties:
>                 "cpu-sdhc".
>                 Please refer to Documentation/devicetree/bindings/
>                 interconnect/ for more details.
> +- resets: Phandle and reset specifier for the device's reset.
>
>  Example:
>
> @@ -98,6 +99,8 @@ Example:
>                                 <&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
>                 interconnect-names = "sdhc-ddr","cpu-sdhc";
>
> +               resets = <&gcc GCC_SDCC1_BCR>;
> +
>                 qcom,dll-config = <0x000f642c>;
>                 qcom,ddr-config = <0x80040868>;
>         };
> @@ -118,6 +121,8 @@ Example:
>                 clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
>                 clock-names = "core", "iface";
>
> +               resets = <&gcc GCC_SDCC2_BCR>;
> +
>                 qcom,dll-config = <0x0007642c>;
>                 qcom,ddr-config = <0x80040868>;
>         };
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
>