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* [Intel-gfx] dg1 flag for userspace to allocate contig resources
@ 2020-09-11  5:42 Dave Airlie
  2020-09-11  8:56 ` Matthew Auld
  0 siblings, 1 reply; 5+ messages in thread
From: Dave Airlie @ 2020-09-11  5:42 UTC (permalink / raw)
  To: Intel Graphics Development, Matthew Auld

I've just been looking at the current DG1 uapi, and I can't see any
flag to allow userspace to upfront say it was a contiguous vram BO.

I think you'd really want this for scanout, since otherwise you'll
have to migrate any non-contig to contig when it transitions to
scanout, and cause an extra set of copies.

Dave.
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [Intel-gfx] dg1 flag for userspace to allocate contig resources
  2020-09-11  5:42 [Intel-gfx] dg1 flag for userspace to allocate contig resources Dave Airlie
@ 2020-09-11  8:56 ` Matthew Auld
  2020-09-11 12:27   ` Joonas Lahtinen
  0 siblings, 1 reply; 5+ messages in thread
From: Matthew Auld @ 2020-09-11  8:56 UTC (permalink / raw)
  To: Dave Airlie, Intel Graphics Development, Joonas Lahtinen

On 11/09/2020 06:42, Dave Airlie wrote:
> I've just been looking at the current DG1 uapi, and I can't see any
> flag to allow userspace to upfront say it was a contiguous vram BO.
> 
> I think you'd really want this for scanout, since otherwise you'll
> have to migrate any non-contig to contig when it transitions to
> scanout, and cause an extra set of copies.

Hmm, why do we need physically contiguous memory for scanout? From hw 
pov it's seen through the GTT.

> 
> Dave.
> 
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [Intel-gfx] dg1 flag for userspace to allocate contig resources
  2020-09-11  8:56 ` Matthew Auld
@ 2020-09-11 12:27   ` Joonas Lahtinen
  2020-09-11 12:31     ` Ville Syrjälä
  2020-09-13 21:53     ` Dave Airlie
  0 siblings, 2 replies; 5+ messages in thread
From: Joonas Lahtinen @ 2020-09-11 12:27 UTC (permalink / raw)
  To: Dave Airlie, Intel Graphics Development, Matthew Auld,
	Jani Nikula, Ville Syrjala

+ Jani and Ville

Quoting Matthew Auld (2020-09-11 11:56:56)
> On 11/09/2020 06:42, Dave Airlie wrote:
> > I've just been looking at the current DG1 uapi, and I can't see any
> > flag to allow userspace to upfront say it was a contiguous vram BO.
> > 
> > I think you'd really want this for scanout, since otherwise you'll
> > have to migrate any non-contig to contig when it transitions to
> > scanout, and cause an extra set of copies.
> 
> Hmm, why do we need physically contiguous memory for scanout? From hw 
> pov it's seen through the GTT.

That's correct. On both discrete (and integrated) platforms the scan-out
addresses on Intel GPUs are programmed to targer Global GTT managed by
kernel. So no need to have the backing storage contiguous.

Only extra action required for a scan-out BO is to bind it to the GGTT in
addition to the ppGTT that renders to it. 

GGTT is relatively expensive to write to these days and limited in size,
but that can't really be helped with an upfront flag.

Regards, Joonas
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [Intel-gfx] dg1 flag for userspace to allocate contig resources
  2020-09-11 12:27   ` Joonas Lahtinen
@ 2020-09-11 12:31     ` Ville Syrjälä
  2020-09-13 21:53     ` Dave Airlie
  1 sibling, 0 replies; 5+ messages in thread
From: Ville Syrjälä @ 2020-09-11 12:31 UTC (permalink / raw)
  To: Joonas Lahtinen; +Cc: Jani Nikula, Intel Graphics Development, Matthew Auld

On Fri, Sep 11, 2020 at 03:27:07PM +0300, Joonas Lahtinen wrote:
> + Jani and Ville
> 
> Quoting Matthew Auld (2020-09-11 11:56:56)
> > On 11/09/2020 06:42, Dave Airlie wrote:
> > > I've just been looking at the current DG1 uapi, and I can't see any
> > > flag to allow userspace to upfront say it was a contiguous vram BO.
> > > 
> > > I think you'd really want this for scanout, since otherwise you'll
> > > have to migrate any non-contig to contig when it transitions to
> > > scanout, and cause an extra set of copies.
> > 
> > Hmm, why do we need physically contiguous memory for scanout? From hw 
> > pov it's seen through the GTT.
> 
> That's correct. On both discrete (and integrated) platforms the scan-out
> addresses on Intel GPUs are programmed to targer Global GTT managed by
> kernel. So no need to have the backing storage contiguous.

The only exception being the ye olde gen2/3 physical cursor stuff :)

-- 
Ville Syrjälä
Intel
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [Intel-gfx] dg1 flag for userspace to allocate contig resources
  2020-09-11 12:27   ` Joonas Lahtinen
  2020-09-11 12:31     ` Ville Syrjälä
@ 2020-09-13 21:53     ` Dave Airlie
  1 sibling, 0 replies; 5+ messages in thread
From: Dave Airlie @ 2020-09-13 21:53 UTC (permalink / raw)
  To: Joonas Lahtinen; +Cc: Jani Nikula, Intel Graphics Development, Matthew Auld

On Fri, 11 Sep 2020 at 22:27, Joonas Lahtinen
<joonas.lahtinen@linux.intel.com> wrote:
>
> + Jani and Ville
>
> Quoting Matthew Auld (2020-09-11 11:56:56)
> > On 11/09/2020 06:42, Dave Airlie wrote:
> > > I've just been looking at the current DG1 uapi, and I can't see any
> > > flag to allow userspace to upfront say it was a contiguous vram BO.
> > >
> > > I think you'd really want this for scanout, since otherwise you'll
> > > have to migrate any non-contig to contig when it transitions to
> > > scanout, and cause an extra set of copies.
> >
> > Hmm, why do we need physically contiguous memory for scanout? From hw
> > pov it's seen through the GTT.
>
> That's correct. On both discrete (and integrated) platforms the scan-out
> addresses on Intel GPUs are programmed to targer Global GTT managed by
> kernel. So no need to have the backing storage contiguous.
>
> Only extra action required for a scan-out BO is to bind it to the GGTT in
> addition to the ppGTT that renders to it.
>
> GGTT is relatively expensive to write to these days and limited in size,
> but that can't really be helped with an upfront flag.
>

Oops thanks for enlightenment! Indeed binding things to the GTT
properly helps, sg iterator I had produced wrong pte entries, now I
can at least see an X stipple.

Dave.
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^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2020-09-13 21:53 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-11  5:42 [Intel-gfx] dg1 flag for userspace to allocate contig resources Dave Airlie
2020-09-11  8:56 ` Matthew Auld
2020-09-11 12:27   ` Joonas Lahtinen
2020-09-11 12:31     ` Ville Syrjälä
2020-09-13 21:53     ` Dave Airlie

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