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* [U-Boot] [PATCH] dm: core: Round up size when allocating so that it is cache line aligned
@ 2017-09-19 11:23 Faiz Abbas
  2017-09-19 12:12 ` Bin Meng
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Faiz Abbas @ 2017-09-19 11:23 UTC (permalink / raw)
  To: u-boot

The size variable may not be always be a mulitple of
ARCH_DMA_MINALIGN and using it to flush cache leads to cache
misaligned warnings.

Therefore, round up the size to a multiple of ARCH_DMA_MINLAIGN
when allocating private data.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
 drivers/core/device.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 5463d1f..96dfb21 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -254,6 +254,7 @@ static void *alloc_priv(int size, uint flags)
 	void *priv;
 
 	if (flags & DM_FLAG_ALLOC_PRIV_DMA) {
+		size = ROUND(size, ARCH_DMA_MINALIGN);
 		priv = memalign(ARCH_DMA_MINALIGN, size);
 		if (priv) {
 			memset(priv, '\0', size);
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [U-Boot] [PATCH] dm: core: Round up size when allocating so that it is cache line aligned
  2017-09-19 11:23 [U-Boot] [PATCH] dm: core: Round up size when allocating so that it is cache line aligned Faiz Abbas
@ 2017-09-19 12:12 ` Bin Meng
  2017-09-19 12:28   ` Faiz Abbas
  2017-09-25  2:13 ` Simon Glass
  2017-09-29 21:00 ` sjg at google.com
  2 siblings, 1 reply; 5+ messages in thread
From: Bin Meng @ 2017-09-19 12:12 UTC (permalink / raw)
  To: u-boot

Hi Faiz,

On Tue, Sep 19, 2017 at 7:23 PM, Faiz Abbas <faiz_abbas@ti.com> wrote:
> The size variable may not be always be a mulitple of
> ARCH_DMA_MINALIGN and using it to flush cache leads to cache
> misaligned warnings.
>
> Therefore, round up the size to a multiple of ARCH_DMA_MINLAIGN
> when allocating private data.
>
> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
> ---
>  drivers/core/device.c | 1 +
>  1 file changed, 1 insertion(+)
>

Isn't DM_FLAG_ALLOC_PRIV_DMA sufficient?

Regards,
Bin

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [U-Boot] [PATCH] dm: core: Round up size when allocating so that it is cache line aligned
  2017-09-19 12:12 ` Bin Meng
@ 2017-09-19 12:28   ` Faiz Abbas
  0 siblings, 0 replies; 5+ messages in thread
From: Faiz Abbas @ 2017-09-19 12:28 UTC (permalink / raw)
  To: u-boot

Hi Bin,

On Tuesday 19 September 2017 05:42 PM, Bin Meng wrote:
> Hi Faiz,
> 
> On Tue, Sep 19, 2017 at 7:23 PM, Faiz Abbas <faiz_abbas@ti.com> wrote:
>> The size variable may not be always be a mulitple of
>> ARCH_DMA_MINALIGN and using it to flush cache leads to cache
>> misaligned warnings.
>>
>> Therefore, round up the size to a multiple of ARCH_DMA_MINLAIGN
>> when allocating private data.
>>
>> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
>> ---
>>  drivers/core/device.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
> 
> Isn't DM_FLAG_ALLOC_PRIV_DMA sufficient?

The check_cache_range function checks both the beginning and the
end of the range given to it for cache alignment.
DM_FLAG_ALLOC_PRIV_DMA aligns only the base address but the end
address decided by size need not be at a multiple of ARCH_DMA_MINALIGN.

Thanks,
Faiz

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [U-Boot] [PATCH] dm: core: Round up size when allocating so that it is cache line aligned
  2017-09-19 11:23 [U-Boot] [PATCH] dm: core: Round up size when allocating so that it is cache line aligned Faiz Abbas
  2017-09-19 12:12 ` Bin Meng
@ 2017-09-25  2:13 ` Simon Glass
  2017-09-29 21:00 ` sjg at google.com
  2 siblings, 0 replies; 5+ messages in thread
From: Simon Glass @ 2017-09-25  2:13 UTC (permalink / raw)
  To: u-boot

On 19 September 2017 at 05:23, Faiz Abbas <faiz_abbas@ti.com> wrote:
> The size variable may not be always be a mulitple of
> ARCH_DMA_MINALIGN and using it to flush cache leads to cache
> misaligned warnings.
>
> Therefore, round up the size to a multiple of ARCH_DMA_MINLAIGN
> when allocating private data.
>
> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
> ---
>  drivers/core/device.c | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [U-Boot] [PATCH] dm: core: Round up size when allocating so that it is cache line aligned
  2017-09-19 11:23 [U-Boot] [PATCH] dm: core: Round up size when allocating so that it is cache line aligned Faiz Abbas
  2017-09-19 12:12 ` Bin Meng
  2017-09-25  2:13 ` Simon Glass
@ 2017-09-29 21:00 ` sjg at google.com
  2 siblings, 0 replies; 5+ messages in thread
From: sjg at google.com @ 2017-09-29 21:00 UTC (permalink / raw)
  To: u-boot

On 19 September 2017 at 05:23, Faiz Abbas <faiz_abbas@ti.com> wrote:
> The size variable may not be always be a mulitple of
> ARCH_DMA_MINALIGN and using it to flush cache leads to cache
> misaligned warnings.
>
> Therefore, round up the size to a multiple of ARCH_DMA_MINLAIGN
> when allocating private data.
>
> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
> ---
>  drivers/core/device.c | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-dm thanks!

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2017-09-29 21:00 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-09-19 11:23 [U-Boot] [PATCH] dm: core: Round up size when allocating so that it is cache line aligned Faiz Abbas
2017-09-19 12:12 ` Bin Meng
2017-09-19 12:28   ` Faiz Abbas
2017-09-25  2:13 ` Simon Glass
2017-09-29 21:00 ` sjg at google.com

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