* [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property
@ 2020-06-23 5:29 Bin Meng
2020-06-23 5:29 ` [PATCH 2/5] sysreset: syscon: Support value property Bin Meng
` (5 more replies)
0 siblings, 6 replies; 19+ messages in thread
From: Bin Meng @ 2020-06-23 5:29 UTC (permalink / raw)
To: u-boot
From: Bin Meng <bin.meng@windriver.com>
Per the DT binding, <offset> is a required property. Let's abort
the probe if it is missing. For the <mask> property, current codes
assume a default value of zero, which is not correct either.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
drivers/sysreset/sysreset_syscon.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/sysreset/sysreset_syscon.c b/drivers/sysreset/sysreset_syscon.c
index f64701a..caf2482 100644
--- a/drivers/sysreset/sysreset_syscon.c
+++ b/drivers/sysreset/sysreset_syscon.c
@@ -41,6 +41,7 @@ static struct sysreset_ops syscon_reboot_ops = {
int syscon_reboot_probe(struct udevice *dev)
{
struct syscon_reboot_priv *priv = dev_get_priv(dev);
+ int err;
priv->regmap = syscon_regmap_lookup_by_phandle(dev, "regmap");
if (IS_ERR(priv->regmap)) {
@@ -48,8 +49,17 @@ int syscon_reboot_probe(struct udevice *dev)
return -ENODEV;
}
- priv->offset = dev_read_u32_default(dev, "offset", 0);
- priv->mask = dev_read_u32_default(dev, "mask", 0);
+ err = dev_read_u32(dev, "offset", &priv->offset);
+ if (err) {
+ pr_err("unable to find offset\n");
+ return -ENOENT;
+ }
+
+ err = dev_read_u32(dev, "mask", &priv->mask);
+ if (err) {
+ pr_err("unable to find mask\n");
+ return -ENOENT;
+ }
return 0;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 2/5] sysreset: syscon: Support value property
2020-06-23 5:29 [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property Bin Meng
@ 2020-06-23 5:29 ` Bin Meng
2020-06-26 1:43 ` Simon Glass
2020-06-26 6:12 ` Pragnesh Patel
2020-06-23 5:29 ` [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on Bin Meng
` (4 subsequent siblings)
5 siblings, 2 replies; 19+ messages in thread
From: Bin Meng @ 2020-06-23 5:29 UTC (permalink / raw)
To: u-boot
From: Bin Meng <bin.meng@windriver.com>
Per the DT binding, <mask> and <value> property can have either one
or both, and if <value> is missing, <mask> should be used, which is
what current U-Boot sysreset_syscon driver supports.
This adds support to the <value> property to the driver, and <mask>
semantics is updated to really be a mask to the value if both exist.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
drivers/sysreset/sysreset_syscon.c | 22 +++++++++++++++++-----
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/drivers/sysreset/sysreset_syscon.c b/drivers/sysreset/sysreset_syscon.c
index caf2482..1c47486 100644
--- a/drivers/sysreset/sysreset_syscon.c
+++ b/drivers/sysreset/sysreset_syscon.c
@@ -19,6 +19,7 @@ struct syscon_reboot_priv {
struct regmap *regmap;
unsigned int offset;
unsigned int mask;
+ unsigned int value;
};
static int syscon_reboot_request(struct udevice *dev, enum sysreset_t type)
@@ -29,7 +30,7 @@ static int syscon_reboot_request(struct udevice *dev, enum sysreset_t type)
if (type != driver_data)
return -EPROTONOSUPPORT;
- regmap_write(priv->regmap, priv->offset, priv->mask);
+ regmap_update_bits(priv->regmap, priv->offset, priv->mask, priv->value);
return -EINPROGRESS;
}
@@ -42,6 +43,7 @@ int syscon_reboot_probe(struct udevice *dev)
{
struct syscon_reboot_priv *priv = dev_get_priv(dev);
int err;
+ int mask_err, value_err;
priv->regmap = syscon_regmap_lookup_by_phandle(dev, "regmap");
if (IS_ERR(priv->regmap)) {
@@ -55,10 +57,20 @@ int syscon_reboot_probe(struct udevice *dev)
return -ENOENT;
}
- err = dev_read_u32(dev, "mask", &priv->mask);
- if (err) {
- pr_err("unable to find mask\n");
- return -ENOENT;
+ mask_err = dev_read_u32(dev, "mask", &priv->mask);
+ value_err = dev_read_u32(dev, "value", &priv->value);
+ if (mask_err && value_err) {
+ pr_err("unable to find mask and value\n");
+ return -EINVAL;
+ }
+
+ if (value_err) {
+ /* support old binding */
+ priv->value = priv->mask;
+ priv->mask = 0xffffffff;
+ } else if (mask_err) {
+ /* support value without mask*/
+ priv->mask = 0xffffffff;
}
return 0;
--
2.7.4
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
2020-06-23 5:29 [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property Bin Meng
2020-06-23 5:29 ` [PATCH 2/5] sysreset: syscon: Support value property Bin Meng
@ 2020-06-23 5:29 ` Bin Meng
2020-06-25 17:14 ` Sagar Kadam
2020-06-26 6:27 ` Pragnesh Patel
2020-06-23 5:29 ` [PATCH 4/5] riscv: qemu: Add syscon reboot and poweroff support Bin Meng
` (3 subsequent siblings)
5 siblings, 2 replies; 19+ messages in thread
From: Bin Meng @ 2020-06-23 5:29 UTC (permalink / raw)
To: u-boot
From: Bin Meng <bin.meng@windriver.com>
SYSRESET uclass driver already provides all the reset APIs, hence
exclude our own ad-hoc reset.c implementation.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
arch/riscv/lib/Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index b5e9324..6c503ff 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -20,7 +20,9 @@ obj-$(CONFIG_SBI) += sbi.o
obj-$(CONFIG_SBI_IPI) += sbi_ipi.o
endif
obj-y += interrupts.o
+ifeq ($(CONFIG_$(SPL_)SYSRESET),)
obj-y += reset.o
+endif
obj-y += setjmp.o
obj-$(CONFIG_$(SPL_)SMP) += smp.o
obj-$(CONFIG_SPL_BUILD) += spl.o
--
2.7.4
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 4/5] riscv: qemu: Add syscon reboot and poweroff support
2020-06-23 5:29 [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property Bin Meng
2020-06-23 5:29 ` [PATCH 2/5] sysreset: syscon: Support value property Bin Meng
2020-06-23 5:29 ` [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on Bin Meng
@ 2020-06-23 5:29 ` Bin Meng
2020-06-26 7:05 ` Pragnesh Patel
2020-06-23 5:29 ` [PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support Bin Meng
` (2 subsequent siblings)
5 siblings, 1 reply; 19+ messages in thread
From: Bin Meng @ 2020-06-23 5:29 UTC (permalink / raw)
To: u-boot
From: Bin Meng <bin.meng@windriver.com>
This adds syscon reboot and poweroff support to QEMU RISC-V.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
board/emulation/qemu-riscv/Kconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig
index ad99b08..617c4aa 100644
--- a/board/emulation/qemu-riscv/Kconfig
+++ b/board/emulation/qemu-riscv/Kconfig
@@ -53,5 +53,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy
imply NVME
imply SPL_RAM_SUPPORT
imply SPL_RAM_DEVICE
+ imply SYSRESET
+ imply SYSRESET_SYSCON
+ imply CMD_POWEROFF
+ imply SYSRESET_CMD_POWEROFF
endif
--
2.7.4
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support
2020-06-23 5:29 [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property Bin Meng
` (2 preceding siblings ...)
2020-06-23 5:29 ` [PATCH 4/5] riscv: qemu: Add syscon reboot and poweroff support Bin Meng
@ 2020-06-23 5:29 ` Bin Meng
2020-06-26 4:10 ` Sagar Kadam
2020-06-26 7:07 ` Pragnesh Patel
2020-06-26 1:43 ` [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property Simon Glass
2020-06-26 5:53 ` Pragnesh Patel
5 siblings, 2 replies; 19+ messages in thread
From: Bin Meng @ 2020-06-23 5:29 UTC (permalink / raw)
To: u-boot
From: Bin Meng <bin.meng@windriver.com>
The HiFive Unleashed board wires GPIO pin#10 to the input of the
system reset signal. This adds gpio reboot support.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
board/sifive/fu540/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
index 86193d7..6f65681 100644
--- a/board/sifive/fu540/Kconfig
+++ b/board/sifive/fu540/Kconfig
@@ -65,5 +65,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
imply SMP
imply MISC
imply SIFIVE_OTP
+ imply SYSRESET
+ imply SYSRESET_GPIO
endif
--
2.7.4
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
2020-06-23 5:29 ` [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on Bin Meng
@ 2020-06-25 17:14 ` Sagar Kadam
2020-06-26 1:56 ` Bin Meng
2020-06-26 6:27 ` Pragnesh Patel
1 sibling, 1 reply; 19+ messages in thread
From: Sagar Kadam @ 2020-06-25 17:14 UTC (permalink / raw)
To: u-boot
Hello Bin,
> -----Original Message-----
> From: Bin Meng <bmeng.cn@gmail.com>
> Sent: Tuesday, June 23, 2020 11:00 AM
> To: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
> Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
> <sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
> Cc: Bin Meng <bin.meng@windriver.com>
> Subject: [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
>
> [External Email] Do not click links or attachments unless you recognize the
> sender and know the content is safe
>
> From: Bin Meng <bin.meng@windriver.com>
>
> SYSRESET uclass driver already provides all the reset APIs, hence
> exclude our own ad-hoc reset.c implementation.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> ---
>
> arch/riscv/lib/Makefile | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
> index b5e9324..6c503ff 100644
> --- a/arch/riscv/lib/Makefile
> +++ b/arch/riscv/lib/Makefile
> @@ -20,7 +20,9 @@ obj-$(CONFIG_SBI) += sbi.o
> obj-$(CONFIG_SBI_IPI) += sbi_ipi.o
> endif
> obj-y += interrupts.o
> +ifeq ($(CONFIG_$(SPL_)SYSRESET),)
> obj-y += reset.o
> +endif
I could see reset get's built when SYSRESET in enabled
CC spl/arch/riscv/lib/interrupts.o
CC spl/arch/riscv/lib/reset.o
AS spl/arch/riscv/lib/setjmp.o
Should this have been?
ifneq ($(CONFIG_$(SPL_)SYSRESET),)
Thanks & BR,
Sagar
> obj-y += setjmp.o
> obj-$(CONFIG_$(SPL_)SMP) += smp.o
> obj-$(CONFIG_SPL_BUILD) += spl.o
> --
> 2.7.4
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property
2020-06-23 5:29 [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property Bin Meng
` (3 preceding siblings ...)
2020-06-23 5:29 ` [PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support Bin Meng
@ 2020-06-26 1:43 ` Simon Glass
2020-06-26 5:53 ` Pragnesh Patel
5 siblings, 0 replies; 19+ messages in thread
From: Simon Glass @ 2020-06-26 1:43 UTC (permalink / raw)
To: u-boot
On Mon, 22 Jun 2020 at 23:30, Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> Per the DT binding, <offset> is a required property. Let's abort
> the probe if it is missing. For the <mask> property, current codes
> assume a default value of zero, which is not correct either.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> ---
>
> drivers/sysreset/sysreset_syscon.c | 14 ++++++++++++--
> 1 file changed, 12 insertions(+), 2 deletions(-)
>
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 2/5] sysreset: syscon: Support value property
2020-06-23 5:29 ` [PATCH 2/5] sysreset: syscon: Support value property Bin Meng
@ 2020-06-26 1:43 ` Simon Glass
2020-06-26 6:12 ` Pragnesh Patel
1 sibling, 0 replies; 19+ messages in thread
From: Simon Glass @ 2020-06-26 1:43 UTC (permalink / raw)
To: u-boot
On Mon, 22 Jun 2020 at 23:30, Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> Per the DT binding, <mask> and <value> property can have either one
> or both, and if <value> is missing, <mask> should be used, which is
> what current U-Boot sysreset_syscon driver supports.
>
> This adds support to the <value> property to the driver, and <mask>
> semantics is updated to really be a mask to the value if both exist.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> ---
>
> drivers/sysreset/sysreset_syscon.c | 22 +++++++++++++++++-----
> 1 file changed, 17 insertions(+), 5 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
2020-06-25 17:14 ` Sagar Kadam
@ 2020-06-26 1:56 ` Bin Meng
2020-06-26 4:17 ` Sagar Kadam
0 siblings, 1 reply; 19+ messages in thread
From: Bin Meng @ 2020-06-26 1:56 UTC (permalink / raw)
To: u-boot
Hi Sagar,
On Fri, Jun 26, 2020 at 1:14 AM Sagar Kadam <sagar.kadam@sifive.com> wrote:
>
> Hello Bin,
>
> > -----Original Message-----
> > From: Bin Meng <bmeng.cn@gmail.com>
> > Sent: Tuesday, June 23, 2020 11:00 AM
> > To: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
> > Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
> > <sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
> > Cc: Bin Meng <bin.meng@windriver.com>
> > Subject: [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
> >
> > [External Email] Do not click links or attachments unless you recognize the
> > sender and know the content is safe
> >
> > From: Bin Meng <bin.meng@windriver.com>
> >
> > SYSRESET uclass driver already provides all the reset APIs, hence
> > exclude our own ad-hoc reset.c implementation.
> >
> > Signed-off-by: Bin Meng <bin.meng@windriver.com>
> > ---
> >
> > arch/riscv/lib/Makefile | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
> > index b5e9324..6c503ff 100644
> > --- a/arch/riscv/lib/Makefile
> > +++ b/arch/riscv/lib/Makefile
> > @@ -20,7 +20,9 @@ obj-$(CONFIG_SBI) += sbi.o
> > obj-$(CONFIG_SBI_IPI) += sbi_ipi.o
> > endif
> > obj-y += interrupts.o
> > +ifeq ($(CONFIG_$(SPL_)SYSRESET),)
> > obj-y += reset.o
> > +endif
>
> I could see reset get's built when SYSRESET in enabled
> CC spl/arch/riscv/lib/interrupts.o
> CC spl/arch/riscv/lib/reset.o
> AS spl/arch/riscv/lib/setjmp.o
>
This is because we don't enable CONFIG_SPL_SYSRESET in the board
config. For SPL, normally we don't need to reset.
> Should this have been?
> ifneq ($(CONFIG_$(SPL_)SYSRESET),)
>
Regards,
Bin
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support
2020-06-23 5:29 ` [PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support Bin Meng
@ 2020-06-26 4:10 ` Sagar Kadam
2020-06-26 7:07 ` Pragnesh Patel
1 sibling, 0 replies; 19+ messages in thread
From: Sagar Kadam @ 2020-06-26 4:10 UTC (permalink / raw)
To: u-boot
Hi,
> -----Original Message-----
> From: Bin Meng <bmeng.cn@gmail.com>
> Sent: Tuesday, June 23, 2020 11:00 AM
> To: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
> Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
> <sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
> Cc: Bin Meng <bin.meng@windriver.com>
> Subject: [PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support
>
> [External Email] Do not click links or attachments unless you recognize the
> sender and know the content is safe
>
> From: Bin Meng <bin.meng@windriver.com>
>
> The HiFive Unleashed board wires GPIO pin#10 to the input of the system
> reset signal. This adds gpio reboot support.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> ---
>
> board/sifive/fu540/Kconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig index
> 86193d7..6f65681 100644
> --- a/board/sifive/fu540/Kconfig
> +++ b/board/sifive/fu540/Kconfig
> @@ -65,5 +65,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
> imply SMP
> imply MISC
> imply SIFIVE_OTP
> + imply SYSRESET
> + imply SYSRESET_GPIO
>
Looks Good.
Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com>
Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
> endif
> --
> 2.7.4
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
2020-06-26 1:56 ` Bin Meng
@ 2020-06-26 4:17 ` Sagar Kadam
0 siblings, 0 replies; 19+ messages in thread
From: Sagar Kadam @ 2020-06-26 4:17 UTC (permalink / raw)
To: u-boot
Hi Bin,
> -----Original Message-----
> From: Bin Meng <bmeng.cn@gmail.com>
> Sent: Friday, June 26, 2020 7:26 AM
> To: Sagar Kadam <sagar.kadam@sifive.com>
> Cc: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
> Pragnesh Patel <pragnesh.patel@sifive.com>; U-Boot Mailing List <u-
> boot at lists.denx.de>; Bin Meng <bin.meng@windriver.com>
> Subject: Re: [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
>
> [External Email] Do not click links or attachments unless you recognize the
> sender and know the content is safe
>
> Hi Sagar,
>
> On Fri, Jun 26, 2020 at 1:14 AM Sagar Kadam <sagar.kadam@sifive.com>
> wrote:
> >
> > Hello Bin,
> >
> > > -----Original Message-----
> > > From: Bin Meng <bmeng.cn@gmail.com>
> > > Sent: Tuesday, June 23, 2020 11:00 AM
> > > To: Rick Chen <rick@andestech.com>; Simon Glass
> <sjg@chromium.org>;
> > > Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
> > > <sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
> > > Cc: Bin Meng <bin.meng@windriver.com>
> > > Subject: [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
> > >
> > > [External Email] Do not click links or attachments unless you
> > > recognize the sender and know the content is safe
> > >
> > > From: Bin Meng <bin.meng@windriver.com>
> > >
> > > SYSRESET uclass driver already provides all the reset APIs, hence
> > > exclude our own ad-hoc reset.c implementation.
> > >
> > > Signed-off-by: Bin Meng <bin.meng@windriver.com>
> > > ---
> > >
> > > arch/riscv/lib/Makefile | 2 ++
> > > 1 file changed, 2 insertions(+)
> > >
> > > diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index
> > > b5e9324..6c503ff 100644
> > > --- a/arch/riscv/lib/Makefile
> > > +++ b/arch/riscv/lib/Makefile
> > > @@ -20,7 +20,9 @@ obj-$(CONFIG_SBI) += sbi.o
> > > obj-$(CONFIG_SBI_IPI) += sbi_ipi.o
> > > endif
> > > obj-y += interrupts.o
> > > +ifeq ($(CONFIG_$(SPL_)SYSRESET),)
> > > obj-y += reset.o
> > > +endif
> >
> > I could see reset get's built when SYSRESET in enabled
> > CC spl/arch/riscv/lib/interrupts.o
> > CC spl/arch/riscv/lib/reset.o
> > AS spl/arch/riscv/lib/setjmp.o
> >
>
> This is because we don't enable CONFIG_SPL_SYSRESET in the board config.
> For SPL, normally we don't need to reset.
>
Ok. Thanks for clarifying.
Looks good.
> > Should this have been?
> > ifneq ($(CONFIG_$(SPL_)SYSRESET),)
> >
>
> Regards,
> Bin
Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property
2020-06-23 5:29 [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property Bin Meng
` (4 preceding siblings ...)
2020-06-26 1:43 ` [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property Simon Glass
@ 2020-06-26 5:53 ` Pragnesh Patel
2020-07-17 6:54 ` Bin Meng
5 siblings, 1 reply; 19+ messages in thread
From: Pragnesh Patel @ 2020-06-26 5:53 UTC (permalink / raw)
To: u-boot
>-----Original Message-----
>From: Bin Meng <bmeng.cn@gmail.com>
>Sent: 23 June 2020 11:00
>To: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
>Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
><sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
>Cc: Bin Meng <bin.meng@windriver.com>
>Subject: [PATCH 1/5] sysreset: syscon: Don't assume default value for offset
>and mask property
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>From: Bin Meng <bin.meng@windriver.com>
>
>Per the DT binding, <offset> is a required property. Let's abort the probe if it is
>missing. For the <mask> property, current codes assume a default value of
>zero, which is not correct either.
>
>Signed-off-by: Bin Meng <bin.meng@windriver.com>
>---
>
> drivers/sysreset/sysreset_syscon.c | 14 ++++++++++++--
> 1 file changed, 12 insertions(+), 2 deletions(-)
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 2/5] sysreset: syscon: Support value property
2020-06-23 5:29 ` [PATCH 2/5] sysreset: syscon: Support value property Bin Meng
2020-06-26 1:43 ` Simon Glass
@ 2020-06-26 6:12 ` Pragnesh Patel
1 sibling, 0 replies; 19+ messages in thread
From: Pragnesh Patel @ 2020-06-26 6:12 UTC (permalink / raw)
To: u-boot
>-----Original Message-----
>From: Bin Meng <bmeng.cn@gmail.com>
>Sent: 23 June 2020 11:00
>To: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
>Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
><sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
>Cc: Bin Meng <bin.meng@windriver.com>
>Subject: [PATCH 2/5] sysreset: syscon: Support value property
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>From: Bin Meng <bin.meng@windriver.com>
>
>Per the DT binding, <mask> and <value> property can have either one or
>both, and if <value> is missing, <mask> should be used, which is what current
>U-Boot sysreset_syscon driver supports.
>
>This adds support to the <value> property to the driver, and <mask>
>semantics is updated to really be a mask to the value if both exist.
>
>Signed-off-by: Bin Meng <bin.meng@windriver.com>
>---
>
> drivers/sysreset/sysreset_syscon.c | 22 +++++++++++++++++-----
> 1 file changed, 17 insertions(+), 5 deletions(-)
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
2020-06-23 5:29 ` [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on Bin Meng
2020-06-25 17:14 ` Sagar Kadam
@ 2020-06-26 6:27 ` Pragnesh Patel
1 sibling, 0 replies; 19+ messages in thread
From: Pragnesh Patel @ 2020-06-26 6:27 UTC (permalink / raw)
To: u-boot
>-----Original Message-----
>From: Bin Meng <bmeng.cn@gmail.com>
>Sent: 23 June 2020 11:00
>To: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
>Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
><sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
>Cc: Bin Meng <bin.meng@windriver.com>
>Subject: [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>From: Bin Meng <bin.meng@windriver.com>
>
>SYSRESET uclass driver already provides all the reset APIs, hence exclude our
>own ad-hoc reset.c implementation.
>
>Signed-off-by: Bin Meng <bin.meng@windriver.com>
>---
>
> arch/riscv/lib/Makefile | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 4/5] riscv: qemu: Add syscon reboot and poweroff support
2020-06-23 5:29 ` [PATCH 4/5] riscv: qemu: Add syscon reboot and poweroff support Bin Meng
@ 2020-06-26 7:05 ` Pragnesh Patel
0 siblings, 0 replies; 19+ messages in thread
From: Pragnesh Patel @ 2020-06-26 7:05 UTC (permalink / raw)
To: u-boot
>-----Original Message-----
>From: Bin Meng <bmeng.cn@gmail.com>
>Sent: 23 June 2020 11:00
>To: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
>Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
><sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
>Cc: Bin Meng <bin.meng@windriver.com>
>Subject: [PATCH 4/5] riscv: qemu: Add syscon reboot and poweroff support
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>From: Bin Meng <bin.meng@windriver.com>
>
>This adds syscon reboot and poweroff support to QEMU RISC-V.
>
>Signed-off-by: Bin Meng <bin.meng@windriver.com>
>---
>
> board/emulation/qemu-riscv/Kconfig | 4 ++++
> 1 file changed, 4 insertions(+)
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support
2020-06-23 5:29 ` [PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support Bin Meng
2020-06-26 4:10 ` Sagar Kadam
@ 2020-06-26 7:07 ` Pragnesh Patel
1 sibling, 0 replies; 19+ messages in thread
From: Pragnesh Patel @ 2020-06-26 7:07 UTC (permalink / raw)
To: u-boot
>-----Original Message-----
>From: Bin Meng <bmeng.cn@gmail.com>
>Sent: 23 June 2020 11:00
>To: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
>Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
><sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
>Cc: Bin Meng <bin.meng@windriver.com>
>Subject: [PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>From: Bin Meng <bin.meng@windriver.com>
>
>The HiFive Unleashed board wires GPIO pin#10 to the input of the system
>reset signal. This adds gpio reboot support.
>
>Signed-off-by: Bin Meng <bin.meng@windriver.com>
>---
>
> board/sifive/fu540/Kconfig | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property
2020-06-26 5:53 ` Pragnesh Patel
@ 2020-07-17 6:54 ` Bin Meng
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FA4728D1C@ATCPCS16.andestech.com>
0 siblings, 1 reply; 19+ messages in thread
From: Bin Meng @ 2020-07-17 6:54 UTC (permalink / raw)
To: u-boot
Hi Rick,
On Fri, Jun 26, 2020 at 1:53 PM Pragnesh Patel
<pragnesh.patel@sifive.com> wrote:
>
> >-----Original Message-----
> >From: Bin Meng <bmeng.cn@gmail.com>
> >Sent: 23 June 2020 11:00
> >To: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
> >Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
> ><sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
> >Cc: Bin Meng <bin.meng@windriver.com>
> >Subject: [PATCH 1/5] sysreset: syscon: Don't assume default value for offset
> >and mask property
> >
> >[External Email] Do not click links or attachments unless you recognize the
> >sender and know the content is safe
> >
> >From: Bin Meng <bin.meng@windriver.com>
> >
> >Per the DT binding, <offset> is a required property. Let's abort the probe if it is
> >missing. For the <mask> property, current codes assume a default value of
> >zero, which is not correct either.
> >
> >Signed-off-by: Bin Meng <bin.meng@windriver.com>
> >---
> >
> > drivers/sysreset/sysreset_syscon.c | 14 ++++++++++++--
> > 1 file changed, 12 insertions(+), 2 deletions(-)
>
> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Would you please take the remaining 3 patches soon?
http://patchwork.ozlabs.org/project/uboot/list/?series=185161
Regards,
Bin
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FA4728D1C@ATCPCS16.andestech.com>
@ 2020-07-20 2:48 ` Rick Chen
2020-07-20 2:51 ` Bin Meng
0 siblings, 1 reply; 19+ messages in thread
From: Rick Chen @ 2020-07-20 2:48 UTC (permalink / raw)
To: u-boot
Hi Tom
> From: Bin Meng [mailto:bmeng.cn at gmail.com]
> Sent: Friday, July 17, 2020 2:54 PM
> To: Pragnesh Patel
> Cc: Bin Meng; Rick Jian-Zhi Chen(???); Simon Glass; U-Boot Mailing List; Sagar Kadam
> Subject: Re: [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property
>
> Hi Rick,
>
> On Fri, Jun 26, 2020 at 1:53 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote:
> >
> > >-----Original Message-----
> > >From: Bin Meng <bmeng.cn@gmail.com>
> > >Sent: 23 June 2020 11:00
> > >To: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
> > >Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
> > ><sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
> > >Cc: Bin Meng <bin.meng@windriver.com>
> > >Subject: [PATCH 1/5] sysreset: syscon: Don't assume default value for
> > >offset and mask property
> > >
> > >[External Email] Do not click links or attachments unless you
> > >recognize the sender and know the content is safe
> > >
> > >From: Bin Meng <bin.meng@windriver.com>
> > >
> > >Per the DT binding, <offset> is a required property. Let's abort the
> > >probe if it is missing. For the <mask> property, current codes assume
> > >a default value of zero, which is not correct either.
> > >
> > >Signed-off-by: Bin Meng <bin.meng@windriver.com>
> > >---
> > >
> > > drivers/sysreset/sysreset_syscon.c | 14 ++++++++++++--
> > > 1 file changed, 12 insertions(+), 2 deletions(-)
> >
> > Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
>
> Would you please take the remaining 3 patches soon?
> http://patchwork.ozlabs.org/project/uboot/list/?series=185161
May I ask for your opinions about these three SYSRESET patchs. If they
are OK to be pick up in my next PR, though they have been rejected in
previous riscv PR ?
https://www.mail-archive.com/u-boot at lists.denx.de/msg375465.html
Thanks,
Rick
>
> Regards,
> Bin
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property
2020-07-20 2:48 ` Rick Chen
@ 2020-07-20 2:51 ` Bin Meng
0 siblings, 0 replies; 19+ messages in thread
From: Bin Meng @ 2020-07-20 2:51 UTC (permalink / raw)
To: u-boot
Hi Rick,
On Mon, Jul 20, 2020 at 10:48 AM Rick Chen <rickchen36@gmail.com> wrote:
>
> Hi Tom
>
> > From: Bin Meng [mailto:bmeng.cn at gmail.com]
> > Sent: Friday, July 17, 2020 2:54 PM
> > To: Pragnesh Patel
> > Cc: Bin Meng; Rick Jian-Zhi Chen(???); Simon Glass; U-Boot Mailing List; Sagar Kadam
> > Subject: Re: [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property
> >
> > Hi Rick,
> >
> > On Fri, Jun 26, 2020 at 1:53 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote:
> > >
> > > >-----Original Message-----
> > > >From: Bin Meng <bmeng.cn@gmail.com>
> > > >Sent: 23 June 2020 11:00
> > > >To: Rick Chen <rick@andestech.com>; Simon Glass <sjg@chromium.org>;
> > > >Pragnesh Patel <pragnesh.patel@sifive.com>; Sagar Kadam
> > > ><sagar.kadam@sifive.com>; U-Boot Mailing List <u-boot@lists.denx.de>
> > > >Cc: Bin Meng <bin.meng@windriver.com>
> > > >Subject: [PATCH 1/5] sysreset: syscon: Don't assume default value for
> > > >offset and mask property
> > > >
> > > >[External Email] Do not click links or attachments unless you
> > > >recognize the sender and know the content is safe
> > > >
> > > >From: Bin Meng <bin.meng@windriver.com>
> > > >
> > > >Per the DT binding, <offset> is a required property. Let's abort the
> > > >probe if it is missing. For the <mask> property, current codes assume
> > > >a default value of zero, which is not correct either.
> > > >
> > > >Signed-off-by: Bin Meng <bin.meng@windriver.com>
> > > >---
> > > >
> > > > drivers/sysreset/sysreset_syscon.c | 14 ++++++++++++--
> > > > 1 file changed, 12 insertions(+), 2 deletions(-)
> > >
> > > Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> >
> > Would you please take the remaining 3 patches soon?
> > http://patchwork.ozlabs.org/project/uboot/list/?series=185161
>
> May I ask for your opinions about these three SYSRESET patchs. If they
> are OK to be pick up in my next PR, though they have been rejected in
> previous riscv PR ?
> https://www.mail-archive.com/u-boot at lists.denx.de/msg375465.html
>
Now the merge window for v2020.10 is open. It's OK to merge this now.
Regards,
Bin
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2020-07-20 2:51 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-06-23 5:29 [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property Bin Meng
2020-06-23 5:29 ` [PATCH 2/5] sysreset: syscon: Support value property Bin Meng
2020-06-26 1:43 ` Simon Glass
2020-06-26 6:12 ` Pragnesh Patel
2020-06-23 5:29 ` [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on Bin Meng
2020-06-25 17:14 ` Sagar Kadam
2020-06-26 1:56 ` Bin Meng
2020-06-26 4:17 ` Sagar Kadam
2020-06-26 6:27 ` Pragnesh Patel
2020-06-23 5:29 ` [PATCH 4/5] riscv: qemu: Add syscon reboot and poweroff support Bin Meng
2020-06-26 7:05 ` Pragnesh Patel
2020-06-23 5:29 ` [PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support Bin Meng
2020-06-26 4:10 ` Sagar Kadam
2020-06-26 7:07 ` Pragnesh Patel
2020-06-26 1:43 ` [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property Simon Glass
2020-06-26 5:53 ` Pragnesh Patel
2020-07-17 6:54 ` Bin Meng
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FA4728D1C@ATCPCS16.andestech.com>
2020-07-20 2:48 ` Rick Chen
2020-07-20 2:51 ` Bin Meng
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