* [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT
@ 2018-07-03 9:48 Bin Meng
2018-07-03 9:48 ` [U-Boot] [PATCH 2/4] dm: sysreset: x86: Add a sysreset driver Bin Meng
` (3 more replies)
0 siblings, 4 replies; 13+ messages in thread
From: Bin Meng @ 2018-07-03 9:48 UTC (permalink / raw)
To: u-boot
This adds full reset bit in the reset register value in the ACPI FADT
table, so that kernel can do a thorough reboot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
arch/x86/cpu/quark/acpi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c
index 4a02720..7b6fc2f 100644
--- a/arch/x86/cpu/quark/acpi.c
+++ b/arch/x86/cpu/quark/acpi.c
@@ -67,7 +67,7 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
fadt->reset_reg.addrl = IO_PORT_RESET;
fadt->reset_reg.addrh = 0;
- fadt->reset_value = SYS_RST | RST_CPU;
+ fadt->reset_value = SYS_RST | RST_CPU | FULL_RST;
fadt->x_firmware_ctl_l = (u32)facs;
fadt->x_firmware_ctl_h = 0;
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 2/4] dm: sysreset: x86: Add a sysreset driver
2018-07-03 9:48 [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT Bin Meng
@ 2018-07-03 9:48 ` Bin Meng
2018-07-09 2:39 ` Simon Glass
2018-07-03 9:48 ` [U-Boot] [PATCH 3/4] x86: fsp: Eliminate the reset_cpu() call Bin Meng
` (2 subsequent siblings)
3 siblings, 1 reply; 13+ messages in thread
From: Bin Meng @ 2018-07-03 9:48 UTC (permalink / raw)
To: u-boot
This adds a generic reset driver for x86 processor.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
drivers/sysreset/Kconfig | 6 +++++
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_x86.c | 49 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 56 insertions(+)
create mode 100644 drivers/sysreset/sysreset_x86.c
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index a6d48e8..2afeadc 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -37,4 +37,10 @@ config SYSRESET_WATCHDOG
help
Reboot support for generic watchdog reset.
+config SYSRESET_X86
+ bool "Enable support for x86 processor reboot driver"
+ depends on X86
+ help
+ Reboot support for generic x86 processor reset.
+
endmenu
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 0da58a1..0eb0dc7 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
+obj-$(CONFIG_SYSRESET_X86) += sysreset_x86.o
obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c
new file mode 100644
index 0000000..5943a63
--- /dev/null
+++ b/drivers/sysreset/sysreset_x86.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Generic reset driver for x86 processor
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+
+static int x86_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ int value;
+
+ switch (type) {
+ case SYSRESET_WARM:
+ value = SYS_RST | RST_CPU;
+ break;
+ case SYSRESET_COLD:
+ value = SYS_RST | RST_CPU | FULL_RST;
+ break;
+ default:
+ return -ENOSYS;
+ }
+
+ outb(value, IO_PORT_RESET);
+
+ return -EINPROGRESS;
+}
+
+static const struct udevice_id x86_sysreset_ids[] = {
+ { .compatible = "x86,reset" },
+ { }
+};
+
+static struct sysreset_ops x86_sysreset_ops = {
+ .request = x86_sysreset_request,
+};
+
+U_BOOT_DRIVER(x86_sysreset) = {
+ .name = "x86-sysreset",
+ .id = UCLASS_SYSRESET,
+ .of_match = x86_sysreset_ids,
+ .ops = &x86_sysreset_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 3/4] x86: fsp: Eliminate the reset_cpu() call
2018-07-03 9:48 [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT Bin Meng
2018-07-03 9:48 ` [U-Boot] [PATCH 2/4] dm: sysreset: x86: Add a sysreset driver Bin Meng
@ 2018-07-03 9:48 ` Bin Meng
2018-07-09 2:39 ` Simon Glass
2018-07-03 9:48 ` [U-Boot] [PATCH 4/4] x86: Switch to use DM sysreset driver Bin Meng
2018-07-09 2:39 ` [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT Simon Glass
3 siblings, 1 reply; 13+ messages in thread
From: Bin Meng @ 2018-07-03 9:48 UTC (permalink / raw)
To: u-boot
In preparation for the reset driver conversion, eliminate the
reset_cpu() call in the FSP init path as it's too early for the
reset driver to work.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
arch/x86/lib/fsp/fsp_common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index b4ba129..d5ed1d5 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -132,7 +132,7 @@ int arch_fsp_init(void)
chipset_clear_sleep_state();
/* Reboot */
debug("Rebooting..\n");
- reset_cpu(0);
+ outb(SYS_RST | RST_CPU, IO_PORT_RESET);
/* Should not reach here.. */
panic("Reboot System");
}
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 4/4] x86: Switch to use DM sysreset driver
2018-07-03 9:48 [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT Bin Meng
2018-07-03 9:48 ` [U-Boot] [PATCH 2/4] dm: sysreset: x86: Add a sysreset driver Bin Meng
2018-07-03 9:48 ` [U-Boot] [PATCH 3/4] x86: fsp: Eliminate the reset_cpu() call Bin Meng
@ 2018-07-03 9:48 ` Bin Meng
2018-07-03 10:42 ` Andy Shevchenko
2018-07-09 2:39 ` [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT Simon Glass
3 siblings, 1 reply; 13+ messages in thread
From: Bin Meng @ 2018-07-03 9:48 UTC (permalink / raw)
To: u-boot
This converts all x86 boards over to DM sysreset.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
arch/Kconfig | 2 ++
arch/x86/cpu/baytrail/valleyview.c | 6 ------
arch/x86/cpu/braswell/braswell.c | 6 ------
arch/x86/cpu/cpu.c | 26 --------------------------
arch/x86/cpu/ivybridge/early_me.c | 7 ++++---
arch/x86/cpu/ivybridge/sdram.c | 3 ++-
arch/x86/cpu/qemu/qemu.c | 6 ------
arch/x86/cpu/quark/quark.c | 6 ------
arch/x86/cpu/tangier/tangier.c | 8 ++++++++
arch/x86/dts/bayleybay.dts | 1 +
arch/x86/dts/baytrail_som-db5800-som-6867.dts | 1 +
arch/x86/dts/broadwell_som-6896.dts | 1 +
arch/x86/dts/cherryhill.dts | 1 +
arch/x86/dts/chromebook_link.dts | 1 +
arch/x86/dts/chromebook_samus.dts | 1 +
arch/x86/dts/chromebox_panther.dts | 1 +
arch/x86/dts/conga-qeval20-qa3-e3845.dts | 1 +
arch/x86/dts/cougarcanyon2.dts | 1 +
arch/x86/dts/crownbay.dts | 1 +
arch/x86/dts/dfi-bt700.dtsi | 1 +
arch/x86/dts/edison.dts | 1 +
arch/x86/dts/efi-x86_payload.dts | 1 +
arch/x86/dts/galileo.dts | 1 +
arch/x86/dts/minnowmax.dts | 1 +
arch/x86/dts/qemu-x86_i440fx.dts | 1 +
arch/x86/dts/qemu-x86_q35.dts | 1 +
arch/x86/dts/reset.dtsi | 6 ++++++
arch/x86/include/asm/processor.h | 5 -----
arch/x86/include/asm/u-boot-x86.h | 1 -
configs/chromebook_link64_defconfig | 1 +
configs/edison_defconfig | 1 +
configs/efi-x86_app_defconfig | 1 +
32 files changed, 42 insertions(+), 60 deletions(-)
create mode 100644 arch/x86/dts/reset.dtsi
diff --git a/arch/Kconfig b/arch/Kconfig
index dd5a887..cbeb9f6 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -118,6 +118,8 @@ config X86
imply DM_SPI_FLASH
imply DM_USB
imply DM_VIDEO
+ imply SYSRESET
+ imply SYSRESET_X86
imply CMD_FPGA_LOADMK
imply CMD_GETTIME
imply CMD_IO
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index b7d481a..8882a76 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -55,9 +55,3 @@ int arch_misc_init(void)
return 0;
}
-
-void reset_cpu(ulong addr)
-{
- /* cold reset */
- x86_full_reset();
-}
diff --git a/arch/x86/cpu/braswell/braswell.c b/arch/x86/cpu/braswell/braswell.c
index 32a6a5e..7a83b06 100644
--- a/arch/x86/cpu/braswell/braswell.c
+++ b/arch/x86/cpu/braswell/braswell.c
@@ -27,9 +27,3 @@ int arch_misc_init(void)
return 0;
}
-
-void reset_cpu(ulong addr)
-{
- /* cold reset */
- x86_full_reset();
-}
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 3a45677..395f845 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -76,37 +76,11 @@ int x86_init_cache(void)
}
int init_cache(void) __attribute__((weak, alias("x86_init_cache")));
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- printf("resetting ...\n");
-
- /* wait 50 ms */
- udelay(50000);
- disable_interrupts();
- reset_cpu(0);
-
- /*NOTREACHED*/
- return 0;
-}
-
void flush_cache(unsigned long dummy1, unsigned long dummy2)
{
asm("wbinvd\n");
}
-__weak void reset_cpu(ulong addr)
-{
- /* Do a hard reset through the chipset's reset control register */
- outb(SYS_RST | RST_CPU, IO_PORT_RESET);
- for (;;)
- cpu_hlt();
-}
-
-void x86_full_reset(void)
-{
- outb(FULL_RST | SYS_RST | RST_CPU, IO_PORT_RESET);
-}
-
/* Define these functions to allow ehch-hcd to function */
void flush_dcache_range(unsigned long start, unsigned long stop)
{
diff --git a/arch/x86/cpu/ivybridge/early_me.c b/arch/x86/cpu/ivybridge/early_me.c
index 1a15229..219d5be 100644
--- a/arch/x86/cpu/ivybridge/early_me.c
+++ b/arch/x86/cpu/ivybridge/early_me.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <dm.h>
#include <errno.h>
+#include <sysreset.h>
#include <asm/pci.h>
#include <asm/cpu.h>
#include <asm/processor.h>
@@ -138,17 +139,17 @@ int intel_early_me_init_done(struct udevice *dev, struct udevice *me_dev,
case ME_HFS_ACK_RESET:
/* Non-power cycle reset */
set_global_reset(dev, 0);
- reset_cpu(0);
+ sysreset_walk_halt(SYSRESET_COLD);
break;
case ME_HFS_ACK_PWR_CYCLE:
/* Power cycle reset */
set_global_reset(dev, 0);
- x86_full_reset();
+ sysreset_walk_halt(SYSRESET_COLD);
break;
case ME_HFS_ACK_GBL_RESET:
/* Global reset */
set_global_reset(dev, 1);
- x86_full_reset();
+ sysreset_walk_halt(SYSRESET_COLD);
break;
case ME_HFS_ACK_S3:
case ME_HFS_ACK_S4:
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index 2f253e8..8a58d03 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -18,6 +18,7 @@
#include <spi.h>
#include <spi_flash.h>
#include <syscon.h>
+#include <sysreset.h>
#include <asm/cpu.h>
#include <asm/processor.h>
#include <asm/gpio.h>
@@ -497,7 +498,7 @@ int dram_init(void)
/* If MRC data is not found we cannot continue S3 resume. */
if (pei_data->boot_mode == PEI_BOOT_RESUME && !pei_data->mrc_input) {
debug("Giving up in sdram_initialize: No MRC data\n");
- reset_cpu(0);
+ sysreset_walk_halt(SYSRESET_COLD);
}
/* Pass console handler in pei_data */
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index ca4b3f0..5e8b4f0 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -156,12 +156,6 @@ int print_cpuinfo(void)
}
#endif
-void reset_cpu(ulong addr)
-{
- /* cold reset */
- x86_full_reset();
-}
-
int arch_early_init_r(void)
{
qemu_chipset_init();
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 4fd6864..d39edb2 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -270,12 +270,6 @@ int print_cpuinfo(void)
return default_print_cpuinfo();
}
-void reset_cpu(ulong addr)
-{
- /* cold reset */
- x86_full_reset();
-}
-
static void quark_pcie_init(void)
{
u32 val;
diff --git a/arch/x86/cpu/tangier/tangier.c b/arch/x86/cpu/tangier/tangier.c
index 0a15e64..4b623bb 100644
--- a/arch/x86/cpu/tangier/tangier.c
+++ b/arch/x86/cpu/tangier/tangier.c
@@ -25,7 +25,15 @@ int print_cpuinfo(void)
return default_print_cpuinfo();
}
+/* TODO: convert to DM sysreset */
void reset_cpu(ulong addr)
{
scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
}
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ reset_cpu(0);
+
+ return 0;
+}
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 74291a8..9683c52 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -12,6 +12,7 @@
/include/ "skeleton.dtsi"
/include/ "keyboard.dtsi"
/include/ "serial.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
/include/ "coreboot_fb.dtsi"
diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
index 36e6069..4e8a761 100644
--- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts
+++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
@@ -12,6 +12,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts
index 3966199..ec691f1 100644
--- a/arch/x86/dts/broadwell_som-6896.dts
+++ b/arch/x86/dts/broadwell_som-6896.dts
@@ -2,6 +2,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
/include/ "coreboot_fb.dtsi"
diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts
index 3e29683..39e2d2f 100644
--- a/arch/x86/dts/cherryhill.dts
+++ b/arch/x86/dts/cherryhill.dts
@@ -10,6 +10,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index 26b9f85..115a088 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -5,6 +5,7 @@
/include/ "skeleton.dtsi"
/include/ "keyboard.dtsi"
/include/ "serial.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
/include/ "coreboot_fb.dtsi"
diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts
index 52a9ea6..9c48c9a 100644
--- a/arch/x86/dts/chromebook_samus.dts
+++ b/arch/x86/dts/chromebook_samus.dts
@@ -5,6 +5,7 @@
/include/ "skeleton.dtsi"
/include/ "keyboard.dtsi"
/include/ "serial.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
/include/ "coreboot_fb.dtsi"
diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index b25c919..a72a85e 100644
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -2,6 +2,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
/include/ "coreboot_fb.dtsi"
diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
index c3d1514..5884dbc 100644
--- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts
+++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
@@ -12,6 +12,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts
index c1cda73..9801790 100644
--- a/arch/x86/dts/cougarcanyon2.dts
+++ b/arch/x86/dts/cougarcanyon2.dts
@@ -10,6 +10,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "keyboard.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index d8faa9d..2ffcc5f 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -10,6 +10,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "keyboard.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi
index cb96fdf..51d33e7 100644
--- a/arch/x86/dts/dfi-bt700.dtsi
+++ b/arch/x86/dts/dfi-bt700.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-router/intel-irq.h>
#include "skeleton.dtsi"
+#include "reset.dtsi"
#include "rtc.dtsi"
#include "tsc_timer.dtsi"
diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts
index 9033532..a1d3c90 100644
--- a/arch/x86/dts/edison.dts
+++ b/arch/x86/dts/edison.dts
@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-router/intel-irq.h>
/include/ "skeleton.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
diff --git a/arch/x86/dts/efi-x86_payload.dts b/arch/x86/dts/efi-x86_payload.dts
index 148b587..19f2530 100644
--- a/arch/x86/dts/efi-x86_payload.dts
+++ b/arch/x86/dts/efi-x86_payload.dts
@@ -10,6 +10,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "keyboard.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index 3454abd..3a5d168 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-router/intel-irq.h>
/include/ "skeleton.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 42ba0c7..02ab4c1 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -11,6 +11,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
/include/ "coreboot_fb.dtsi"
diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts
index 6565429..2e5210d 100644
--- a/arch/x86/dts/qemu-x86_i440fx.dts
+++ b/arch/x86/dts/qemu-x86_i440fx.dts
@@ -10,6 +10,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "keyboard.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index f1c4cb9..e8f55b1 100644
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -20,6 +20,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "keyboard.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
diff --git a/arch/x86/dts/reset.dtsi b/arch/x86/dts/reset.dtsi
new file mode 100644
index 0000000..f979d83
--- /dev/null
+++ b/arch/x86/dts/reset.dtsi
@@ -0,0 +1,6 @@
+/ {
+ reset {
+ compatible = "x86,reset";
+ u-boot,dm-pre-reloc;
+ };
+};
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index dd957d2..f1d9977 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -43,11 +43,6 @@ enum {
FULL_RST = 1 << 3, /* full power cycle */
};
-/**
- * x86_full_reset() - reset everything: perform a full power cycle
- */
-void x86_full_reset(void);
-
static inline __attribute__((always_inline)) void cpu_hlt(void)
{
asm("hlt");
diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
index 2340ef8..670fcdc 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -40,7 +40,6 @@ int x86_cleanup_before_linux(void);
void x86_enable_caches(void);
void x86_disable_caches(void);
int x86_init_cache(void);
-void reset_cpu(ulong addr);
ulong board_get_usable_ram_top(ulong total_size);
int default_print_cpuinfo(void);
diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig
index 59b6bd0..9af2c4d 100644
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -4,6 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
diff --git a/configs/edison_defconfig b/configs/edison_defconfig
index 54305fc..d3d8816 100644
--- a/configs/edison_defconfig
+++ b/configs/edison_defconfig
@@ -32,6 +32,7 @@ CONFIG_CPU=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DM_PCI_COMPAT=y
+# CONFIG_SYSRESET is not set
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Intel"
diff --git a/configs/efi-x86_app_defconfig b/configs/efi-x86_app_defconfig
index 9c1d5e7..7fba2be 100644
--- a/configs/efi-x86_app_defconfig
+++ b/configs/efi-x86_app_defconfig
@@ -30,6 +30,7 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_DM_ETH is not set
CONFIG_DEBUG_EFI_CONSOLE=y
+# CONFIG_SYSRESET is not set
# CONFIG_REGEX is not set
CONFIG_EFI=y
# CONFIG_EFI_LOADER is not set
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 4/4] x86: Switch to use DM sysreset driver
2018-07-03 9:48 ` [U-Boot] [PATCH 4/4] x86: Switch to use DM sysreset driver Bin Meng
@ 2018-07-03 10:42 ` Andy Shevchenko
2018-07-03 11:14 ` Wolfgang Denk
2018-07-03 14:59 ` Bin Meng
0 siblings, 2 replies; 13+ messages in thread
From: Andy Shevchenko @ 2018-07-03 10:42 UTC (permalink / raw)
To: u-boot
On Tue, 2018-07-03 at 02:48 -0700, Bin Meng wrote:
> This converts all x86 boards over to DM sysreset.
> -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const
> argv[])
> -{
> - printf("resetting ...\n");
> -
> - /* wait 50 ms */
> - udelay(50000);
> - disable_interrupts();
> - reset_cpu(0);
> -}
> --- a/arch/x86/cpu/tangier/tangier.c
> +++ b/arch/x86/cpu/tangier/tangier.c
> @@ -25,7 +25,15 @@ int print_cpuinfo(void)
> return default_print_cpuinfo();
> }
>
> +/* TODO: convert to DM sysreset */
> void reset_cpu(ulong addr)
> {
> scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
> }
> +
> +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const
> argv[])
> +{
> + reset_cpu(0);
> +
> + return 0;
This is not equivalent to the above.
First of all, in some cases would be good to have at least a debug
message that we got into do_reset().
Second, I didn't test if udelay() + disable_interrupts() make any
difference. So, I would leave them for now.
> +}
> diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts
> index 9033532..a1d3c90 100644
> --- a/arch/x86/dts/edison.dts
> +++ b/arch/x86/dts/edison.dts
> @@ -9,6 +9,7 @@
> #include <dt-bindings/interrupt-router/intel-irq.h>
>
> /include/ "skeleton.dtsi"
> +/include/ "reset.dtsi"
If i read this right we are not using generic reset sequence.
Why do we include this here?
> /include/ "rtc.dtsi"
> /include/ "tsc_timer.dtsi"
> --- a/configs/edison_defconfig
> +++ b/configs/edison_defconfig
> +# CONFIG_SYSRESET is not set
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 4/4] x86: Switch to use DM sysreset driver
2018-07-03 10:42 ` Andy Shevchenko
@ 2018-07-03 11:14 ` Wolfgang Denk
2018-07-03 14:59 ` Bin Meng
1 sibling, 0 replies; 13+ messages in thread
From: Wolfgang Denk @ 2018-07-03 11:14 UTC (permalink / raw)
To: u-boot
Dear Andy,
In message <18255ae55e4faa5733fb8e93dc8ebbc1559a3694.camel@linux.intel.com> you wrote:
...
> > This converts all x86 boards over to DM sysreset.
>
> > -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const
> > argv[])
> > -{
> > - printf("resetting ...\n");
> > -
> > - /* wait 50 ms */
> > - udelay(50000);
I am willing to bet that the delay here is a dirty surrogate for
flushing/closing the standard output channel, i. e. we wait until
the characters have actually been set over the serial console.
Don't we have a way to close() the device in DM (remove ?) ?
> First of all, in some cases would be good to have at least a debug
> message that we got into do_reset().
This should not only be a debug message, but a standard message;
actually even something that goes to STDERR.
> Second, I didn't test if udelay() + disable_interrupts() make any
> difference. So, I would leave them for now.
See above... I think the delay should be replaced by the proper way
to close the device in DM (remove?).
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
But the only way of discovering the limits of the possible is to
venture a little way past them into the impossible.
- _Profiles of the Future_ (1962; rev. 1973)
``Hazards of Prophecy: The Failure of Imagination''
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 4/4] x86: Switch to use DM sysreset driver
2018-07-03 10:42 ` Andy Shevchenko
2018-07-03 11:14 ` Wolfgang Denk
@ 2018-07-03 14:59 ` Bin Meng
1 sibling, 0 replies; 13+ messages in thread
From: Bin Meng @ 2018-07-03 14:59 UTC (permalink / raw)
To: u-boot
Hi Andy,
On Tue, Jul 3, 2018 at 6:42 PM, Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
> On Tue, 2018-07-03 at 02:48 -0700, Bin Meng wrote:
>> This converts all x86 boards over to DM sysreset.
>
>> -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const
>> argv[])
>> -{
>> - printf("resetting ...\n");
>> -
>> - /* wait 50 ms */
>> - udelay(50000);
>> - disable_interrupts();
>> - reset_cpu(0);
>
>> -}
>
>> --- a/arch/x86/cpu/tangier/tangier.c
>> +++ b/arch/x86/cpu/tangier/tangier.c
>> @@ -25,7 +25,15 @@ int print_cpuinfo(void)
>> return default_print_cpuinfo();
>> }
>>
>> +/* TODO: convert to DM sysreset */
>> void reset_cpu(ulong addr)
>> {
>> scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
>> }
>> +
>> +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const
>> argv[])
>> +{
>> + reset_cpu(0);
>> +
>> + return 0;
>
> This is not equivalent to the above.
>
> First of all, in some cases would be good to have at least a debug
> message that we got into do_reset().
>
> Second, I didn't test if udelay() + disable_interrupts() make any
> difference. So, I would leave them for now.
>
OK, will leave them in v2.
>> +}
>
>> diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts
>> index 9033532..a1d3c90 100644
>> --- a/arch/x86/dts/edison.dts
>> +++ b/arch/x86/dts/edison.dts
>> @@ -9,6 +9,7 @@
>> #include <dt-bindings/interrupt-router/intel-irq.h>
>>
>> /include/ "skeleton.dtsi"
>
>> +/include/ "reset.dtsi"
>
> If i read this right we are not using generic reset sequence.
> Why do we include this here?
>
This is a mistake. Will fix in v2.
BTW: do you have time to convert the tangier SoC reset driver to DM?
>> /include/ "rtc.dtsi"
>> /include/ "tsc_timer.dtsi"
>
>> --- a/configs/edison_defconfig
>> +++ b/configs/edison_defconfig
>
>> +# CONFIG_SYSRESET is not set
>
> --
Regards,
Bin
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT
2018-07-03 9:48 [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT Bin Meng
` (2 preceding siblings ...)
2018-07-03 9:48 ` [U-Boot] [PATCH 4/4] x86: Switch to use DM sysreset driver Bin Meng
@ 2018-07-09 2:39 ` Simon Glass
2018-07-19 5:33 ` Bin Meng
3 siblings, 1 reply; 13+ messages in thread
From: Simon Glass @ 2018-07-09 2:39 UTC (permalink / raw)
To: u-boot
On 3 July 2018 at 02:48, Bin Meng <bmeng.cn@gmail.com> wrote:
> This adds full reset bit in the reset register value in the ACPI FADT
> table, so that kernel can do a thorough reboot.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> arch/x86/cpu/quark/acpi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 2/4] dm: sysreset: x86: Add a sysreset driver
2018-07-03 9:48 ` [U-Boot] [PATCH 2/4] dm: sysreset: x86: Add a sysreset driver Bin Meng
@ 2018-07-09 2:39 ` Simon Glass
2018-07-19 5:33 ` Bin Meng
0 siblings, 1 reply; 13+ messages in thread
From: Simon Glass @ 2018-07-09 2:39 UTC (permalink / raw)
To: u-boot
On 3 July 2018 at 02:48, Bin Meng <bmeng.cn@gmail.com> wrote:
> This adds a generic reset driver for x86 processor.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> drivers/sysreset/Kconfig | 6 +++++
> drivers/sysreset/Makefile | 1 +
> drivers/sysreset/sysreset_x86.c | 49 +++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 56 insertions(+)
> create mode 100644 drivers/sysreset/sysreset_x86.c
>
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 3/4] x86: fsp: Eliminate the reset_cpu() call
2018-07-03 9:48 ` [U-Boot] [PATCH 3/4] x86: fsp: Eliminate the reset_cpu() call Bin Meng
@ 2018-07-09 2:39 ` Simon Glass
2018-07-19 5:33 ` Bin Meng
0 siblings, 1 reply; 13+ messages in thread
From: Simon Glass @ 2018-07-09 2:39 UTC (permalink / raw)
To: u-boot
Hi Bin,
On 3 July 2018 at 02:48, Bin Meng <bmeng.cn@gmail.com> wrote:
> In preparation for the reset driver conversion, eliminate the
> reset_cpu() call in the FSP init path as it's too early for the
> reset driver to work.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> arch/x86/lib/fsp/fsp_common.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
But it would be good to have a comment explaining this in the code.
Regards,
Simon
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT
2018-07-09 2:39 ` [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT Simon Glass
@ 2018-07-19 5:33 ` Bin Meng
0 siblings, 0 replies; 13+ messages in thread
From: Bin Meng @ 2018-07-19 5:33 UTC (permalink / raw)
To: u-boot
On Mon, Jul 9, 2018 at 10:39 AM, Simon Glass <sjg@chromium.org> wrote:
> On 3 July 2018 at 02:48, Bin Meng <bmeng.cn@gmail.com> wrote:
>> This adds full reset bit in the reset register value in the ACPI FADT
>> table, so that kernel can do a thorough reboot.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>> arch/x86/cpu/quark/acpi.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86, thanks!
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 2/4] dm: sysreset: x86: Add a sysreset driver
2018-07-09 2:39 ` Simon Glass
@ 2018-07-19 5:33 ` Bin Meng
0 siblings, 0 replies; 13+ messages in thread
From: Bin Meng @ 2018-07-19 5:33 UTC (permalink / raw)
To: u-boot
On Mon, Jul 9, 2018 at 10:39 AM, Simon Glass <sjg@chromium.org> wrote:
> On 3 July 2018 at 02:48, Bin Meng <bmeng.cn@gmail.com> wrote:
>> This adds a generic reset driver for x86 processor.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>> drivers/sysreset/Kconfig | 6 +++++
>> drivers/sysreset/Makefile | 1 +
>> drivers/sysreset/sysreset_x86.c | 49 +++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 56 insertions(+)
>> create mode 100644 drivers/sysreset/sysreset_x86.c
>>
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86, thanks!
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 3/4] x86: fsp: Eliminate the reset_cpu() call
2018-07-09 2:39 ` Simon Glass
@ 2018-07-19 5:33 ` Bin Meng
0 siblings, 0 replies; 13+ messages in thread
From: Bin Meng @ 2018-07-19 5:33 UTC (permalink / raw)
To: u-boot
Hi Simon,
On Mon, Jul 9, 2018 at 10:39 AM, Simon Glass <sjg@chromium.org> wrote:
> Hi Bin,
>
> On 3 July 2018 at 02:48, Bin Meng <bmeng.cn@gmail.com> wrote:
>> In preparation for the reset driver conversion, eliminate the
>> reset_cpu() call in the FSP init path as it's too early for the
>> reset driver to work.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>> arch/x86/lib/fsp/fsp_common.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> But it would be good to have a comment explaining this in the code.
There is already a comment /* Reboot */ before the debug() call.
Regards,
Bin
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2018-07-19 5:33 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-03 9:48 [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT Bin Meng
2018-07-03 9:48 ` [U-Boot] [PATCH 2/4] dm: sysreset: x86: Add a sysreset driver Bin Meng
2018-07-09 2:39 ` Simon Glass
2018-07-19 5:33 ` Bin Meng
2018-07-03 9:48 ` [U-Boot] [PATCH 3/4] x86: fsp: Eliminate the reset_cpu() call Bin Meng
2018-07-09 2:39 ` Simon Glass
2018-07-19 5:33 ` Bin Meng
2018-07-03 9:48 ` [U-Boot] [PATCH 4/4] x86: Switch to use DM sysreset driver Bin Meng
2018-07-03 10:42 ` Andy Shevchenko
2018-07-03 11:14 ` Wolfgang Denk
2018-07-03 14:59 ` Bin Meng
2018-07-09 2:39 ` [U-Boot] [PATCH 1/4] x86: quark: acpi: Add full reset bit to the reset register value in FADT Simon Glass
2018-07-19 5:33 ` Bin Meng
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