[U-Boot] [PATCH] rockchip: enable SPL_OF_PLATDATA for rk3288 board

[U-Boot] [PATCH] rockchip: enable SPL_OF_PLATDATA for rk3288 board

[Jacob Chen]

It seems ddr auto detect make SPL image to large.
So we have to use SPL_OF_PLATDATA to reduce size.

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
---

 configs/evb-rk3288_defconfig     | 4 ++++
 configs/fennec-rk3288_defconfig  | 3 +++
 configs/miniarm-rk3288_defconfig | 3 +++
 3 files changed, 10 insertions(+)

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index c7396a5..89cf3c1 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -29,10 +29,12 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
+# CONFIG_SPL_SIMPLE_BUS is not set
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
@@ -59,7 +61,9 @@ CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_ROCKCHIP_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index a5c089b..0ff7264 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -58,7 +59,9 @@ CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_ROCKCHIP_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/miniarm-rk3288_defconfig b/configs/miniarm-rk3288_defconfig
index 6354d1a..c8939a8 100644
--- a/configs/miniarm-rk3288_defconfig
+++ b/configs/miniarm-rk3288_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -57,7 +58,9 @@ CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_ROCKCHIP_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_SPL_OF_LIBFDT is not set
-- 
1.9.1

[U-Boot] [PATCH] rockchip: enable SPL_OF_PLATDATA for rk3288 board

[Simon Glass]

On 28 September 2016 at 00:35, Jacob Chen <jacob2.chen@rock-chips.com> wrote:
> It seems ddr auto detect make SPL image to large.
> So we have to use SPL_OF_PLATDATA to reduce size.
>
> Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
> ---
>
>  configs/evb-rk3288_defconfig     | 4 ++++
>  configs/fennec-rk3288_defconfig  | 3 +++
>  configs/miniarm-rk3288_defconfig | 3 +++
>  3 files changed, 10 insertions(+)

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH] rockchip: enable SPL_OF_PLATDATA for rk3288 board

[陈豪]

In patch "rk3288: config change for enable dram capacity auto-detect",
Kever have use CONFIG_ROCKCHIP_SPL_BACK_TO_BROM to reduce spl size, so
this patch is no longer needed.

2016-09-28 23:46 GMT+08:00 Simon Glass <sjg@chromium.org>:
> On 28 September 2016 at 00:35, Jacob Chen <jacob2.chen@rock-chips.com> wrote:
>> It seems ddr auto detect make SPL image to large.
>> So we have to use SPL_OF_PLATDATA to reduce size.
>>
>> Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
>> ---
>>
>>  configs/evb-rk3288_defconfig     | 4 ++++
>>  configs/fennec-rk3288_defconfig  | 3 +++
>>  configs/miniarm-rk3288_defconfig | 3 +++
>>  3 files changed, 10 insertions(+)
>
> Acked-by: Simon Glass <sjg@chromium.org>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] rockchip: enable SPL_OF_PLATDATA for rk3288 board

[Simon Glass]

Hi,

On 8 October 2016 at 02:28, ?? <jacobchen110@gmail.com> wrote:
> In patch "rk3288: config change for enable dram capacity auto-detect",
> Kever have use CONFIG_ROCKCHIP_SPL_BACK_TO_BROM to reduce spl size, so
> this patch is no longer needed.

OK, then I will drop this patch for now.

>
> 2016-09-28 23:46 GMT+08:00 Simon Glass <sjg@chromium.org>:
>> On 28 September 2016 at 00:35, Jacob Chen <jacob2.chen@rock-chips.com> wrote:
>>> It seems ddr auto detect make SPL image to large.
>>> So we have to use SPL_OF_PLATDATA to reduce size.
>>>
>>> Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
>>> ---
>>>
>>>  configs/evb-rk3288_defconfig     | 4 ++++
>>>  configs/fennec-rk3288_defconfig  | 3 +++
>>>  configs/miniarm-rk3288_defconfig | 3 +++
>>>  3 files changed, 10 insertions(+)
>>
>> Acked-by: Simon Glass <sjg@chromium.org>
>> _______________________________________________
>> U-Boot mailing list
>> U-Boot at lists.denx.de
>> http://lists.denx.de/mailman/listinfo/u-boot


Regards,
Simon