[U-Boot] [PATCH 0/3] ae3xx: timer: Rename AE3XX timer to ATCPIT100

[U-Boot] [PATCH 0/3] ae3xx: timer: Rename AE3XX timer to ATCPIT100

[Andes]

From: Rick Chen <rick@andestech.com>

AE3XX is board name. ATCPIT100 is timer IP name.
So rename AE3XX timer to ATCPIT100 timer.

Rick Chen (3):
  ae3xx: timer: Rename AE3XX to ATCPIT100
  nds32: defconfig: Rename AE3XX_TIMER to ATCPIT100_TIMER
  dt-bindings: timer: Add andestech atcpit100 timer binding doc

 configs/adp-ae3xx_defconfig                        |    2 +-
 doc/device-tree-bindings/timer/atcpit100_timer.txt |   31 ++++++
 drivers/timer/Kconfig                              |    7 +-
 drivers/timer/Makefile                             |    2 +-
 drivers/timer/ae3xx_timer.c                        |  117 --------------------
 drivers/timer/atcpit100_timer.c                    |  117 ++++++++++++++++++++
 6 files changed, 154 insertions(+), 122 deletions(-)
 create mode 100644 doc/device-tree-bindings/timer/atcpit100_timer.txt
 delete mode 100644 drivers/timer/ae3xx_timer.c
 create mode 100644 drivers/timer/atcpit100_timer.c

-- 
1.7.9.5

[U-Boot] [PATCH 1/3] ae3xx: timer: Rename AE3XX to ATCPIT100

[Andes]

From: Rick Chen <rick@andestech.com>

ATCPIT100 is Andestech timer IP which is embeded
in AE3XX and AE250 boards. So rename AE3XX to
ATCPIT100 will be more make sence.

Signed-off-by: Rick Chen <rick@andestech.com>
---
 drivers/timer/Kconfig           |    7 ++-
 drivers/timer/Makefile          |    2 +-
 drivers/timer/ae3xx_timer.c     |  117 ---------------------------------------
 drivers/timer/atcpit100_timer.c |  117 +++++++++++++++++++++++++++++++++++++++
 4 files changed, 122 insertions(+), 121 deletions(-)
 delete mode 100644 drivers/timer/ae3xx_timer.c
 create mode 100644 drivers/timer/atcpit100_timer.c

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 6305bbf..fcfdf4e 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -105,11 +105,12 @@ config AG101P_TIMER
 	help
 	  Select this to enable a timer for AG01P devices.
 
-config AE3XX_TIMER
-	bool "AE3XX timer support"
+config ATCPIT100_TIMER
+	bool "ATCPIT100 timer support"
 	depends on TIMER && NDS32
 	help
-	  Select this to enable a timer for AE3XX devices.
+	  Select this to enable a ATCPIT100 timer which will be embeded
+		in AE3XX, AE250 boards.
 
 config ROCKCHIP_TIMER
         bool "Rockchip timer support"
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index 69e8961..15e5154 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -13,6 +13,6 @@ obj-$(CONFIG_AST_TIMER)	+= ast_timer.o
 obj-$(CONFIG_STI_TIMER)		+= sti-timer.o
 obj-$(CONFIG_ARC_TIMER)	+= arc_timer.o
 obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o
-obj-$(CONFIG_AE3XX_TIMER) += ae3xx_timer.o
+obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
 obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
 obj-$(CONFIG_ATMEL_PIT_TIMER) += atmel_pit_timer.o
diff --git a/drivers/timer/ae3xx_timer.c b/drivers/timer/ae3xx_timer.c
deleted file mode 100644
index b710c28..0000000
--- a/drivers/timer/ae3xx_timer.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * Andestech ATCPIT100 timer driver
- *
- * (C) Copyright 2016
- * Rick Chen, NDS32 Software Engineering, rick at andestech.com
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <timer.h>
-#include <linux/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define REG32_TMR(x)	(*(u32 *)	((plat->regs) + (x>>2)))
-
-/*
- * Definition of register offsets
- */
-
-/* ID and Revision Register */
-#define ID_REV		0x0
-
-/* Configuration Register */
-#define CFG		0x10
-
-/* Interrupt Enable Register */
-#define INT_EN		0x14
-#define CH_INT_EN(c , i)	((1<<i)<<(4*c))
-
-/* Interrupt Status Register */
-#define INT_STA		0x18
-#define CH_INT_STA(c , i)	((1<<i)<<(4*c))
-
-/* Channel Enable Register */
-#define CH_EN		0x1C
-#define CH_TMR_EN(c , t)	((1<<t)<<(4*c))
-
-/* Ch n Control REgister */
-#define CH_CTL(n)	(0x20+0x10*n)
-/* Channel clock source , bit 3 , 0:External clock , 1:APB clock */
-#define APB_CLK		(1<<3)
-/* Channel mode , bit 0~2 */
-#define TMR_32		1
-#define TMR_16		2
-#define TMR_8		3
-#define PWM		4
-
-#define CH_REL(n)	(0x24+0x10*n)
-#define CH_CNT(n)	(0x28+0x10*n)
-
-struct atctmr_timer_regs {
-	u32	id_rev;		/* 0x00 */
-	u32	reservd[3];	/* 0x04 ~ 0x0c */
-	u32	cfg;		/* 0x10 */
-	u32	int_en;		/* 0x14 */
-	u32	int_st;		/* 0x18 */
-	u32	ch_en;		/* 0x1c */
-	u32	ch0_ctrl;	/* 0x20 */
-	u32	ch0_reload;	/* 0x24 */
-	u32	ch0_cntr;	/* 0x28 */
-	u32	reservd1;	/* 0x2c */
-	u32	ch1_ctrl;	/* 0x30 */
-	u32	ch1_reload;	/* 0x34 */
-	u32	int_mask;	/* 0x38 */
-};
-
-struct atftmr_timer_platdata {
-	u32 *regs;
-};
-
-static int atftmr_timer_get_count(struct udevice *dev, u64 *count)
-{
-	struct atftmr_timer_platdata *plat = dev->platdata;
-	u32 val;
-	val = ~(REG32_TMR(CH_CNT(1))+0xffffffff);
-	*count = timer_conv_64(val);
-	return 0;
-}
-
-static int atctmr_timer_probe(struct udevice *dev)
-{
-	struct atftmr_timer_platdata *plat = dev->platdata;
-	REG32_TMR(CH_REL(1)) = 0xffffffff;
-	REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32;
-	REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0);
-	return 0;
-}
-
-static int atctme_timer_ofdata_to_platdata(struct udevice *dev)
-{
-	struct atftmr_timer_platdata *plat = dev_get_platdata(dev);
-	plat->regs = map_physmem(devfdt_get_addr(dev) , 0x100 , MAP_NOCACHE);
-	return 0;
-}
-
-static const struct timer_ops ag101p_timer_ops = {
-	.get_count = atftmr_timer_get_count,
-};
-
-static const struct udevice_id ag101p_timer_ids[] = {
-	{ .compatible = "andestech,atcpit100" },
-	{}
-};
-
-U_BOOT_DRIVER(altera_timer) = {
-	.name	= "ae3xx_timer",
-	.id	= UCLASS_TIMER,
-	.of_match = ag101p_timer_ids,
-	.ofdata_to_platdata = atctme_timer_ofdata_to_platdata,
-	.platdata_auto_alloc_size = sizeof(struct atftmr_timer_platdata),
-	.probe = atctmr_timer_probe,
-	.ops	= &ag101p_timer_ops,
-	.flags = DM_FLAG_PRE_RELOC,
-};
diff --git a/drivers/timer/atcpit100_timer.c b/drivers/timer/atcpit100_timer.c
new file mode 100644
index 0000000..d5146dd
--- /dev/null
+++ b/drivers/timer/atcpit100_timer.c
@@ -0,0 +1,117 @@
+/*
+ * Andestech ATCPIT100 timer driver
+ *
+ * (C) Copyright 2016
+ * Rick Chen, NDS32 Software Engineering, rick at andestech.com
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <timer.h>
+#include <linux/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define REG32_TMR(x)	(*(u32 *)	((plat->regs) + (x>>2)))
+
+/*
+ * Definition of register offsets
+ */
+
+/* ID and Revision Register */
+#define ID_REV		0x0
+
+/* Configuration Register */
+#define CFG		0x10
+
+/* Interrupt Enable Register */
+#define INT_EN		0x14
+#define CH_INT_EN(c , i)	((1<<i)<<(4*c))
+
+/* Interrupt Status Register */
+#define INT_STA		0x18
+#define CH_INT_STA(c , i)	((1<<i)<<(4*c))
+
+/* Channel Enable Register */
+#define CH_EN		0x1C
+#define CH_TMR_EN(c , t)	((1<<t)<<(4*c))
+
+/* Ch n Control REgister */
+#define CH_CTL(n)	(0x20+0x10*n)
+/* Channel clock source , bit 3 , 0:External clock , 1:APB clock */
+#define APB_CLK		(1<<3)
+/* Channel mode , bit 0~2 */
+#define TMR_32		1
+#define TMR_16		2
+#define TMR_8		3
+#define PWM		4
+
+#define CH_REL(n)	(0x24+0x10*n)
+#define CH_CNT(n)	(0x28+0x10*n)
+
+struct atctmr_timer_regs {
+	u32	id_rev;		/* 0x00 */
+	u32	reservd[3];	/* 0x04 ~ 0x0c */
+	u32	cfg;		/* 0x10 */
+	u32	int_en;		/* 0x14 */
+	u32	int_st;		/* 0x18 */
+	u32	ch_en;		/* 0x1c */
+	u32	ch0_ctrl;	/* 0x20 */
+	u32	ch0_reload;	/* 0x24 */
+	u32	ch0_cntr;	/* 0x28 */
+	u32	reservd1;	/* 0x2c */
+	u32	ch1_ctrl;	/* 0x30 */
+	u32	ch1_reload;	/* 0x34 */
+	u32	int_mask;	/* 0x38 */
+};
+
+struct atcpit_timer_platdata {
+	u32 *regs;
+};
+
+static int atcpit_timer_get_count(struct udevice *dev, u64 *count)
+{
+	struct atcpit_timer_platdata *plat = dev->platdata;
+	u32 val;
+	val = ~(REG32_TMR(CH_CNT(1))+0xffffffff);
+	*count = timer_conv_64(val);
+	return 0;
+}
+
+static int atcpit_timer_probe(struct udevice *dev)
+{
+	struct atcpit_timer_platdata *plat = dev->platdata;
+	REG32_TMR(CH_REL(1)) = 0xffffffff;
+	REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32;
+	REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0);
+	return 0;
+}
+
+static int atcpit_timer_ofdata_to_platdata(struct udevice *dev)
+{
+	struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
+	plat->regs = map_physmem(devfdt_get_addr(dev) , 0x100 , MAP_NOCACHE);
+	return 0;
+}
+
+static const struct timer_ops atcpit_timer_ops = {
+	.get_count = atcpit_timer_get_count,
+};
+
+static const struct udevice_id atcpit_timer_ids[] = {
+	{ .compatible = "andestech,atcpit100" },
+	{}
+};
+
+U_BOOT_DRIVER(atcpit100_timer) = {
+	.name	= "atcpit100_timer",
+	.id	= UCLASS_TIMER,
+	.of_match = atcpit_timer_ids,
+	.ofdata_to_platdata = atcpit_timer_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct atcpit_timer_platdata),
+	.probe = atcpit_timer_probe,
+	.ops	= &atcpit_timer_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
-- 
1.7.9.5

[U-Boot] [PATCH] enable debug uart

[Andes]

From: rick <rick@andestech.com>

---
 common/board_f.c            |    2 ++
 configs/adp-ae3xx_defconfig |    5 +++++
 drivers/serial/Kconfig      |    8 ++++++++
 drivers/serial/ns16550.c    |    5 +++--
 include/debug_uart.h        |    2 ++
 lib/display_options.c       |    2 ++
 6 files changed, 22 insertions(+), 2 deletions(-)
 mode change 100644 => 100755 common/board_f.c
 mode change 100644 => 100755 common/init/board_init.c
 mode change 100644 => 100755 configs/adp-ae3xx_defconfig
 mode change 100644 => 100755 drivers/serial/Kconfig
 mode change 100644 => 100755 drivers/serial/ns16550.c
 mode change 100644 => 100755 include/debug_uart.h
 mode change 100644 => 100755 lib/display_options.c

diff --git a/common/board_f.c b/common/board_f.c
old mode 100644
new mode 100755
index 104d144..1024987
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -902,6 +902,8 @@ static const init_fnc_t init_sequence_f[] = {
 
 void board_init_f(ulong boot_flags)
 {
+//printf("board_init_f\n");
+//while(1);
 	gd->flags = boot_flags;
 	gd->have_console = 0;
 
diff --git a/common/init/board_init.c b/common/init/board_init.c
old mode 100644
new mode 100755
diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig
old mode 100644
new mode 100755
index db9ee61..02386d6
--- a/configs/adp-ae3xx_defconfig
+++ b/configs/adp-ae3xx_defconfig
@@ -38,3 +38,8 @@ CONFIG_DM_SPI=y
 CONFIG_NDS_AE3XX_SPI=y
 CONFIG_TIMER=y
 CONFIG_AE3XX_TIMER=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xf0300000
+CONFIG_DEBUG_UART_CLOCK=14745600
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_OFFSET=32
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
old mode 100644
new mode 100755
index aeed538..34d49be
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -319,6 +319,14 @@ config DEBUG_UART_SHIFT
 	  value. Use this value to specify the shift to use, where 0=byte
 	  registers, 2=32-bit word registers, etc.
 
+config DEBUG_UART_OFFSET
+	int "UART register offset"
+	depends on DEBUG_UART
+	default 0 if DEBUG_UART
+	help
+	  Offset to apply to the mapbase from the start of the registers.
+
+
 config DEBUG_UART_BOARD_INIT
 	bool "Enable board-specific debug UART init"
 	depends on DEBUG_UART
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
old mode 100644
new mode 100755
index c702304..b67af3d
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -31,8 +31,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define serial_out(x, y)	out_le32(y, x)
 #define serial_in(y)		in_le32(y)
 #else
-#define serial_out(x, y)	writeb(x, y)
-#define serial_in(y)		readb(y)
+@
+#define serial_out(x, y)	writeb(x, y+CONFIG_SYS_NS16550_REG_OFFSET)
+#define serial_in(y)		readb(y+CONFIG_SYS_NS16550_REG_OFFSET)
 #endif
 #endif /* !CONFIG_DM_SERIAL */
 
diff --git a/include/debug_uart.h b/include/debug_uart.h
old mode 100644
new mode 100755
index 6f0b0c5..a369fb2
--- a/include/debug_uart.h
+++ b/include/debug_uart.h
@@ -113,11 +113,13 @@ void printhex8(uint value);
 
 #define serial_dout(reg, value)	\
 	serial_out_shift((char *)com_port + \
+		CONFIG_DEBUG_UART_OFFSET + \
 		((char *)reg - (char *)com_port) * \
 			(1 << CONFIG_DEBUG_UART_SHIFT), \
 		CONFIG_DEBUG_UART_SHIFT, value)
 #define serial_din(reg) \
 	serial_in_shift((char *)com_port + \
+		CONFIG_DEBUG_UART_OFFSET + \
 		((char *)reg - (char *)com_port) * \
 			(1 << CONFIG_DEBUG_UART_SHIFT), \
 		CONFIG_DEBUG_UART_SHIFT)
diff --git a/lib/display_options.c b/lib/display_options.c
old mode 100644
new mode 100755
index 4ea27ca..8ee63ce
--- a/lib/display_options.c
+++ b/lib/display_options.c
@@ -41,6 +41,8 @@ char *display_options_get_banner(bool newlines, char *buf, int size)
 
 int display_options(void)
 {
+printf("display_options\n");
+//while(1);
 	char buf[DISPLAY_OPTIONS_BANNER_LENGTH];
 
 	display_options_get_banner(true, buf, sizeof(buf));
-- 
1.7.9.5

[U-Boot] [PATCH 2/3] nds32: defconfig: Rename AE3XX_TIMER to ATCPIT100_TIMER

[Andes]

From: Rick Chen <rick@andestech.com>

Change AE3XX to its IP name ATCPIT100.

Signed-off-by: Rick Chen <rick@andestech.com>
---
 configs/adp-ae3xx_defconfig |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig
index 3d8383d..a3d8b29 100644
--- a/configs/adp-ae3xx_defconfig
+++ b/configs/adp-ae3xx_defconfig
@@ -38,4 +38,4 @@ CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
 CONFIG_NDS_AE3XX_SPI=y
 CONFIG_TIMER=y
-CONFIG_AE3XX_TIMER=y
+CONFIG_ATCPIT100_TIMER=y
-- 
1.7.9.5

[U-Boot] [PATCH 3/3] dt-bindings: timer: Add andestech atcpit100 timer binding doc

[Andes]

From: Rick Chen <rick@andestech.com>

Add a document to describe Andestech atcpit100 timer and
binding information.

Signed-off-by: Rick Chen <rick@andestech.com>
---
 doc/device-tree-bindings/timer/atcpit100_timer.txt |   31 ++++++++++++++++++++
 1 file changed, 31 insertions(+)
 create mode 100644 doc/device-tree-bindings/timer/atcpit100_timer.txt

diff --git a/doc/device-tree-bindings/timer/atcpit100_timer.txt b/doc/device-tree-bindings/timer/atcpit100_timer.txt
new file mode 100644
index 0000000..620814e
--- /dev/null
+++ b/doc/device-tree-bindings/timer/atcpit100_timer.txt
@@ -0,0 +1,31 @@
+Andestech ATCPIT100 timer
+------------------------------------------------------------------
+ATCPIT100 is a generic IP block from Andes Technology, embedded in
+Andestech AE3XX, AE250 platforms and other designs.
+
+This timer is a set of compact multi-function timers, which can be
+used as pulse width modulators (PWM) as well as simple timers.
+
+It supports up to 4 PIT channels. Each PIT channel is a
+multi-function timer and provide the following usage scenarios:
+One 32-bit timer
+Two 16-bit timers
+Four 8-bit timers
+One 16-bit PWM
+One 16-bit timer and one 8-bit PWM
+Two 8-bit timer and one 8-bit PWM
+
+Required properties:
+- compatible	: Should be "andestech,atcpit100"
+- reg		: Address and length of the register set
+- interrupts	: Reference to the timer interrupt
+- clock-frequency : The rate in HZ in input of the Andestech ATCPIT100 timer
+
+Examples:
+
+timer0: timer at f0400000 {
+	compatible = "andestech,atcpit100";
+	reg = <0xf0400000 0x1000>;
+	interrupts = <2 4>;
+	clock-frequency = <30000000>;
+}:
-- 
1.7.9.5

[U-Boot] [PATCH] enable debug uart

[rick at andestech.com]

Hi, All

This is wrong patch sending.

Please ignore it.

Rick

-----Original Message-----
From: Open Source Project uboot
Sent: Wednesday, November 15, 2017 10:48 AM
To: u-boot at lists.denx.de; wd at denx.de; dzu at denx.de; sjg at chromium.org
Cc: Rick Jian-Zhi Chen(陳建志)
Subject: [PATCH] enable debug uart

From: rick <rick@andestech.com>

---
 common/board_f.c            |    2 ++
 configs/adp-ae3xx_defconfig |    5 +++++
 drivers/serial/Kconfig      |    8 ++++++++
 drivers/serial/ns16550.c    |    5 +++--
 include/debug_uart.h        |    2 ++
 lib/display_options.c       |    2 ++
 6 files changed, 22 insertions(+), 2 deletions(-)  mode change 100644 => 100755 common/board_f.c  mode change 100644 => 100755 common/init/board_init.c  mode change 100644 => 100755 configs/adp-ae3xx_defconfig  mode change 100644 => 100755 drivers/serial/Kconfig  mode change 100644 => 100755 drivers/serial/ns16550.c  mode change 100644 => 100755 include/debug_uart.h  mode change 100644 => 100755 lib/display_options.c

diff --git a/common/board_f.c b/common/board_f.c old mode 100644 new mode 100755 index 104d144..1024987
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -902,6 +902,8 @@ static const init_fnc_t init_sequence_f[] = {

 void board_init_f(ulong boot_flags)
 {
+//printf("board_init_f\n");
+//while(1);
        gd->flags = boot_flags;
        gd->have_console = 0;

diff --git a/common/init/board_init.c b/common/init/board_init.c old mode 100644 new mode 100755 diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig old mode 100644 new mode 100755 index db9ee61..02386d6
--- a/configs/adp-ae3xx_defconfig
+++ b/configs/adp-ae3xx_defconfig
@@ -38,3 +38,8 @@ CONFIG_DM_SPI=y
 CONFIG_NDS_AE3XX_SPI=y
 CONFIG_TIMER=y
 CONFIG_AE3XX_TIMER=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xf0300000
+CONFIG_DEBUG_UART_CLOCK=14745600
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_OFFSET=32
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig old mode 100644 new mode 100755 index aeed538..34d49be
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -319,6 +319,14 @@ config DEBUG_UART_SHIFT
          value. Use this value to specify the shift to use, where 0=byte
          registers, 2=32-bit word registers, etc.

+config DEBUG_UART_OFFSET
+       int "UART register offset"
+       depends on DEBUG_UART
+       default 0 if DEBUG_UART
+       help
+         Offset to apply to the mapbase from the start of the registers.
+
+
 config DEBUG_UART_BOARD_INIT
        bool "Enable board-specific debug UART init"
        depends on DEBUG_UART
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c old mode 100644 new mode 100755 index c702304..b67af3d
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -31,8 +31,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define serial_out(x, y)       out_le32(y, x)
 #define serial_in(y)           in_le32(y)
 #else
-#define serial_out(x, y)       writeb(x, y)
-#define serial_in(y)           readb(y)
+@
+#define serial_out(x, y)       writeb(x, y+CONFIG_SYS_NS16550_REG_OFFSET)
+#define serial_in(y)           readb(y+CONFIG_SYS_NS16550_REG_OFFSET)
 #endif
 #endif /* !CONFIG_DM_SERIAL */

diff --git a/include/debug_uart.h b/include/debug_uart.h old mode 100644 new mode 100755 index 6f0b0c5..a369fb2
--- a/include/debug_uart.h
+++ b/include/debug_uart.h
@@ -113,11 +113,13 @@ void printhex8(uint value);

 #define serial_dout(reg, value)        \
        serial_out_shift((char *)com_port + \
+               CONFIG_DEBUG_UART_OFFSET + \
                ((char *)reg - (char *)com_port) * \
                        (1 << CONFIG_DEBUG_UART_SHIFT), \
                CONFIG_DEBUG_UART_SHIFT, value)
 #define serial_din(reg) \
        serial_in_shift((char *)com_port + \
+               CONFIG_DEBUG_UART_OFFSET + \
                ((char *)reg - (char *)com_port) * \
                        (1 << CONFIG_DEBUG_UART_SHIFT), \
                CONFIG_DEBUG_UART_SHIFT)
diff --git a/lib/display_options.c b/lib/display_options.c old mode 100644 new mode 100755 index 4ea27ca..8ee63ce
--- a/lib/display_options.c
+++ b/lib/display_options.c
@@ -41,6 +41,8 @@ char *display_options_get_banner(bool newlines, char *buf, int size)

 int display_options(void)
 {
+printf("display_options\n");
+//while(1);
        char buf[DISPLAY_OPTIONS_BANNER_LENGTH];

        display_options_get_banner(true, buf, sizeof(buf));
--
1.7.9.5

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[U-Boot] [PATCH 1/3] ae3xx: timer: Rename AE3XX to ATCPIT100

[Simon Glass]

Hi,

On 14 November 2017 at 19:48, Andes <uboot@andestech.com> wrote:
> From: Rick Chen <rick@andestech.com>
>
> ATCPIT100 is Andestech timer IP which is embeded
> in AE3XX and AE250 boards. So rename AE3XX to
> ATCPIT100 will be more make sence.
>
> Signed-off-by: Rick Chen <rick@andestech.com>
> ---
>  drivers/timer/Kconfig           |    7 ++-
>  drivers/timer/Makefile          |    2 +-
>  drivers/timer/ae3xx_timer.c     |  117 ---------------------------------------
>  drivers/timer/atcpit100_timer.c |  117 +++++++++++++++++++++++++++++++++++++++

If this is just a rename, why the big delta?

>  4 files changed, 122 insertions(+), 121 deletions(-)
>  delete mode 100644 drivers/timer/ae3xx_timer.c
>  create mode 100644 drivers/timer/atcpit100_timer.c

Regards,
Simon

[U-Boot] [PATCH 3/3] dt-bindings: timer: Add andestech atcpit100 timer binding doc

[Simon Glass]

On 14 November 2017 at 19:48, Andes <uboot@andestech.com> wrote:
> From: Rick Chen <rick@andestech.com>
>
> Add a document to describe Andestech atcpit100 timer and
> binding information.
>
> Signed-off-by: Rick Chen <rick@andestech.com>
> ---
>  doc/device-tree-bindings/timer/atcpit100_timer.txt |   31 ++++++++++++++++++++
>  1 file changed, 31 insertions(+)
>  create mode 100644 doc/device-tree-bindings/timer/atcpit100_timer.txt

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 2/3] nds32: defconfig: Rename AE3XX_TIMER to ATCPIT100_TIMER

[Simon Glass]

On 14 November 2017 at 19:48, Andes <uboot@andestech.com> wrote:
> From: Rick Chen <rick@andestech.com>
>
> Change AE3XX to its IP name ATCPIT100.

Reviewed-by: Simon Glass <sjg@chromium.org>

This should probably be squashed into the previous patch to keep
things in a consistent state.

[U-Boot] [PATCH 1/3] ae3xx: timer: Rename AE3XX to ATCPIT100

[rick at andestech.com]

> -----Original Message-----
> From: sjg at google.com [mailto:sjg at google.com] On Behalf Of Simon Glass
> Sent: Monday, November 20, 2017 11:40 PM
> To: Open Source Project uboot
> Cc: U-Boot Mailing List; Wolfgang Denk; Detlev Zundel; Rick Jian-Zhi Chen(陳建
> 志)
> Subject: Re: [PATCH 1/3] ae3xx: timer: Rename AE3XX to ATCPIT100
>
> Hi,
>
> On 14 November 2017 at 19:48, Andes <uboot@andestech.com> wrote:
> > From: Rick Chen <rick@andestech.com>
> >
> > ATCPIT100 is Andestech timer IP which is embeded in AE3XX and AE250
> > boards. So rename AE3XX to
> > ATCPIT100 will be more make sence.
> >
> > Signed-off-by: Rick Chen <rick@andestech.com>
> > ---
> >  drivers/timer/Kconfig           |    7 ++-
> >  drivers/timer/Makefile          |    2 +-
> >  drivers/timer/ae3xx_timer.c     |  117 ---------------------------------------
> >  drivers/timer/atcpit100_timer.c |  117
> > +++++++++++++++++++++++++++++++++++++++
>
> If this is just a rename, why the big delta?
>

I want to rename ae3xx_timer.c to atcpit100_timer.c
By the way I also rename function name and and struct name to let it more reasonable.
But I do not modify the code itself.

Do you mean I shall not modify the content of atcpit100_timer.c ?
Or I can modify but I shall describe it more clear ?

> >  4 files changed, 122 insertions(+), 121 deletions(-)  delete mode
> > 100644 drivers/timer/ae3xx_timer.c  create mode 100644
> > drivers/timer/atcpit100_timer.c
>
> Regards,
> Simon
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[U-Boot] [PATCH 2/3] nds32: defconfig: Rename AE3XX_TIMER to ATCPIT100_TIMER

[rick at andestech.com]

> -----Original Message-----
> From: sjg at google.com [mailto:sjg at google.com] On Behalf Of Simon Glass
> Sent: Monday, November 20, 2017 11:40 PM
> To: Open Source Project uboot
> Cc: U-Boot Mailing List; Wolfgang Denk; Detlev Zundel; Rick Jian-Zhi Chen(陳建
> 志)
> Subject: Re: [PATCH 2/3] nds32: defconfig: Rename AE3XX_TIMER to
> ATCPIT100_TIMER
>
> On 14 November 2017 at 19:48, Andes <uboot@andestech.com> wrote:
> > From: Rick Chen <rick@andestech.com>
> >
> > Change AE3XX to its IP name ATCPIT100.
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> This should probably be squashed into the previous patch to keep things in a
> consistent state.

OK I will squash it to previous patch for consistency.
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[U-Boot] [PATCH 1/3] ae3xx: timer: Rename AE3XX to ATCPIT100

[rick at andestech.com]

> -----Original Message-----
> From: U-Boot [mailto:u-boot-bounces at lists.denx.de] On Behalf Of
> rick at andestech.com
> Sent: Tuesday, November 21, 2017 2:40 PM
> To: sjg at chromium.org; Open Source Project uboot
> Cc: u-boot at lists.denx.de; dzu at denx.de
> Subject: Re: [U-Boot] [PATCH 1/3] ae3xx: timer: Rename AE3XX to ATCPIT100
>
>
> > -----Original Message-----
> > From: sjg at google.com [mailto:sjg at google.com] On Behalf Of Simon Glass
> > Sent: Monday, November 20, 2017 11:40 PM
> > To: Open Source Project uboot
> > Cc: U-Boot Mailing List; Wolfgang Denk; Detlev Zundel; Rick Jian-Zhi
> > Chen(陳建
> > 志)
> > Subject: Re: [PATCH 1/3] ae3xx: timer: Rename AE3XX to ATCPIT100
> >
> > Hi,
> >
> > On 14 November 2017 at 19:48, Andes <uboot@andestech.com> wrote:
> > > From: Rick Chen <rick@andestech.com>
> > >
> > > ATCPIT100 is Andestech timer IP which is embeded in AE3XX and AE250
> > > boards. So rename AE3XX to
> > > ATCPIT100 will be more make sence.
> > >
> > > Signed-off-by: Rick Chen <rick@andestech.com>
> > > ---
> > >  drivers/timer/Kconfig           |    7 ++-
> > >  drivers/timer/Makefile          |    2 +-
> > >  drivers/timer/ae3xx_timer.c     |  117 ---------------------------------------
> > >  drivers/timer/atcpit100_timer.c |  117
> > > +++++++++++++++++++++++++++++++++++++++
> >
> > If this is just a rename, why the big delta?
> >
>
> I want to rename ae3xx_timer.c to atcpit100_timer.c By the way I also rename
> function name and and struct name to let it more reasonable.
> But I do not modify the code itself.
>
> Do you mean I shall not modify the content of atcpit100_timer.c ?
> Or I can modify but I shall describe it more clear ?
>

Though the patch is not easy to see the differences.
I tig it and list the delta for you reviewing

rename from drivers/timer/ae3xx_timer.c
rename to drivers/timer/atcpit100_timer.c
index b710c28..d5146dd 100644
--- a/drivers/timer/ae3xx_timer.c
+++ b/drivers/timer/atcpit100_timer.c
@@ -67,51 +67,51 @@ struct atctmr_timer_regs {
        u32     int_mask;       /* 0x38 */
 };

-struct atftmr_timer_platdata {
+struct atcpit_timer_platdata {
        u32 *regs;
 };

-static int atftmr_timer_get_count(struct udevice *dev, u64 *count)
+static int atcpit_timer_get_count(struct udevice *dev, u64 *count)
 {
-       struct atftmr_timer_platdata *plat = dev->platdata;
+       struct atcpit_timer_platdata *plat = dev->platdata;
        u32 val;
        val = ~(REG32_TMR(CH_CNT(1))+0xffffffff);
        *count = timer_conv_64(val);
        return 0;
 }

-static int atctmr_timer_probe(struct udevice *dev)
+static int atcpit_timer_probe(struct udevice *dev)
 {
-       struct atftmr_timer_platdata *plat = dev->platdata;
+       struct atcpit_timer_platdata *plat = dev->platdata;
        REG32_TMR(CH_REL(1)) = 0xffffffff;
        REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32;
        REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0);
        return 0;
 }

-static int atctme_timer_ofdata_to_platdata(struct udevice *dev)
+static int atcpit_timer_ofdata_to_platdata(struct udevice *dev)
 {
-       struct atftmr_timer_platdata *plat = dev_get_platdata(dev);
+       struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
        plat->regs = map_physmem(devfdt_get_addr(dev) , 0x100 , MAP_NOCACHE);
        return 0;
 }

-static const struct timer_ops ag101p_timer_ops = {
-       .get_count = atftmr_timer_get_count,
+static const struct timer_ops atcpit_timer_ops = {
+       .get_count = atcpit_timer_get_count,
 };

-static const struct udevice_id ag101p_timer_ids[] = {
+static const struct udevice_id atcpit_timer_ids[] = {
        { .compatible = "andestech,atcpit100" },
        {}
 };

-U_BOOT_DRIVER(altera_timer) = {
-       .name   = "ae3xx_timer",
+U_BOOT_DRIVER(atcpit100_timer) = {
+       .name   = "atcpit100_timer",
        .id     = UCLASS_TIMER,
-       .of_match = ag101p_timer_ids,
-       .ofdata_to_platdata = atctme_timer_ofdata_to_platdata,
-       .platdata_auto_alloc_size = sizeof(struct atftmr_timer_platdata),
-       .probe = atctmr_timer_probe,
-       .ops    = &ag101p_timer_ops,
+       .of_match = atcpit_timer_ids,
+       .ofdata_to_platdata = atcpit_timer_ofdata_to_platdata,
+       .platdata_auto_alloc_size = sizeof(struct atcpit_timer_platdata),
+       .probe = atcpit_timer_probe,
+       .ops    = &atcpit_timer_ops,




> > >  4 files changed, 122 insertions(+), 121 deletions(-)  delete mode
> > > 100644 drivers/timer/ae3xx_timer.c  create mode 100644
> > > drivers/timer/atcpit100_timer.c
> >
> > Regards,
> > Simon
> CONFIDENTIALITY NOTICE:
>
> This e-mail (and its attachments) may contain confidential and legally privileged
> information or information protected from disclosure. If you are not the intended
> recipient, you are hereby notified that any disclosure, copying, distribution, or
> use of the information contained herein is strictly prohibited. In this case, please
> immediately notify the sender by return e-mail, delete the message (and any
> accompanying documents) and destroy all printed hard copies. Thank you for
> your cooperation.
>
> Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved.
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot
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[U-Boot] [PATCH 1/3] ae3xx: timer: Rename AE3XX to ATCPIT100

[Simon Glass]

Hi Rick,

On 21 November 2017 at 00:27,  <rick@andestech.com> wrote:
>
>
>> -----Original Message-----
>> From: U-Boot [mailto:u-boot-bounces at lists.denx.de] On Behalf Of
>> rick at andestech.com
>> Sent: Tuesday, November 21, 2017 2:40 PM
>> To: sjg at chromium.org; Open Source Project uboot
>> Cc: u-boot at lists.denx.de; dzu at denx.de
>> Subject: Re: [U-Boot] [PATCH 1/3] ae3xx: timer: Rename AE3XX to ATCPIT100
>>
>>
>> > -----Original Message-----
>> > From: sjg at google.com [mailto:sjg at google.com] On Behalf Of Simon Glass
>> > Sent: Monday, November 20, 2017 11:40 PM
>> > To: Open Source Project uboot
>> > Cc: U-Boot Mailing List; Wolfgang Denk; Detlev Zundel; Rick Jian-Zhi
>> > Chen(陳建
>> > 志)
>> > Subject: Re: [PATCH 1/3] ae3xx: timer: Rename AE3XX to ATCPIT100
>> >
>> > Hi,
>> >
>> > On 14 November 2017 at 19:48, Andes <uboot@andestech.com> wrote:
>> > > From: Rick Chen <rick@andestech.com>
>> > >
>> > > ATCPIT100 is Andestech timer IP which is embeded in AE3XX and AE250
>> > > boards. So rename AE3XX to
>> > > ATCPIT100 will be more make sence.
>> > >
>> > > Signed-off-by: Rick Chen <rick@andestech.com>
>> > > ---
>> > >  drivers/timer/Kconfig           |    7 ++-
>> > >  drivers/timer/Makefile          |    2 +-
>> > >  drivers/timer/ae3xx_timer.c     |  117 ---------------------------------------
>> > >  drivers/timer/atcpit100_timer.c |  117
>> > > +++++++++++++++++++++++++++++++++++++++
>> >
>> > If this is just a rename, why the big delta?
>> >
>>
>> I want to rename ae3xx_timer.c to atcpit100_timer.c By the way I also rename
>> function name and and struct name to let it more reasonable.
>> But I do not modify the code itself.
>>
>> Do you mean I shall not modify the content of atcpit100_timer.c ?
>> Or I can modify but I shall describe it more clear ?
>>
>
> Though the patch is not easy to see the differences.
> I tig it and list the delta for you reviewing

OK I see, thank you. Are you using 'patman' to submit the patches? It
should send this through as a proper delta.

Regards,
Simon