[PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[sven.auhagen]

From: Sven Auhagen <sven.auhagen@voleatech.de>

Hello,

There were already 4 versions of this series from Miquèl.
I talked to Miquèl and I fixed up the last comments from v4.
I am looking for feedback if this patch series is now ready to be merged
and what should be further changed.

Here is the original cover letter:

Some time ago, when the initial support for Armada CP110 was
contributed, the SATA core was not able to handle per-port
interrupts. Despite the hardware reality, the device tree only
represents one main interrupt for the two ports. Having both SATA
ports enabled at the same time has been achieved by a hack in the ICU
driver(1) that faked the use of the two interrupts, no matter which
SATA port was in use.

Now that the SATA core is ready to handle more than one interrupt,
this series adds support for it in the libahci_platform code. The
CP110 device tree must be updated to reflect the two SATA ports
available and their respective interrupts. To do not break DT backward
compatibility, the ahci_platform driver now embeds a special quirk
which checks if the DT is valid (only for A8k compatible) and, if
needed, creates the two missing sub-nodes, and assign them the
relevant "reg" and "interrupts" properties, before removing the main
SATA node "interrupts" one.

(1) The ICU is an irqchip aggregating the CP110 (south-bridge)
interrupts into MSIs for the AP806 (north-bridge).

Best
Sven

Change from v2:
  * Fix commit message of custom irq init for host init

Change from v1:
  * Add a patch to enable custom irq initialization in 
    plattform init host
  * Add multi_irq_host_ack callback for the msi irq handler
  * Rework the ahci mvebu patch to initiate the irq and use
    the new multi_irq_host_ack to handle the custom irq code.
    Remove the custom irq handler and duplicate code.
  * Fix the armada8k backwards compatibility code
  * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK

Miquel Raynal (5):
  ata: ahci: mvebu: Rename a platform data flag
  ata: ahci: mvebu: Support A8k compatible
  irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
  dt-bindings: ata: Update ahci bindings with possible per-port
    interrupts
  dt-bindings: ata: Update ahci_mvebu bindings

Sven Auhagen (4):
  ata: libahci_platform: Do not try to get an IRQ when
    AHCI_HFLAG_MULTI_MSI is set
  ata: ahci: add ack callback to multi irq handler
  ata: ahci: mvebu: Add support for A8k legacy DT bindings
  arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts

 .../devicetree/bindings/ata/ahci-platform.txt |   7 +
 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
 drivers/ata/ahci.h                            |   2 +
 drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
 drivers/ata/libahci.c                         |   4 +
 drivers/ata/libahci_platform.c                |  19 ++-
 drivers/irqchip/irq-mvebu-icu.c               |  18 ---
 include/linux/ahci_platform.h                 |   1 +
 8 files changed, 160 insertions(+), 40 deletions(-)

-- 
2.20.1

[PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[sven.auhagen]

From: Sven Auhagen <sven.auhagen@voleatech.de>

Hello,

There were already 4 versions of this series from Miquèl.
I talked to Miquèl and I fixed up the last comments from v4.
I am looking for feedback if this patch series is now ready to be merged
and what should be further changed.

Here is the original cover letter:

Some time ago, when the initial support for Armada CP110 was
contributed, the SATA core was not able to handle per-port
interrupts. Despite the hardware reality, the device tree only
represents one main interrupt for the two ports. Having both SATA
ports enabled at the same time has been achieved by a hack in the ICU
driver(1) that faked the use of the two interrupts, no matter which
SATA port was in use.

Now that the SATA core is ready to handle more than one interrupt,
this series adds support for it in the libahci_platform code. The
CP110 device tree must be updated to reflect the two SATA ports
available and their respective interrupts. To do not break DT backward
compatibility, the ahci_platform driver now embeds a special quirk
which checks if the DT is valid (only for A8k compatible) and, if
needed, creates the two missing sub-nodes, and assign them the
relevant "reg" and "interrupts" properties, before removing the main
SATA node "interrupts" one.

(1) The ICU is an irqchip aggregating the CP110 (south-bridge)
interrupts into MSIs for the AP806 (north-bridge).

Best
Sven

Change from v2:
  * Fix commit message of custom irq init for host init

Change from v1:
  * Add a patch to enable custom irq initialization in 
    plattform init host
  * Add multi_irq_host_ack callback for the msi irq handler
  * Rework the ahci mvebu patch to initiate the irq and use
    the new multi_irq_host_ack to handle the custom irq code.
    Remove the custom irq handler and duplicate code.
  * Fix the armada8k backwards compatibility code
  * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK

Miquel Raynal (5):
  ata: ahci: mvebu: Rename a platform data flag
  ata: ahci: mvebu: Support A8k compatible
  irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
  dt-bindings: ata: Update ahci bindings with possible per-port
    interrupts
  dt-bindings: ata: Update ahci_mvebu bindings

Sven Auhagen (4):
  ata: libahci_platform: Do not try to get an IRQ when
    AHCI_HFLAG_MULTI_MSI is set
  ata: ahci: add ack callback to multi irq handler
  ata: ahci: mvebu: Add support for A8k legacy DT bindings
  arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts

 .../devicetree/bindings/ata/ahci-platform.txt |   7 +
 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
 drivers/ata/ahci.h                            |   2 +
 drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
 drivers/ata/libahci.c                         |   4 +
 drivers/ata/libahci_platform.c                |  19 ++-
 drivers/irqchip/irq-mvebu-icu.c               |  18 ---
 include/linux/ahci_platform.h                 |   1 +
 8 files changed, 160 insertions(+), 40 deletions(-)

-- 
2.20.1


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[PATCH v3 1/9] ata: ahci: mvebu: Rename a platform data flag

[sven.auhagen]

From: Miquel Raynal <miquel.raynal@bootlin.com>

Before adding more entries in the platform data structure, rename the
flags entry to be more precise and name it host_flags.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/ata/ahci_mvebu.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index 3ad46d26d9d5..563cc4c64d96 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -30,7 +30,7 @@
 
 struct ahci_mvebu_plat_data {
 	int (*plat_config)(struct ahci_host_priv *hpriv);
-	unsigned int flags;
+	unsigned int host_flags;
 };
 
 static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
@@ -196,7 +196,7 @@ static int ahci_mvebu_probe(struct platform_device *pdev)
 	if (IS_ERR(hpriv))
 		return PTR_ERR(hpriv);
 
-	hpriv->flags |= pdata->flags;
+	hpriv->flags |= pdata->host_flags;
 	hpriv->plat_data = (void *)pdata;
 
 	rc = ahci_platform_enable_resources(hpriv);
@@ -227,7 +227,7 @@ static const struct ahci_mvebu_plat_data ahci_mvebu_armada_380_plat_data = {
 
 static const struct ahci_mvebu_plat_data ahci_mvebu_armada_3700_plat_data = {
 	.plat_config = ahci_mvebu_armada_3700_config,
-	.flags = AHCI_HFLAG_SUSPEND_PHYS | AHCI_HFLAG_IGN_NOTSUPP_POWER_ON,
+	.host_flags = AHCI_HFLAG_SUSPEND_PHYS | AHCI_HFLAG_IGN_NOTSUPP_POWER_ON,
 };
 
 static const struct of_device_id ahci_mvebu_of_match[] = {
-- 
2.20.1

[PATCH v3 1/9] ata: ahci: mvebu: Rename a platform data flag

[sven.auhagen]

From: Miquel Raynal <miquel.raynal@bootlin.com>

Before adding more entries in the platform data structure, rename the
flags entry to be more precise and name it host_flags.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/ata/ahci_mvebu.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index 3ad46d26d9d5..563cc4c64d96 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -30,7 +30,7 @@
 
 struct ahci_mvebu_plat_data {
 	int (*plat_config)(struct ahci_host_priv *hpriv);
-	unsigned int flags;
+	unsigned int host_flags;
 };
 
 static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
@@ -196,7 +196,7 @@ static int ahci_mvebu_probe(struct platform_device *pdev)
 	if (IS_ERR(hpriv))
 		return PTR_ERR(hpriv);
 
-	hpriv->flags |= pdata->flags;
+	hpriv->flags |= pdata->host_flags;
 	hpriv->plat_data = (void *)pdata;
 
 	rc = ahci_platform_enable_resources(hpriv);
@@ -227,7 +227,7 @@ static const struct ahci_mvebu_plat_data ahci_mvebu_armada_380_plat_data = {
 
 static const struct ahci_mvebu_plat_data ahci_mvebu_armada_3700_plat_data = {
 	.plat_config = ahci_mvebu_armada_3700_config,
-	.flags = AHCI_HFLAG_SUSPEND_PHYS | AHCI_HFLAG_IGN_NOTSUPP_POWER_ON,
+	.host_flags = AHCI_HFLAG_SUSPEND_PHYS | AHCI_HFLAG_IGN_NOTSUPP_POWER_ON,
 };
 
 static const struct of_device_id ahci_mvebu_of_match[] = {
-- 
2.20.1


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[PATCH v3 2/9] ata: ahci: mvebu: Support A8k compatible

[sven.auhagen]

From: Miquel Raynal <miquel.raynal@bootlin.com>

The ahci_platform.c driver was historically the one bound to the A8k
AHCI compatible string, but before adding a quirk for this compatible,
it is probably cleaner to put all Marvell EBU code in one place: the
ahci_mvebu.c driver.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/ata/ahci_mvebu.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index 563cc4c64d96..ed82381dc4a7 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -96,6 +96,11 @@ static int ahci_mvebu_armada_3700_config(struct ahci_host_priv *hpriv)
 	return 0;
 }
 
+static int ahci_mvebu_armada_8k_config(struct ahci_host_priv *hpriv)
+{
+	return 0;
+}
+
 /**
  * ahci_mvebu_stop_engine
  *
@@ -230,6 +235,10 @@ static const struct ahci_mvebu_plat_data ahci_mvebu_armada_3700_plat_data = {
 	.host_flags = AHCI_HFLAG_SUSPEND_PHYS | AHCI_HFLAG_IGN_NOTSUPP_POWER_ON,
 };
 
+static const struct ahci_mvebu_plat_data ahci_mvebu_armada_8k_plat_data = {
+	.plat_config = ahci_mvebu_armada_8k_config,
+};
+
 static const struct of_device_id ahci_mvebu_of_match[] = {
 	{
 		.compatible = "marvell,armada-380-ahci",
@@ -239,6 +248,10 @@ static const struct of_device_id ahci_mvebu_of_match[] = {
 		.compatible = "marvell,armada-3700-ahci",
 		.data = &ahci_mvebu_armada_3700_plat_data,
 	},
+	{
+		.compatible = "marvell,armada-8k-ahci",
+		.data = &ahci_mvebu_armada_8k_plat_data,
+	},
 	{ },
 };
 MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
-- 
2.20.1

[PATCH v3 2/9] ata: ahci: mvebu: Support A8k compatible

[sven.auhagen]

From: Miquel Raynal <miquel.raynal@bootlin.com>

The ahci_platform.c driver was historically the one bound to the A8k
AHCI compatible string, but before adding a quirk for this compatible,
it is probably cleaner to put all Marvell EBU code in one place: the
ahci_mvebu.c driver.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/ata/ahci_mvebu.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index 563cc4c64d96..ed82381dc4a7 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -96,6 +96,11 @@ static int ahci_mvebu_armada_3700_config(struct ahci_host_priv *hpriv)
 	return 0;
 }
 
+static int ahci_mvebu_armada_8k_config(struct ahci_host_priv *hpriv)
+{
+	return 0;
+}
+
 /**
  * ahci_mvebu_stop_engine
  *
@@ -230,6 +235,10 @@ static const struct ahci_mvebu_plat_data ahci_mvebu_armada_3700_plat_data = {
 	.host_flags = AHCI_HFLAG_SUSPEND_PHYS | AHCI_HFLAG_IGN_NOTSUPP_POWER_ON,
 };
 
+static const struct ahci_mvebu_plat_data ahci_mvebu_armada_8k_plat_data = {
+	.plat_config = ahci_mvebu_armada_8k_config,
+};
+
 static const struct of_device_id ahci_mvebu_of_match[] = {
 	{
 		.compatible = "marvell,armada-380-ahci",
@@ -239,6 +248,10 @@ static const struct of_device_id ahci_mvebu_of_match[] = {
 		.compatible = "marvell,armada-3700-ahci",
 		.data = &ahci_mvebu_armada_3700_plat_data,
 	},
+	{
+		.compatible = "marvell,armada-8k-ahci",
+		.data = &ahci_mvebu_armada_8k_plat_data,
+	},
 	{ },
 };
 MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
-- 
2.20.1


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[PATCH v3 3/9] ata: libahci_platform: Do not try to get an IRQ when AHCI_HFLAG_MULTI_MSI is set

[sven.auhagen]

From: Sven Auhagen <sven.auhagen@voleatech.de>

When the ahci-host AHCI_HFLAG_MULTI_MSI flag is set then the driver must
provide a get_irq_vector callback and take care of getting the IRQs itself.
So in this case ahci_platform_init_host() should not try to get an
IRQ itself.

Suggested-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
---
 drivers/ata/libahci_platform.c | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index de638dafce21..f6f2a111d226 100644
--- a/drivers/ata/libahci_platform.c
+++ b/drivers/ata/libahci_platform.c
@@ -581,14 +581,16 @@ int ahci_platform_init_host(struct platform_device *pdev,
 	struct ata_host *host;
 	int i, irq, n_ports, rc;
 
-	irq = platform_get_irq(pdev, 0);
-	if (irq <= 0) {
-		if (irq != -EPROBE_DEFER)
-			dev_err(dev, "no irq\n");
-		return irq;
-	}
+	if (!(hpriv->flags & AHCI_HFLAG_MULTI_MSI)) {
+		irq = platform_get_irq(pdev, 0);
+		if (irq <= 0) {
+			if (irq != -EPROBE_DEFER)
+				dev_err(dev, "no irq\n");
+			return irq;
+		}
 
-	hpriv->irq = irq;
+		hpriv->irq = irq;
+	}
 
 	/* prepare host */
 	pi.private_data = (void *)(unsigned long)hpriv->flags;
-- 
2.20.1

[PATCH v3 3/9] ata: libahci_platform: Do not try to get an IRQ when AHCI_HFLAG_MULTI_MSI is set

[sven.auhagen]

From: Sven Auhagen <sven.auhagen@voleatech.de>

When the ahci-host AHCI_HFLAG_MULTI_MSI flag is set then the driver must
provide a get_irq_vector callback and take care of getting the IRQs itself.
So in this case ahci_platform_init_host() should not try to get an
IRQ itself.

Suggested-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
---
 drivers/ata/libahci_platform.c | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index de638dafce21..f6f2a111d226 100644
--- a/drivers/ata/libahci_platform.c
+++ b/drivers/ata/libahci_platform.c
@@ -581,14 +581,16 @@ int ahci_platform_init_host(struct platform_device *pdev,
 	struct ata_host *host;
 	int i, irq, n_ports, rc;
 
-	irq = platform_get_irq(pdev, 0);
-	if (irq <= 0) {
-		if (irq != -EPROBE_DEFER)
-			dev_err(dev, "no irq\n");
-		return irq;
-	}
+	if (!(hpriv->flags & AHCI_HFLAG_MULTI_MSI)) {
+		irq = platform_get_irq(pdev, 0);
+		if (irq <= 0) {
+			if (irq != -EPROBE_DEFER)
+				dev_err(dev, "no irq\n");
+			return irq;
+		}
 
-	hpriv->irq = irq;
+		hpriv->irq = irq;
+	}
 
 	/* prepare host */
 	pi.private_data = (void *)(unsigned long)hpriv->flags;
-- 
2.20.1


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[PATCH v3 4/9] ata: ahci: add ack callback to multi irq handler

[sven.auhagen]

From: Sven Auhagen <sven.auhagen@voleatech.de>

In order to support custom actions at the end of the irq handler
a multi_irq_host_ack callback is added to the struct ahci_host_priv.

Suggested-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
---
 drivers/ata/ahci.h    | 2 ++
 drivers/ata/libahci.c | 4 ++++
 2 files changed, 6 insertions(+)

diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 98b8baa47dc5..d8109e06794c 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -371,6 +371,8 @@ struct ahci_host_priv {
 	/* only required for per-port MSI(-X) support */
 	int			(*get_irq_vector)(struct ata_host *host,
 						  int port);
+
+	int			(*multi_irq_host_ack)(int irq, struct ata_port *ap);
 };
 
 extern int ahci_ignore_sss;
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index ea5bf5f4cbed..cf9839135a57 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -1897,6 +1897,7 @@ static void ahci_port_intr(struct ata_port *ap)
 static irqreturn_t ahci_multi_irqs_intr_hard(int irq, void *dev_instance)
 {
 	struct ata_port *ap = dev_instance;
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	void __iomem *port_mmio = ahci_port_base(ap);
 	u32 status;
 
@@ -1909,6 +1910,9 @@ static irqreturn_t ahci_multi_irqs_intr_hard(int irq, void *dev_instance)
 	ahci_handle_port_interrupt(ap, port_mmio, status);
 	spin_unlock(ap->lock);
 
+	if (hpriv->multi_irq_host_ack)
+		hpriv->multi_irq_host_ack(irq, ap);
+
 	VPRINTK("EXIT\n");
 
 	return IRQ_HANDLED;
-- 
2.20.1

[PATCH v3 4/9] ata: ahci: add ack callback to multi irq handler

[sven.auhagen]

From: Sven Auhagen <sven.auhagen@voleatech.de>

In order to support custom actions at the end of the irq handler
a multi_irq_host_ack callback is added to the struct ahci_host_priv.

Suggested-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
---
 drivers/ata/ahci.h    | 2 ++
 drivers/ata/libahci.c | 4 ++++
 2 files changed, 6 insertions(+)

diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 98b8baa47dc5..d8109e06794c 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -371,6 +371,8 @@ struct ahci_host_priv {
 	/* only required for per-port MSI(-X) support */
 	int			(*get_irq_vector)(struct ata_host *host,
 						  int port);
+
+	int			(*multi_irq_host_ack)(int irq, struct ata_port *ap);
 };
 
 extern int ahci_ignore_sss;
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index ea5bf5f4cbed..cf9839135a57 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -1897,6 +1897,7 @@ static void ahci_port_intr(struct ata_port *ap)
 static irqreturn_t ahci_multi_irqs_intr_hard(int irq, void *dev_instance)
 {
 	struct ata_port *ap = dev_instance;
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	void __iomem *port_mmio = ahci_port_base(ap);
 	u32 status;
 
@@ -1909,6 +1910,9 @@ static irqreturn_t ahci_multi_irqs_intr_hard(int irq, void *dev_instance)
 	ahci_handle_port_interrupt(ap, port_mmio, status);
 	spin_unlock(ap->lock);
 
+	if (hpriv->multi_irq_host_ack)
+		hpriv->multi_irq_host_ack(irq, ap);
+
 	VPRINTK("EXIT\n");
 
 	return IRQ_HANDLED;
-- 
2.20.1


_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v3 5/9] ata: ahci: mvebu: Add support for A8k legacy DT bindings

[sven.auhagen]

From: Sven Auhagen <sven.auhagen@voleatech.de>

The CP110 SATA unit has 2 ports, and a dedicated ICU entry per
port. In the past, the AHCI SATA driver only supported one interrupt
per SATA unit. To solve this conflict, the 2 SATA wired interrupts in
the South-Bridge got configured as 1 GIC interrupt in the
North-Bridge, regardless of the number of SATA ports actually
enabled/in use, and the DT bindings only referenced the interrupt of
one port.

Since then, this limitation has been addressed and this patch ensures
backward compatibility with old DTs not describing SATA ports
correctly directly from the AHCI MVEBU driver. This way, we will be
able to drop the hack from the ICU driver. IOW, when the A8k
compatible string is used and there is no sub-nodes in the DT, we
fake the creation and mapping of the second (missing) interrupt.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/ata/ahci_mvebu.c       | 126 ++++++++++++++++++++++++++++++---
 drivers/ata/libahci_platform.c |   3 +
 include/linux/ahci_platform.h  |   1 +
 3 files changed, 120 insertions(+), 10 deletions(-)

diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index ed82381dc4a7..22447b1bb23f 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -16,6 +16,7 @@
 #include <linux/mbus.h>
 #include <linux/module.h>
 #include <linux/of_device.h>
+#include <linux/of_irq.h>
 #include <linux/platform_device.h>
 #include "ahci.h"
 
@@ -28,9 +29,15 @@
 #define AHCI_WINDOW_BASE(win)	(0x64 + ((win) << 4))
 #define AHCI_WINDOW_SIZE(win)	(0x68 + ((win) << 4))
 
+#define ICU_SATA0_ICU_ID 109
+#define ICU_SATA1_ICU_ID 107
+
 struct ahci_mvebu_plat_data {
-	int (*plat_config)(struct ahci_host_priv *hpriv);
+	int (*plat_config)(struct platform_device *pdev,
+				   struct ahci_host_priv *hpriv);
 	unsigned int host_flags;
+	unsigned int resource_flags;
+	unsigned int port_irq[2];
 };
 
 static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
@@ -67,7 +74,8 @@ static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
 	writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
 }
 
-static int ahci_mvebu_armada_380_config(struct ahci_host_priv *hpriv)
+static int ahci_mvebu_armada_380_config(struct platform_device *pdev,
+				   struct ahci_host_priv *hpriv)
 {
 	const struct mbus_dram_target_info *dram;
 	int rc = 0;
@@ -83,7 +91,8 @@ static int ahci_mvebu_armada_380_config(struct ahci_host_priv *hpriv)
 	return rc;
 }
 
-static int ahci_mvebu_armada_3700_config(struct ahci_host_priv *hpriv)
+static int ahci_mvebu_armada_3700_config(struct platform_device *pdev,
+				   struct ahci_host_priv *hpriv)
 {
 	u32 reg;
 
@@ -96,8 +105,94 @@ static int ahci_mvebu_armada_3700_config(struct ahci_host_priv *hpriv)
 	return 0;
 }
 
-static int ahci_mvebu_armada_8k_config(struct ahci_host_priv *hpriv)
+static int multi_irq_host_ack_armada8k(int irq, struct ata_port *ap)
 {
+	struct ahci_host_priv *hpriv = ap->host->private_data;
+	void __iomem *mmio = hpriv->mmio;
+
+	writel(BIT(ap->port_no), mmio + HOST_IRQ_STAT);
+
+	return 0;
+}
+
+static int ahci_get_per_port_irq_armada8k(struct ata_host *host, int port)
+{
+	struct ahci_host_priv *hpriv = host->private_data;
+	struct ahci_mvebu_plat_data *pdata = hpriv->plat_data;
+
+	return pdata->port_irq[port];
+}
+
+static int ahci_mvebu_armada_8k_irq_backwards(struct ahci_host_priv *hpriv,
+				       struct device *dev)
+{
+	struct device_node *np = of_irq_find_parent(dev->of_node);
+	struct ahci_mvebu_plat_data *pdata = hpriv->plat_data;
+	struct irq_data *irqd = irq_get_irq_data(pdata->port_irq[0]);
+	int host_irq = irqd ? irqd_to_hwirq(irqd) : 0;
+	int missing_irq = (host_irq == ICU_SATA1_ICU_ID) ?
+		ICU_SATA0_ICU_ID : ICU_SATA1_ICU_ID;
+	struct irq_fwspec fwspec = {
+		.fwnode = of_node_to_fwnode(np),
+		.param_count = 2,
+		.param = {missing_irq, IRQ_TYPE_LEVEL_HIGH},
+	};
+	int irq;
+
+	pdata->port_irq[1] = irq_create_fwspec_mapping(&fwspec);
+	hpriv->mask_port_map = GENMASK(1, 0);
+
+	if (missing_irq == ICU_SATA0_ICU_ID) {
+		irq = pdata->port_irq[0];
+		pdata->port_irq[0] = pdata->port_irq[1];
+		pdata->port_irq[1] = irq;
+	}
+
+	return 0;
+}
+
+static int ahci_mvebu_armada_8k_config(struct platform_device *pdev,
+				   struct ahci_host_priv *hpriv)
+{
+	struct ahci_mvebu_plat_data *pdata = hpriv->plat_data;
+	struct device *dev = &pdev->dev;
+	struct device_node *child;
+	int port_irq, child_nodes, port = 0;
+
+	/* Get IRQs per port */
+	child_nodes = of_get_child_count(dev->of_node);
+	if (child_nodes) {
+		for_each_child_of_node(dev->of_node, child) {
+
+			port_irq = of_irq_get(child, 0);
+			if (!port_irq)
+				port_irq = -EINVAL;
+
+			if (port_irq < 0)
+				goto compat;
+
+			pdata->port_irq[port] = port_irq;
+			port++;
+		}
+
+		goto out;
+	}
+
+compat:
+	/* Backwards Compatibility Check */
+	port_irq = platform_get_irq(pdev, 0);
+	if (port_irq > 0) {
+		pdata->port_irq[0] = port_irq;
+		ahci_mvebu_armada_8k_irq_backwards(hpriv, dev);
+	} else {
+		dev_err(dev, "no irq\n");
+		return port_irq;
+	}
+
+out:
+	hpriv->flags |= AHCI_HFLAG_MULTI_MSI;
+	hpriv->get_irq_vector = ahci_get_per_port_irq_armada8k;
+
 	return 0;
 }
 
@@ -167,7 +262,7 @@ static int ahci_mvebu_resume(struct platform_device *pdev)
 	struct ahci_host_priv *hpriv = host->private_data;
 	const struct ahci_mvebu_plat_data *pdata = hpriv->plat_data;
 
-	pdata->plat_config(hpriv);
+	pdata->plat_config(pdev, hpriv);
 
 	return ahci_platform_resume_host(&pdev->dev);
 }
@@ -189,15 +284,22 @@ static struct scsi_host_template ahci_platform_sht = {
 
 static int ahci_mvebu_probe(struct platform_device *pdev)
 {
-	const struct ahci_mvebu_plat_data *pdata;
+	const struct ahci_mvebu_plat_data *pdata_plat;
+	struct ahci_mvebu_plat_data *pdata;
 	struct ahci_host_priv *hpriv;
 	int rc;
 
-	pdata = of_device_get_match_data(&pdev->dev);
-	if (!pdata)
+	pdata_plat = of_device_get_match_data(&pdev->dev);
+	if (!pdata_plat)
 		return -EINVAL;
 
-	hpriv = ahci_platform_get_resources(pdev, 0);
+	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+	if (!pdata)
+		return -ENOMEM;
+
+	memcpy(pdata, pdata_plat, sizeof(*pdata));
+
+	hpriv = ahci_platform_get_resources(pdev, pdata->resource_flags);
 	if (IS_ERR(hpriv))
 		return PTR_ERR(hpriv);
 
@@ -210,10 +312,13 @@ static int ahci_mvebu_probe(struct platform_device *pdev)
 
 	hpriv->stop_engine = ahci_mvebu_stop_engine;
 
-	rc = pdata->plat_config(hpriv);
+	rc = pdata->plat_config(pdev, hpriv);
 	if (rc)
 		goto disable_resources;
 
+	if (pdata->resource_flags & AHCI_PLATFORM_ARMADA8K_QUIRK)
+		hpriv->multi_irq_host_ack = multi_irq_host_ack_armada8k;
+
 	rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
 				     &ahci_platform_sht);
 	if (rc)
@@ -237,6 +342,7 @@ static const struct ahci_mvebu_plat_data ahci_mvebu_armada_3700_plat_data = {
 
 static const struct ahci_mvebu_plat_data ahci_mvebu_armada_8k_plat_data = {
 	.plat_config = ahci_mvebu_armada_8k_config,
+	.resource_flags = AHCI_PLATFORM_ARMADA8K_QUIRK,
 };
 
 static const struct of_device_id ahci_mvebu_of_match[] = {
diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index f6f2a111d226..a5d06565a5c7 100644
--- a/drivers/ata/libahci_platform.c
+++ b/drivers/ata/libahci_platform.c
@@ -464,6 +464,9 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
 	if (!child_nodes)
 		hpriv->nports = 1;
 
+	if (!child_nodes && flags & AHCI_PLATFORM_ARMADA8K_QUIRK)
+		hpriv->nports = 2;
+
 	hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL);
 	if (!hpriv->phys) {
 		rc = -ENOMEM;
diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h
index 49e5383d4222..99ff30b6c37c 100644
--- a/include/linux/ahci_platform.h
+++ b/include/linux/ahci_platform.h
@@ -42,5 +42,6 @@ int ahci_platform_suspend(struct device *dev);
 int ahci_platform_resume(struct device *dev);
 
 #define AHCI_PLATFORM_GET_RESETS	0x01
+#define AHCI_PLATFORM_ARMADA8K_QUIRK	0x02
 
 #endif /* _AHCI_PLATFORM_H */
-- 
2.20.1

[PATCH v3 5/9] ata: ahci: mvebu: Add support for A8k legacy DT bindings

[sven.auhagen]

From: Sven Auhagen <sven.auhagen@voleatech.de>

The CP110 SATA unit has 2 ports, and a dedicated ICU entry per
port. In the past, the AHCI SATA driver only supported one interrupt
per SATA unit. To solve this conflict, the 2 SATA wired interrupts in
the South-Bridge got configured as 1 GIC interrupt in the
North-Bridge, regardless of the number of SATA ports actually
enabled/in use, and the DT bindings only referenced the interrupt of
one port.

Since then, this limitation has been addressed and this patch ensures
backward compatibility with old DTs not describing SATA ports
correctly directly from the AHCI MVEBU driver. This way, we will be
able to drop the hack from the ICU driver. IOW, when the A8k
compatible string is used and there is no sub-nodes in the DT, we
fake the creation and mapping of the second (missing) interrupt.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/ata/ahci_mvebu.c       | 126 ++++++++++++++++++++++++++++++---
 drivers/ata/libahci_platform.c |   3 +
 include/linux/ahci_platform.h  |   1 +
 3 files changed, 120 insertions(+), 10 deletions(-)

diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index ed82381dc4a7..22447b1bb23f 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -16,6 +16,7 @@
 #include <linux/mbus.h>
 #include <linux/module.h>
 #include <linux/of_device.h>
+#include <linux/of_irq.h>
 #include <linux/platform_device.h>
 #include "ahci.h"
 
@@ -28,9 +29,15 @@
 #define AHCI_WINDOW_BASE(win)	(0x64 + ((win) << 4))
 #define AHCI_WINDOW_SIZE(win)	(0x68 + ((win) << 4))
 
+#define ICU_SATA0_ICU_ID 109
+#define ICU_SATA1_ICU_ID 107
+
 struct ahci_mvebu_plat_data {
-	int (*plat_config)(struct ahci_host_priv *hpriv);
+	int (*plat_config)(struct platform_device *pdev,
+				   struct ahci_host_priv *hpriv);
 	unsigned int host_flags;
+	unsigned int resource_flags;
+	unsigned int port_irq[2];
 };
 
 static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
@@ -67,7 +74,8 @@ static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
 	writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
 }
 
-static int ahci_mvebu_armada_380_config(struct ahci_host_priv *hpriv)
+static int ahci_mvebu_armada_380_config(struct platform_device *pdev,
+				   struct ahci_host_priv *hpriv)
 {
 	const struct mbus_dram_target_info *dram;
 	int rc = 0;
@@ -83,7 +91,8 @@ static int ahci_mvebu_armada_380_config(struct ahci_host_priv *hpriv)
 	return rc;
 }
 
-static int ahci_mvebu_armada_3700_config(struct ahci_host_priv *hpriv)
+static int ahci_mvebu_armada_3700_config(struct platform_device *pdev,
+				   struct ahci_host_priv *hpriv)
 {
 	u32 reg;
 
@@ -96,8 +105,94 @@ static int ahci_mvebu_armada_3700_config(struct ahci_host_priv *hpriv)
 	return 0;
 }
 
-static int ahci_mvebu_armada_8k_config(struct ahci_host_priv *hpriv)
+static int multi_irq_host_ack_armada8k(int irq, struct ata_port *ap)
 {
+	struct ahci_host_priv *hpriv = ap->host->private_data;
+	void __iomem *mmio = hpriv->mmio;
+
+	writel(BIT(ap->port_no), mmio + HOST_IRQ_STAT);
+
+	return 0;
+}
+
+static int ahci_get_per_port_irq_armada8k(struct ata_host *host, int port)
+{
+	struct ahci_host_priv *hpriv = host->private_data;
+	struct ahci_mvebu_plat_data *pdata = hpriv->plat_data;
+
+	return pdata->port_irq[port];
+}
+
+static int ahci_mvebu_armada_8k_irq_backwards(struct ahci_host_priv *hpriv,
+				       struct device *dev)
+{
+	struct device_node *np = of_irq_find_parent(dev->of_node);
+	struct ahci_mvebu_plat_data *pdata = hpriv->plat_data;
+	struct irq_data *irqd = irq_get_irq_data(pdata->port_irq[0]);
+	int host_irq = irqd ? irqd_to_hwirq(irqd) : 0;
+	int missing_irq = (host_irq == ICU_SATA1_ICU_ID) ?
+		ICU_SATA0_ICU_ID : ICU_SATA1_ICU_ID;
+	struct irq_fwspec fwspec = {
+		.fwnode = of_node_to_fwnode(np),
+		.param_count = 2,
+		.param = {missing_irq, IRQ_TYPE_LEVEL_HIGH},
+	};
+	int irq;
+
+	pdata->port_irq[1] = irq_create_fwspec_mapping(&fwspec);
+	hpriv->mask_port_map = GENMASK(1, 0);
+
+	if (missing_irq == ICU_SATA0_ICU_ID) {
+		irq = pdata->port_irq[0];
+		pdata->port_irq[0] = pdata->port_irq[1];
+		pdata->port_irq[1] = irq;
+	}
+
+	return 0;
+}
+
+static int ahci_mvebu_armada_8k_config(struct platform_device *pdev,
+				   struct ahci_host_priv *hpriv)
+{
+	struct ahci_mvebu_plat_data *pdata = hpriv->plat_data;
+	struct device *dev = &pdev->dev;
+	struct device_node *child;
+	int port_irq, child_nodes, port = 0;
+
+	/* Get IRQs per port */
+	child_nodes = of_get_child_count(dev->of_node);
+	if (child_nodes) {
+		for_each_child_of_node(dev->of_node, child) {
+
+			port_irq = of_irq_get(child, 0);
+			if (!port_irq)
+				port_irq = -EINVAL;
+
+			if (port_irq < 0)
+				goto compat;
+
+			pdata->port_irq[port] = port_irq;
+			port++;
+		}
+
+		goto out;
+	}
+
+compat:
+	/* Backwards Compatibility Check */
+	port_irq = platform_get_irq(pdev, 0);
+	if (port_irq > 0) {
+		pdata->port_irq[0] = port_irq;
+		ahci_mvebu_armada_8k_irq_backwards(hpriv, dev);
+	} else {
+		dev_err(dev, "no irq\n");
+		return port_irq;
+	}
+
+out:
+	hpriv->flags |= AHCI_HFLAG_MULTI_MSI;
+	hpriv->get_irq_vector = ahci_get_per_port_irq_armada8k;
+
 	return 0;
 }
 
@@ -167,7 +262,7 @@ static int ahci_mvebu_resume(struct platform_device *pdev)
 	struct ahci_host_priv *hpriv = host->private_data;
 	const struct ahci_mvebu_plat_data *pdata = hpriv->plat_data;
 
-	pdata->plat_config(hpriv);
+	pdata->plat_config(pdev, hpriv);
 
 	return ahci_platform_resume_host(&pdev->dev);
 }
@@ -189,15 +284,22 @@ static struct scsi_host_template ahci_platform_sht = {
 
 static int ahci_mvebu_probe(struct platform_device *pdev)
 {
-	const struct ahci_mvebu_plat_data *pdata;
+	const struct ahci_mvebu_plat_data *pdata_plat;
+	struct ahci_mvebu_plat_data *pdata;
 	struct ahci_host_priv *hpriv;
 	int rc;
 
-	pdata = of_device_get_match_data(&pdev->dev);
-	if (!pdata)
+	pdata_plat = of_device_get_match_data(&pdev->dev);
+	if (!pdata_plat)
 		return -EINVAL;
 
-	hpriv = ahci_platform_get_resources(pdev, 0);
+	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+	if (!pdata)
+		return -ENOMEM;
+
+	memcpy(pdata, pdata_plat, sizeof(*pdata));
+
+	hpriv = ahci_platform_get_resources(pdev, pdata->resource_flags);
 	if (IS_ERR(hpriv))
 		return PTR_ERR(hpriv);
 
@@ -210,10 +312,13 @@ static int ahci_mvebu_probe(struct platform_device *pdev)
 
 	hpriv->stop_engine = ahci_mvebu_stop_engine;
 
-	rc = pdata->plat_config(hpriv);
+	rc = pdata->plat_config(pdev, hpriv);
 	if (rc)
 		goto disable_resources;
 
+	if (pdata->resource_flags & AHCI_PLATFORM_ARMADA8K_QUIRK)
+		hpriv->multi_irq_host_ack = multi_irq_host_ack_armada8k;
+
 	rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
 				     &ahci_platform_sht);
 	if (rc)
@@ -237,6 +342,7 @@ static const struct ahci_mvebu_plat_data ahci_mvebu_armada_3700_plat_data = {
 
 static const struct ahci_mvebu_plat_data ahci_mvebu_armada_8k_plat_data = {
 	.plat_config = ahci_mvebu_armada_8k_config,
+	.resource_flags = AHCI_PLATFORM_ARMADA8K_QUIRK,
 };
 
 static const struct of_device_id ahci_mvebu_of_match[] = {
diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index f6f2a111d226..a5d06565a5c7 100644
--- a/drivers/ata/libahci_platform.c
+++ b/drivers/ata/libahci_platform.c
@@ -464,6 +464,9 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
 	if (!child_nodes)
 		hpriv->nports = 1;
 
+	if (!child_nodes && flags & AHCI_PLATFORM_ARMADA8K_QUIRK)
+		hpriv->nports = 2;
+
 	hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL);
 	if (!hpriv->phys) {
 		rc = -ENOMEM;
diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h
index 49e5383d4222..99ff30b6c37c 100644
--- a/include/linux/ahci_platform.h
+++ b/include/linux/ahci_platform.h
@@ -42,5 +42,6 @@ int ahci_platform_suspend(struct device *dev);
 int ahci_platform_resume(struct device *dev);
 
 #define AHCI_PLATFORM_GET_RESETS	0x01
+#define AHCI_PLATFORM_ARMADA8K_QUIRK	0x02
 
 #endif /* _AHCI_PLATFORM_H */
-- 
2.20.1


_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v3 6/9] irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack

[sven.auhagen]

From: Miquel Raynal <miquel.raynal@bootlin.com>

When writing the driver, a hack was introduced to configure both SATA
interrupts regardless of the port in use to overcome a limitation in
the SATA core. Now that this limitation has been addressed and the
hack moved in the (historically) responsible SATA driver,
ahci_{platform,mvebu}.c, let's clean this driver section.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/irqchip/irq-mvebu-icu.c | 18 ------------------
 1 file changed, 18 deletions(-)

diff --git a/drivers/irqchip/irq-mvebu-icu.c b/drivers/irqchip/irq-mvebu-icu.c
index 91adf771f185..3e29f8d5b33b 100644
--- a/drivers/irqchip/irq-mvebu-icu.c
+++ b/drivers/irqchip/irq-mvebu-icu.c
@@ -38,8 +38,6 @@
 
 /* ICU definitions */
 #define ICU_MAX_IRQS		207
-#define ICU_SATA0_ICU_ID	109
-#define ICU_SATA1_ICU_ID	107
 
 struct mvebu_icu_subset_data {
 	unsigned int icu_group;
@@ -111,22 +109,6 @@ static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
 	}
 
 	writel_relaxed(icu_int, icu->base + ICU_INT_CFG(d->hwirq));
-
-	/*
-	 * The SATA unit has 2 ports, and a dedicated ICU entry per
-	 * port. The ahci sata driver supports only one irq interrupt
-	 * per SATA unit. To solve this conflict, we configure the 2
-	 * SATA wired interrupts in the south bridge into 1 GIC
-	 * interrupt in the north bridge. Even if only a single port
-	 * is enabled, if sata node is enabled, both interrupts are
-	 * configured (regardless of which port is actually in use).
-	 */
-	if (d->hwirq == ICU_SATA0_ICU_ID || d->hwirq == ICU_SATA1_ICU_ID) {
-		writel_relaxed(icu_int,
-			       icu->base + ICU_INT_CFG(ICU_SATA0_ICU_ID));
-		writel_relaxed(icu_int,
-			       icu->base + ICU_INT_CFG(ICU_SATA1_ICU_ID));
-	}
 }
 
 static struct irq_chip mvebu_icu_nsr_chip = {
-- 
2.20.1

[PATCH v3 6/9] irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack

[sven.auhagen]

From: Miquel Raynal <miquel.raynal@bootlin.com>

When writing the driver, a hack was introduced to configure both SATA
interrupts regardless of the port in use to overcome a limitation in
the SATA core. Now that this limitation has been addressed and the
hack moved in the (historically) responsible SATA driver,
ahci_{platform,mvebu}.c, let's clean this driver section.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/irqchip/irq-mvebu-icu.c | 18 ------------------
 1 file changed, 18 deletions(-)

diff --git a/drivers/irqchip/irq-mvebu-icu.c b/drivers/irqchip/irq-mvebu-icu.c
index 91adf771f185..3e29f8d5b33b 100644
--- a/drivers/irqchip/irq-mvebu-icu.c
+++ b/drivers/irqchip/irq-mvebu-icu.c
@@ -38,8 +38,6 @@
 
 /* ICU definitions */
 #define ICU_MAX_IRQS		207
-#define ICU_SATA0_ICU_ID	109
-#define ICU_SATA1_ICU_ID	107
 
 struct mvebu_icu_subset_data {
 	unsigned int icu_group;
@@ -111,22 +109,6 @@ static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
 	}
 
 	writel_relaxed(icu_int, icu->base + ICU_INT_CFG(d->hwirq));
-
-	/*
-	 * The SATA unit has 2 ports, and a dedicated ICU entry per
-	 * port. The ahci sata driver supports only one irq interrupt
-	 * per SATA unit. To solve this conflict, we configure the 2
-	 * SATA wired interrupts in the south bridge into 1 GIC
-	 * interrupt in the north bridge. Even if only a single port
-	 * is enabled, if sata node is enabled, both interrupts are
-	 * configured (regardless of which port is actually in use).
-	 */
-	if (d->hwirq == ICU_SATA0_ICU_ID || d->hwirq == ICU_SATA1_ICU_ID) {
-		writel_relaxed(icu_int,
-			       icu->base + ICU_INT_CFG(ICU_SATA0_ICU_ID));
-		writel_relaxed(icu_int,
-			       icu->base + ICU_INT_CFG(ICU_SATA1_ICU_ID));
-	}
 }
 
 static struct irq_chip mvebu_icu_nsr_chip = {
-- 
2.20.1


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[PATCH v3 7/9] dt-bindings: ata: Update ahci bindings with possible per-port interrupts

[sven.auhagen]

From: Miquel Raynal <miquel.raynal@bootlin.com>

Update bindings to reflect the fact that a SATA IP can either have:
- only one interrupt: in this case an 'interrupts' property is
  declared at the root of the node;
or
- each SATA port can have their own interrupt: in this case there is
  one 'interrupts' property per port/sub-node and none at the root.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 Documentation/devicetree/bindings/ata/ahci-platform.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 77091a277642..83d715cbcecd 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -49,6 +49,12 @@ And at least one of the following properties:
 - phys		    : reference to the SATA PHY node
 - target-supply     : regulator for SATA target power
 
+Sub-nodes optional properties:
+- interrupts        : <interrupt mapping for SATA ports IRQ>, please
+                      note that either the root SATA node has the
+                      interrupts property, or there is one per SATA
+                      port, but not both at the same time.
+
 Examples:
         sata@ffe08000 {
 		compatible = "snps,spear-ahci";
-- 
2.20.1

[PATCH v3 7/9] dt-bindings: ata: Update ahci bindings with possible per-port interrupts

[sven.auhagen]

From: Miquel Raynal <miquel.raynal@bootlin.com>

Update bindings to reflect the fact that a SATA IP can either have:
- only one interrupt: in this case an 'interrupts' property is
  declared at the root of the node;
or
- each SATA port can have their own interrupt: in this case there is
  one 'interrupts' property per port/sub-node and none at the root.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 Documentation/devicetree/bindings/ata/ahci-platform.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 77091a277642..83d715cbcecd 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -49,6 +49,12 @@ And at least one of the following properties:
 - phys		    : reference to the SATA PHY node
 - target-supply     : regulator for SATA target power
 
+Sub-nodes optional properties:
+- interrupts        : <interrupt mapping for SATA ports IRQ>, please
+                      note that either the root SATA node has the
+                      interrupts property, or there is one per SATA
+                      port, but not both at the same time.
+
 Examples:
         sata@ffe08000 {
 		compatible = "snps,spear-ahci";
-- 
2.20.1


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[PATCH v3 8/9] dt-bindings: ata: Update ahci_mvebu bindings

[sven.auhagen]

From: Miquel Raynal <miquel.raynal@bootlin.com>

Update bindings with the already in use Armada 8k compatible.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 Documentation/devicetree/bindings/ata/ahci-platform.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 83d715cbcecd..78d9d413a5c6 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -15,6 +15,7 @@ Required properties:
   - "ibm,476gtr-ahci"
   - "marvell,armada-380-ahci"
   - "marvell,armada-3700-ahci"
+  - "marvell,armada-8k-ahci"
   - "snps,dwc-ahci"
   - "snps,spear-ahci"
   - "generic-ahci"
-- 
2.20.1

[PATCH v3 8/9] dt-bindings: ata: Update ahci_mvebu bindings

[sven.auhagen]

From: Miquel Raynal <miquel.raynal@bootlin.com>

Update bindings with the already in use Armada 8k compatible.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 Documentation/devicetree/bindings/ata/ahci-platform.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 83d715cbcecd..78d9d413a5c6 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -15,6 +15,7 @@ Required properties:
   - "ibm,476gtr-ahci"
   - "marvell,armada-380-ahci"
   - "marvell,armada-3700-ahci"
+  - "marvell,armada-8k-ahci"
   - "snps,dwc-ahci"
   - "snps,spear-ahci"
   - "generic-ahci"
-- 
2.20.1


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[PATCH v3 9/9] arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts

[sven.auhagen]

From: Sven Auhagen <sven.auhagen@voleatech.de>

There are two SATA ports per CP110. Each of them has a dedicated
interrupt. Describe the real hardware by adding two SATA ports to the
CP110 SATA node.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
index 9dcf16beabf5..ec27294f097b 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
@@ -300,11 +300,9 @@
 		};
 
 		CP11X_LABEL(sata0): sata@540000 {
-			compatible = "marvell,armada-8k-ahci",
-			"generic-ahci";
+			compatible = "marvell,armada-8k-ahci";
 			reg = <0x540000 0x30000>;
 			dma-coherent;
-			interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&CP11X_LABEL(clk) 1 15>,
 				 <&CP11X_LABEL(clk) 1 16>;
 			#address-cells = <1>;
@@ -312,10 +310,12 @@
 			status = "disabled";
 
 			sata-port@0 {
+				interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
 				reg = <0>;
 			};
 
 			sata-port@1 {
+				interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
 				reg = <1>;
 			};
 		};
-- 
2.20.1

[PATCH v3 9/9] arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts

[sven.auhagen]

From: Sven Auhagen <sven.auhagen@voleatech.de>

There are two SATA ports per CP110. Each of them has a dedicated
interrupt. Describe the real hardware by adding two SATA ports to the
CP110 SATA node.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
index 9dcf16beabf5..ec27294f097b 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
@@ -300,11 +300,9 @@
 		};
 
 		CP11X_LABEL(sata0): sata@540000 {
-			compatible = "marvell,armada-8k-ahci",
-			"generic-ahci";
+			compatible = "marvell,armada-8k-ahci";
 			reg = <0x540000 0x30000>;
 			dma-coherent;
-			interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&CP11X_LABEL(clk) 1 15>,
 				 <&CP11X_LABEL(clk) 1 16>;
 			#address-cells = <1>;
@@ -312,10 +310,12 @@
 			status = "disabled";
 
 			sata-port@0 {
+				interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
 				reg = <0>;
 			};
 
 			sata-port@1 {
+				interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
 				reg = <1>;
 			};
 		};
-- 
2.20.1


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Re: [PATCH v3 9/9] arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts

[Gregory CLEMENT]

Hi Sven,

> From: Sven Auhagen <sven.auhagen@voleatech.de>
>
> There are two SATA ports per CP110. Each of them has a dedicated
> interrupt. Describe the real hardware by adding two SATA ports to the
> CP110 SATA node.
>
> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
> Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

Applied on mvebu/dt64

Thanks,

Gregory

> ---
>  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
> index 9dcf16beabf5..ec27294f097b 100644
> --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
> @@ -300,11 +300,9 @@
>  		};
>  
>  		CP11X_LABEL(sata0): sata@540000 {
> -			compatible = "marvell,armada-8k-ahci",
> -			"generic-ahci";
> +			compatible = "marvell,armada-8k-ahci";
>  			reg = <0x540000 0x30000>;
>  			dma-coherent;
> -			interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&CP11X_LABEL(clk) 1 15>,
>  				 <&CP11X_LABEL(clk) 1 16>;
>  			#address-cells = <1>;
> @@ -312,10 +310,12 @@
>  			status = "disabled";
>  
>  			sata-port@0 {
> +				interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
>  				reg = <0>;
>  			};
>  
>  			sata-port@1 {
> +				interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
>  				reg = <1>;
>  			};
>  		};
> -- 
> 2.20.1
>

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

Re: [PATCH v3 9/9] arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts

[Gregory CLEMENT]

Hi Sven,

> From: Sven Auhagen <sven.auhagen@voleatech.de>
>
> There are two SATA ports per CP110. Each of them has a dedicated
> interrupt. Describe the real hardware by adding two SATA ports to the
> CP110 SATA node.
>
> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
> Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

Applied on mvebu/dt64

Thanks,

Gregory

> ---
>  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
> index 9dcf16beabf5..ec27294f097b 100644
> --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
> @@ -300,11 +300,9 @@
>  		};
>  
>  		CP11X_LABEL(sata0): sata@540000 {
> -			compatible = "marvell,armada-8k-ahci",
> -			"generic-ahci";
> +			compatible = "marvell,armada-8k-ahci";
>  			reg = <0x540000 0x30000>;
>  			dma-coherent;
> -			interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&CP11X_LABEL(clk) 1 15>,
>  				 <&CP11X_LABEL(clk) 1 16>;
>  			#address-cells = <1>;
> @@ -312,10 +310,12 @@
>  			status = "disabled";
>  
>  			sata-port@0 {
> +				interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
>  				reg = <0>;
>  			};
>  
>  			sata-port@1 {
> +				interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
>  				reg = <1>;
>  			};
>  		};
> -- 
> 2.20.1
>

-- 
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Embedded Linux and Kernel engineering
http://bootlin.com

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Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Sven Auhagen]

Hello,

can I ask about the status of this patch?
As far as I can tell it was not merged to ata and I did not receive
any further feedback that there was a problem with the patch series.

As a matter of fact the device tree part was already merged by
Gregory Clement.

Best and thanks
Sven

On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
> From: Sven Auhagen <sven.auhagen@voleatech.de>
> 
> Hello,
> 
> There were already 4 versions of this series from Miquèl.
> I talked to Miquèl and I fixed up the last comments from v4.
> I am looking for feedback if this patch series is now ready to be merged
> and what should be further changed.
> 
> Here is the original cover letter:
> 
> Some time ago, when the initial support for Armada CP110 was
> contributed, the SATA core was not able to handle per-port
> interrupts. Despite the hardware reality, the device tree only
> represents one main interrupt for the two ports. Having both SATA
> ports enabled at the same time has been achieved by a hack in the ICU
> driver(1) that faked the use of the two interrupts, no matter which
> SATA port was in use.
> 
> Now that the SATA core is ready to handle more than one interrupt,
> this series adds support for it in the libahci_platform code. The
> CP110 device tree must be updated to reflect the two SATA ports
> available and their respective interrupts. To do not break DT backward
> compatibility, the ahci_platform driver now embeds a special quirk
> which checks if the DT is valid (only for A8k compatible) and, if
> needed, creates the two missing sub-nodes, and assign them the
> relevant "reg" and "interrupts" properties, before removing the main
> SATA node "interrupts" one.
> 
> (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
> interrupts into MSIs for the AP806 (north-bridge).
> 
> Best
> Sven
> 
> Change from v2:
>   * Fix commit message of custom irq init for host init
> 
> Change from v1:
>   * Add a patch to enable custom irq initialization in 
>     plattform init host
>   * Add multi_irq_host_ack callback for the msi irq handler
>   * Rework the ahci mvebu patch to initiate the irq and use
>     the new multi_irq_host_ack to handle the custom irq code.
>     Remove the custom irq handler and duplicate code.
>   * Fix the armada8k backwards compatibility code
>   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
> 
> Miquel Raynal (5):
>   ata: ahci: mvebu: Rename a platform data flag
>   ata: ahci: mvebu: Support A8k compatible
>   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
>   dt-bindings: ata: Update ahci bindings with possible per-port
>     interrupts
>   dt-bindings: ata: Update ahci_mvebu bindings
> 
> Sven Auhagen (4):
>   ata: libahci_platform: Do not try to get an IRQ when
>     AHCI_HFLAG_MULTI_MSI is set
>   ata: ahci: add ack callback to multi irq handler
>   ata: ahci: mvebu: Add support for A8k legacy DT bindings
>   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
> 
>  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
>  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
>  drivers/ata/ahci.h                            |   2 +
>  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
>  drivers/ata/libahci.c                         |   4 +
>  drivers/ata/libahci_platform.c                |  19 ++-
>  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
>  include/linux/ahci_platform.h                 |   1 +
>  8 files changed, 160 insertions(+), 40 deletions(-)
> 
> -- 
> 2.20.1
> 
> 

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Sven Auhagen]

Hello,

can I ask about the status of this patch?
As far as I can tell it was not merged to ata and I did not receive
any further feedback that there was a problem with the patch series.

As a matter of fact the device tree part was already merged by
Gregory Clement.

Best and thanks
Sven

On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
> From: Sven Auhagen <sven.auhagen@voleatech.de>
> 
> Hello,
> 
> There were already 4 versions of this series from Miquèl.
> I talked to Miquèl and I fixed up the last comments from v4.
> I am looking for feedback if this patch series is now ready to be merged
> and what should be further changed.
> 
> Here is the original cover letter:
> 
> Some time ago, when the initial support for Armada CP110 was
> contributed, the SATA core was not able to handle per-port
> interrupts. Despite the hardware reality, the device tree only
> represents one main interrupt for the two ports. Having both SATA
> ports enabled at the same time has been achieved by a hack in the ICU
> driver(1) that faked the use of the two interrupts, no matter which
> SATA port was in use.
> 
> Now that the SATA core is ready to handle more than one interrupt,
> this series adds support for it in the libahci_platform code. The
> CP110 device tree must be updated to reflect the two SATA ports
> available and their respective interrupts. To do not break DT backward
> compatibility, the ahci_platform driver now embeds a special quirk
> which checks if the DT is valid (only for A8k compatible) and, if
> needed, creates the two missing sub-nodes, and assign them the
> relevant "reg" and "interrupts" properties, before removing the main
> SATA node "interrupts" one.
> 
> (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
> interrupts into MSIs for the AP806 (north-bridge).
> 
> Best
> Sven
> 
> Change from v2:
>   * Fix commit message of custom irq init for host init
> 
> Change from v1:
>   * Add a patch to enable custom irq initialization in 
>     plattform init host
>   * Add multi_irq_host_ack callback for the msi irq handler
>   * Rework the ahci mvebu patch to initiate the irq and use
>     the new multi_irq_host_ack to handle the custom irq code.
>     Remove the custom irq handler and duplicate code.
>   * Fix the armada8k backwards compatibility code
>   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
> 
> Miquel Raynal (5):
>   ata: ahci: mvebu: Rename a platform data flag
>   ata: ahci: mvebu: Support A8k compatible
>   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
>   dt-bindings: ata: Update ahci bindings with possible per-port
>     interrupts
>   dt-bindings: ata: Update ahci_mvebu bindings
> 
> Sven Auhagen (4):
>   ata: libahci_platform: Do not try to get an IRQ when
>     AHCI_HFLAG_MULTI_MSI is set
>   ata: ahci: add ack callback to multi irq handler
>   ata: ahci: mvebu: Add support for A8k legacy DT bindings
>   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
> 
>  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
>  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
>  drivers/ata/ahci.h                            |   2 +
>  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
>  drivers/ata/libahci.c                         |   4 +
>  drivers/ata/libahci_platform.c                |  19 ++-
>  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
>  include/linux/ahci_platform.h                 |   1 +
>  8 files changed, 160 insertions(+), 40 deletions(-)
> 
> -- 
> 2.20.1
> 
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Marcin Wojtas]

[Resend in plain text]

Hi,

Just letting everyone know - merging only the DT part of this patchset
broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
release.

FYI, I'm currently updating the device trees in EDK2 based on the
v5.11 DT sources - I'm going to keep the previous binding anyway, as
the new one breaks booting with AHCI not only for older Linux
versions, but also for other OSs (yet another argument to use ACPI).

Best regards,
Marcin


sob., 27 lut 2021 o 12:02 Sven Auhagen <sven.auhagen@voleatech.de> napisał(a):
>
> Hello,
>
> can I ask about the status of this patch?
> As far as I can tell it was not merged to ata and I did not receive
> any further feedback that there was a problem with the patch series.
>
> As a matter of fact the device tree part was already merged by
> Gregory Clement.
>
> Best and thanks
> Sven
>
> On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
> > From: Sven Auhagen <sven.auhagen@voleatech.de>
> >
> > Hello,
> >
> > There were already 4 versions of this series from Miquèl.
> > I talked to Miquèl and I fixed up the last comments from v4.
> > I am looking for feedback if this patch series is now ready to be merged
> > and what should be further changed.
> >
> > Here is the original cover letter:
> >
> > Some time ago, when the initial support for Armada CP110 was
> > contributed, the SATA core was not able to handle per-port
> > interrupts. Despite the hardware reality, the device tree only
> > represents one main interrupt for the two ports. Having both SATA
> > ports enabled at the same time has been achieved by a hack in the ICU
> > driver(1) that faked the use of the two interrupts, no matter which
> > SATA port was in use.
> >
> > Now that the SATA core is ready to handle more than one interrupt,
> > this series adds support for it in the libahci_platform code. The
> > CP110 device tree must be updated to reflect the two SATA ports
> > available and their respective interrupts. To do not break DT backward
> > compatibility, the ahci_platform driver now embeds a special quirk
> > which checks if the DT is valid (only for A8k compatible) and, if
> > needed, creates the two missing sub-nodes, and assign them the
> > relevant "reg" and "interrupts" properties, before removing the main
> > SATA node "interrupts" one.
> >
> > (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
> > interrupts into MSIs for the AP806 (north-bridge).
> >
> > Best
> > Sven
> >
> > Change from v2:
> >   * Fix commit message of custom irq init for host init
> >
> > Change from v1:
> >   * Add a patch to enable custom irq initialization in
> >     plattform init host
> >   * Add multi_irq_host_ack callback for the msi irq handler
> >   * Rework the ahci mvebu patch to initiate the irq and use
> >     the new multi_irq_host_ack to handle the custom irq code.
> >     Remove the custom irq handler and duplicate code.
> >   * Fix the armada8k backwards compatibility code
> >   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
> >
> > Miquel Raynal (5):
> >   ata: ahci: mvebu: Rename a platform data flag
> >   ata: ahci: mvebu: Support A8k compatible
> >   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
> >   dt-bindings: ata: Update ahci bindings with possible per-port
> >     interrupts
> >   dt-bindings: ata: Update ahci_mvebu bindings
> >
> > Sven Auhagen (4):
> >   ata: libahci_platform: Do not try to get an IRQ when
> >     AHCI_HFLAG_MULTI_MSI is set
> >   ata: ahci: add ack callback to multi irq handler
> >   ata: ahci: mvebu: Add support for A8k legacy DT bindings
> >   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
> >
> >  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
> >  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
> >  drivers/ata/ahci.h                            |   2 +
> >  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
> >  drivers/ata/libahci.c                         |   4 +
> >  drivers/ata/libahci_platform.c                |  19 ++-
> >  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
> >  include/linux/ahci_platform.h                 |   1 +
> >  8 files changed, 160 insertions(+), 40 deletions(-)
> >
> > --
> > 2.20.1
> >
> >
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Marcin Wojtas]

[Resend in plain text]

Hi,

Just letting everyone know - merging only the DT part of this patchset
broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
release.

FYI, I'm currently updating the device trees in EDK2 based on the
v5.11 DT sources - I'm going to keep the previous binding anyway, as
the new one breaks booting with AHCI not only for older Linux
versions, but also for other OSs (yet another argument to use ACPI).

Best regards,
Marcin


sob., 27 lut 2021 o 12:02 Sven Auhagen <sven.auhagen@voleatech.de> napisał(a):
>
> Hello,
>
> can I ask about the status of this patch?
> As far as I can tell it was not merged to ata and I did not receive
> any further feedback that there was a problem with the patch series.
>
> As a matter of fact the device tree part was already merged by
> Gregory Clement.
>
> Best and thanks
> Sven
>
> On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
> > From: Sven Auhagen <sven.auhagen@voleatech.de>
> >
> > Hello,
> >
> > There were already 4 versions of this series from Miquèl.
> > I talked to Miquèl and I fixed up the last comments from v4.
> > I am looking for feedback if this patch series is now ready to be merged
> > and what should be further changed.
> >
> > Here is the original cover letter:
> >
> > Some time ago, when the initial support for Armada CP110 was
> > contributed, the SATA core was not able to handle per-port
> > interrupts. Despite the hardware reality, the device tree only
> > represents one main interrupt for the two ports. Having both SATA
> > ports enabled at the same time has been achieved by a hack in the ICU
> > driver(1) that faked the use of the two interrupts, no matter which
> > SATA port was in use.
> >
> > Now that the SATA core is ready to handle more than one interrupt,
> > this series adds support for it in the libahci_platform code. The
> > CP110 device tree must be updated to reflect the two SATA ports
> > available and their respective interrupts. To do not break DT backward
> > compatibility, the ahci_platform driver now embeds a special quirk
> > which checks if the DT is valid (only for A8k compatible) and, if
> > needed, creates the two missing sub-nodes, and assign them the
> > relevant "reg" and "interrupts" properties, before removing the main
> > SATA node "interrupts" one.
> >
> > (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
> > interrupts into MSIs for the AP806 (north-bridge).
> >
> > Best
> > Sven
> >
> > Change from v2:
> >   * Fix commit message of custom irq init for host init
> >
> > Change from v1:
> >   * Add a patch to enable custom irq initialization in
> >     plattform init host
> >   * Add multi_irq_host_ack callback for the msi irq handler
> >   * Rework the ahci mvebu patch to initiate the irq and use
> >     the new multi_irq_host_ack to handle the custom irq code.
> >     Remove the custom irq handler and duplicate code.
> >   * Fix the armada8k backwards compatibility code
> >   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
> >
> > Miquel Raynal (5):
> >   ata: ahci: mvebu: Rename a platform data flag
> >   ata: ahci: mvebu: Support A8k compatible
> >   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
> >   dt-bindings: ata: Update ahci bindings with possible per-port
> >     interrupts
> >   dt-bindings: ata: Update ahci_mvebu bindings
> >
> > Sven Auhagen (4):
> >   ata: libahci_platform: Do not try to get an IRQ when
> >     AHCI_HFLAG_MULTI_MSI is set
> >   ata: ahci: add ack callback to multi irq handler
> >   ata: ahci: mvebu: Add support for A8k legacy DT bindings
> >   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
> >
> >  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
> >  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
> >  drivers/ata/ahci.h                            |   2 +
> >  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
> >  drivers/ata/libahci.c                         |   4 +
> >  drivers/ata/libahci_platform.c                |  19 ++-
> >  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
> >  include/linux/ahci_platform.h                 |   1 +
> >  8 files changed, 160 insertions(+), 40 deletions(-)
> >
> > --
> > 2.20.1
> >
> >
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Gregory CLEMENT]

Hello Sven,

> Hello,
>
> can I ask about the status of this patch?
> As far as I can tell it was not merged to ata and I did not receive
> any further feedback that there was a problem with the patch series.
>
> As a matter of fact the device tree part was already merged by
> Gregory Clement.

As the maintainer of the ahci subsytem reviewed the series, I really
expected that he merged it, so me neither I don't understand what
happened.

Hans,

is there still anything wrong that prevent you applying the series ?

Grégory


>
> Best and thanks
> Sven
>
> On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
>> From: Sven Auhagen <sven.auhagen@voleatech.de>
>> 
>> Hello, 
>> 
>> There were already 4 versions of this series from Miquèl.
>> I talked to Miquèl and I fixed up the last comments from v4.
>> I am looking for feedback if this patch series is now ready to be merged
>> and what should be further changed.
>> 
>> Here is the original cover letter:
>> 
>> Some time ago, when the initial support for Armada CP110 was
>> contributed, the SATA core was not able to handle per-port
>> interrupts. Despite the hardware reality, the device tree only
>> represents one main interrupt for the two ports. Having both SATA
>> ports enabled at the same time has been achieved by a hack in the ICU
>> driver(1) that faked the use of the two interrupts, no matter which
>> SATA port was in use.
>> 
>> Now that the SATA core is ready to handle more than one interrupt,
>> this series adds support for it in the libahci_platform code. The
>> CP110 device tree must be updated to reflect the two SATA ports
>> available and their respective interrupts. To do not break DT backward
>> compatibility, the ahci_platform driver now embeds a special quirk
>> which checks if the DT is valid (only for A8k compatible) and, if
>> needed, creates the two missing sub-nodes, and assign them the
>> relevant "reg" and "interrupts" properties, before removing the main
>> SATA node "interrupts" one.
>> 
>> (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
>> interrupts into MSIs for the AP806 (north-bridge).
>> 
>> Best
>> Sven
>> 
>> Change from v2:
>>   * Fix commit message of custom irq init for host init
>> 
>> Change from v1:
>>   * Add a patch to enable custom irq initialization in 
>>     plattform init host
>>   * Add multi_irq_host_ack callback for the msi irq handler
>>   * Rework the ahci mvebu patch to initiate the irq and use
>>     the new multi_irq_host_ack to handle the custom irq code.
>>     Remove the custom irq handler and duplicate code.
>>   * Fix the armada8k backwards compatibility code
>>   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
>> 
>> Miquel Raynal (5):
>>   ata: ahci: mvebu: Rename a platform data flag
>>   ata: ahci: mvebu: Support A8k compatible
>>   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
>>   dt-bindings: ata: Update ahci bindings with possible per-port
>>     interrupts
>>   dt-bindings: ata: Update ahci_mvebu bindings
>> 
>> Sven Auhagen (4):
>>   ata: libahci_platform: Do not try to get an IRQ when
>>     AHCI_HFLAG_MULTI_MSI is set
>>   ata: ahci: add ack callback to multi irq handler
>>   ata: ahci: mvebu: Add support for A8k legacy DT bindings
>>   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
>> 
>>  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
>>  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
>>  drivers/ata/ahci.h                            |   2 +
>>  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
>>  drivers/ata/libahci.c                         |   4 +
>>  drivers/ata/libahci_platform.c                |  19 ++-
>>  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
>>  include/linux/ahci_platform.h                 |   1 +
>>  8 files changed, 160 insertions(+), 40 deletions(-)
>> 
>> -- 
>> 2.20.1
>> 
>> 

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Gregory CLEMENT]

Hello Sven,

> Hello,
>
> can I ask about the status of this patch?
> As far as I can tell it was not merged to ata and I did not receive
> any further feedback that there was a problem with the patch series.
>
> As a matter of fact the device tree part was already merged by
> Gregory Clement.

As the maintainer of the ahci subsytem reviewed the series, I really
expected that he merged it, so me neither I don't understand what
happened.

Hans,

is there still anything wrong that prevent you applying the series ?

Grégory


>
> Best and thanks
> Sven
>
> On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
>> From: Sven Auhagen <sven.auhagen@voleatech.de>
>> 
>> Hello, 
>> 
>> There were already 4 versions of this series from Miquèl.
>> I talked to Miquèl and I fixed up the last comments from v4.
>> I am looking for feedback if this patch series is now ready to be merged
>> and what should be further changed.
>> 
>> Here is the original cover letter:
>> 
>> Some time ago, when the initial support for Armada CP110 was
>> contributed, the SATA core was not able to handle per-port
>> interrupts. Despite the hardware reality, the device tree only
>> represents one main interrupt for the two ports. Having both SATA
>> ports enabled at the same time has been achieved by a hack in the ICU
>> driver(1) that faked the use of the two interrupts, no matter which
>> SATA port was in use.
>> 
>> Now that the SATA core is ready to handle more than one interrupt,
>> this series adds support for it in the libahci_platform code. The
>> CP110 device tree must be updated to reflect the two SATA ports
>> available and their respective interrupts. To do not break DT backward
>> compatibility, the ahci_platform driver now embeds a special quirk
>> which checks if the DT is valid (only for A8k compatible) and, if
>> needed, creates the two missing sub-nodes, and assign them the
>> relevant "reg" and "interrupts" properties, before removing the main
>> SATA node "interrupts" one.
>> 
>> (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
>> interrupts into MSIs for the AP806 (north-bridge).
>> 
>> Best
>> Sven
>> 
>> Change from v2:
>>   * Fix commit message of custom irq init for host init
>> 
>> Change from v1:
>>   * Add a patch to enable custom irq initialization in 
>>     plattform init host
>>   * Add multi_irq_host_ack callback for the msi irq handler
>>   * Rework the ahci mvebu patch to initiate the irq and use
>>     the new multi_irq_host_ack to handle the custom irq code.
>>     Remove the custom irq handler and duplicate code.
>>   * Fix the armada8k backwards compatibility code
>>   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
>> 
>> Miquel Raynal (5):
>>   ata: ahci: mvebu: Rename a platform data flag
>>   ata: ahci: mvebu: Support A8k compatible
>>   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
>>   dt-bindings: ata: Update ahci bindings with possible per-port
>>     interrupts
>>   dt-bindings: ata: Update ahci_mvebu bindings
>> 
>> Sven Auhagen (4):
>>   ata: libahci_platform: Do not try to get an IRQ when
>>     AHCI_HFLAG_MULTI_MSI is set
>>   ata: ahci: add ack callback to multi irq handler
>>   ata: ahci: mvebu: Add support for A8k legacy DT bindings
>>   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
>> 
>>  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
>>  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
>>  drivers/ata/ahci.h                            |   2 +
>>  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
>>  drivers/ata/libahci.c                         |   4 +
>>  drivers/ata/libahci_platform.c                |  19 ++-
>>  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
>>  include/linux/ahci_platform.h                 |   1 +
>>  8 files changed, 160 insertions(+), 40 deletions(-)
>> 
>> -- 
>> 2.20.1
>> 
>> 

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

_______________________________________________
linux-arm-kernel mailing list
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Gregory CLEMENT]

Hello Marcin,

> [Resend in plain text]
>
> Hi,
>
> Just letting everyone know - merging only the DT part of this patchset
> broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
> release.

It's unfortunate that we didn't know this when v5.11-rc1 was
released. However it is still time for a fix, I will submit it.
As I explained in the other email when I applied this I really though
that the driver part will be applied, I don't know what happened here.

Grégory

>
> FYI, I'm currently updating the device trees in EDK2 based on the
> v5.11 DT sources - I'm going to keep the previous binding anyway, as
> the new one breaks booting with AHCI not only for older Linux
> versions, but also for other OSs (yet another argument to use ACPI).
>
> Best regards,
> Marcin
>
>
> sob., 27 lut 2021 o 12:02 Sven Auhagen <sven.auhagen@voleatech.de> napisał(a):
>>
>> Hello,
>>
>> can I ask about the status of this patch?
>> As far as I can tell it was not merged to ata and I did not receive
>> any further feedback that there was a problem with the patch series.
>>
>> As a matter of fact the device tree part was already merged by
>> Gregory Clement.
>>
>> Best and thanks
>> Sven
>>
>> On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
>> > From: Sven Auhagen <sven.auhagen@voleatech.de>
>> >
>> > Hello,
>> >
>> > There were already 4 versions of this series from Miquèl.
>> > I talked to Miquèl and I fixed up the last comments from v4.
>> > I am looking for feedback if this patch series is now ready to be merged
>> > and what should be further changed.
>> >
>> > Here is the original cover letter:
>> >
>> > Some time ago, when the initial support for Armada CP110 was
>> > contributed, the SATA core was not able to handle per-port
>> > interrupts. Despite the hardware reality, the device tree only
>> > represents one main interrupt for the two ports. Having both SATA
>> > ports enabled at the same time has been achieved by a hack in the ICU
>> > driver(1) that faked the use of the two interrupts, no matter which
>> > SATA port was in use.
>> >
>> > Now that the SATA core is ready to handle more than one interrupt,
>> > this series adds support for it in the libahci_platform code. The
>> > CP110 device tree must be updated to reflect the two SATA ports
>> > available and their respective interrupts. To do not break DT backward
>> > compatibility, the ahci_platform driver now embeds a special quirk
>> > which checks if the DT is valid (only for A8k compatible) and, if
>> > needed, creates the two missing sub-nodes, and assign them the
>> > relevant "reg" and "interrupts" properties, before removing the main
>> > SATA node "interrupts" one.
>> >
>> > (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
>> > interrupts into MSIs for the AP806 (north-bridge).
>> >
>> > Best
>> > Sven
>> >
>> > Change from v2:
>> >   * Fix commit message of custom irq init for host init
>> >
>> > Change from v1:
>> >   * Add a patch to enable custom irq initialization in
>> >     plattform init host
>> >   * Add multi_irq_host_ack callback for the msi irq handler
>> >   * Rework the ahci mvebu patch to initiate the irq and use
>> >     the new multi_irq_host_ack to handle the custom irq code.
>> >     Remove the custom irq handler and duplicate code.
>> >   * Fix the armada8k backwards compatibility code
>> >   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
>> >
>> > Miquel Raynal (5):
>> >   ata: ahci: mvebu: Rename a platform data flag
>> >   ata: ahci: mvebu: Support A8k compatible
>> >   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
>> >   dt-bindings: ata: Update ahci bindings with possible per-port
>> >     interrupts
>> >   dt-bindings: ata: Update ahci_mvebu bindings
>> >
>> > Sven Auhagen (4):
>> >   ata: libahci_platform: Do not try to get an IRQ when
>> >     AHCI_HFLAG_MULTI_MSI is set
>> >   ata: ahci: add ack callback to multi irq handler
>> >   ata: ahci: mvebu: Add support for A8k legacy DT bindings
>> >   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
>> >
>> >  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
>> >  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
>> >  drivers/ata/ahci.h                            |   2 +
>> >  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
>> >  drivers/ata/libahci.c                         |   4 +
>> >  drivers/ata/libahci_platform.c                |  19 ++-
>> >  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
>> >  include/linux/ahci_platform.h                 |   1 +
>> >  8 files changed, 160 insertions(+), 40 deletions(-)
>> >
>> > --
>> > 2.20.1
>> >
>> >
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Gregory CLEMENT]

Hello Marcin,

> [Resend in plain text]
>
> Hi,
>
> Just letting everyone know - merging only the DT part of this patchset
> broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
> release.

It's unfortunate that we didn't know this when v5.11-rc1 was
released. However it is still time for a fix, I will submit it.
As I explained in the other email when I applied this I really though
that the driver part will be applied, I don't know what happened here.

Grégory

>
> FYI, I'm currently updating the device trees in EDK2 based on the
> v5.11 DT sources - I'm going to keep the previous binding anyway, as
> the new one breaks booting with AHCI not only for older Linux
> versions, but also for other OSs (yet another argument to use ACPI).
>
> Best regards,
> Marcin
>
>
> sob., 27 lut 2021 o 12:02 Sven Auhagen <sven.auhagen@voleatech.de> napisał(a):
>>
>> Hello,
>>
>> can I ask about the status of this patch?
>> As far as I can tell it was not merged to ata and I did not receive
>> any further feedback that there was a problem with the patch series.
>>
>> As a matter of fact the device tree part was already merged by
>> Gregory Clement.
>>
>> Best and thanks
>> Sven
>>
>> On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
>> > From: Sven Auhagen <sven.auhagen@voleatech.de>
>> >
>> > Hello,
>> >
>> > There were already 4 versions of this series from Miquèl.
>> > I talked to Miquèl and I fixed up the last comments from v4.
>> > I am looking for feedback if this patch series is now ready to be merged
>> > and what should be further changed.
>> >
>> > Here is the original cover letter:
>> >
>> > Some time ago, when the initial support for Armada CP110 was
>> > contributed, the SATA core was not able to handle per-port
>> > interrupts. Despite the hardware reality, the device tree only
>> > represents one main interrupt for the two ports. Having both SATA
>> > ports enabled at the same time has been achieved by a hack in the ICU
>> > driver(1) that faked the use of the two interrupts, no matter which
>> > SATA port was in use.
>> >
>> > Now that the SATA core is ready to handle more than one interrupt,
>> > this series adds support for it in the libahci_platform code. The
>> > CP110 device tree must be updated to reflect the two SATA ports
>> > available and their respective interrupts. To do not break DT backward
>> > compatibility, the ahci_platform driver now embeds a special quirk
>> > which checks if the DT is valid (only for A8k compatible) and, if
>> > needed, creates the two missing sub-nodes, and assign them the
>> > relevant "reg" and "interrupts" properties, before removing the main
>> > SATA node "interrupts" one.
>> >
>> > (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
>> > interrupts into MSIs for the AP806 (north-bridge).
>> >
>> > Best
>> > Sven
>> >
>> > Change from v2:
>> >   * Fix commit message of custom irq init for host init
>> >
>> > Change from v1:
>> >   * Add a patch to enable custom irq initialization in
>> >     plattform init host
>> >   * Add multi_irq_host_ack callback for the msi irq handler
>> >   * Rework the ahci mvebu patch to initiate the irq and use
>> >     the new multi_irq_host_ack to handle the custom irq code.
>> >     Remove the custom irq handler and duplicate code.
>> >   * Fix the armada8k backwards compatibility code
>> >   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
>> >
>> > Miquel Raynal (5):
>> >   ata: ahci: mvebu: Rename a platform data flag
>> >   ata: ahci: mvebu: Support A8k compatible
>> >   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
>> >   dt-bindings: ata: Update ahci bindings with possible per-port
>> >     interrupts
>> >   dt-bindings: ata: Update ahci_mvebu bindings
>> >
>> > Sven Auhagen (4):
>> >   ata: libahci_platform: Do not try to get an IRQ when
>> >     AHCI_HFLAG_MULTI_MSI is set
>> >   ata: ahci: add ack callback to multi irq handler
>> >   ata: ahci: mvebu: Add support for A8k legacy DT bindings
>> >   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
>> >
>> >  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
>> >  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
>> >  drivers/ata/ahci.h                            |   2 +
>> >  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
>> >  drivers/ata/libahci.c                         |   4 +
>> >  drivers/ata/libahci_platform.c                |  19 ++-
>> >  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
>> >  include/linux/ahci_platform.h                 |   1 +
>> >  8 files changed, 160 insertions(+), 40 deletions(-)
>> >
>> > --
>> > 2.20.1
>> >
>> >
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Marcin Wojtas]

HI Gregory,

pt., 19 mar 2021 o 08:35 Gregory CLEMENT <gregory.clement@bootlin.com>
napisał(a):
>
> Hello Marcin,
>
> > [Resend in plain text]
> >
> > Hi,
> >
> > Just letting everyone know - merging only the DT part of this patchset
> > broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
> > release.
>
> It's unfortunate that we didn't know this when v5.11-rc1 was
> released. However it is still time for a fix, I will submit it.
> As I explained in the other email when I applied this I really though
> that the driver part will be applied, I don't know what happened here.
>

Sure, looking at the thread it looks more of a communication issue. I
am also surprised the breakage went unnoticed for a while (unless
everyone is using edk2, like myself :) ). I think it would be good to
revert the change on top of v5.11.x. The drivers adoption would have to
land before v5.12 though, so that not to repeat the problem during next release.

Small rant:
A general issue with the DT binding changes of this kind (previously
clocks, ICU, etc.) that I have, is a side effect of incompatibility
with older kernels/other OSs. The latter must follow the
modifications, but you can forget of booting e.g. Debian Buster with
the ToT device tree. Therefore in edk2 I do not update the device tree
fork to often and need to tweak it in order to have the widest support
coverage.

I'm dropping this note, so that in similar case in future, there is additional
consideration, how the change impacts a wider ecosystem, not only
today's Linux top of tree.

Thanks,
Marcin


> >
> > FYI, I'm currently updating the device trees in EDK2 based on the
> > v5.11 DT sources - I'm going to keep the previous binding anyway, as
> > the new one breaks booting with AHCI not only for older Linux
> > versions, but also for other OSs (yet another argument to use ACPI).
> >
> > Best regards,
> > Marcin
> >
> >
> > sob., 27 lut 2021 o 12:02 Sven Auhagen <sven.auhagen@voleatech.de> napisał(a):
> >>
> >> Hello,
> >>
> >> can I ask about the status of this patch?
> >> As far as I can tell it was not merged to ata and I did not receive
> >> any further feedback that there was a problem with the patch series.
> >>
> >> As a matter of fact the device tree part was already merged by
> >> Gregory Clement.
> >>
> >> Best and thanks
> >> Sven
> >>
> >> On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
> >> > From: Sven Auhagen <sven.auhagen@voleatech.de>
> >> >
> >> > Hello,
> >> >
> >> > There were already 4 versions of this series from Miquèl.
> >> > I talked to Miquèl and I fixed up the last comments from v4.
> >> > I am looking for feedback if this patch series is now ready to be merged
> >> > and what should be further changed.
> >> >
> >> > Here is the original cover letter:
> >> >
> >> > Some time ago, when the initial support for Armada CP110 was
> >> > contributed, the SATA core was not able to handle per-port
> >> > interrupts. Despite the hardware reality, the device tree only
> >> > represents one main interrupt for the two ports. Having both SATA
> >> > ports enabled at the same time has been achieved by a hack in the ICU
> >> > driver(1) that faked the use of the two interrupts, no matter which
> >> > SATA port was in use.
> >> >
> >> > Now that the SATA core is ready to handle more than one interrupt,
> >> > this series adds support for it in the libahci_platform code. The
> >> > CP110 device tree must be updated to reflect the two SATA ports
> >> > available and their respective interrupts. To do not break DT backward
> >> > compatibility, the ahci_platform driver now embeds a special quirk
> >> > which checks if the DT is valid (only for A8k compatible) and, if
> >> > needed, creates the two missing sub-nodes, and assign them the
> >> > relevant "reg" and "interrupts" properties, before removing the main
> >> > SATA node "interrupts" one.
> >> >
> >> > (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
> >> > interrupts into MSIs for the AP806 (north-bridge).
> >> >
> >> > Best
> >> > Sven
> >> >
> >> > Change from v2:
> >> >   * Fix commit message of custom irq init for host init
> >> >
> >> > Change from v1:
> >> >   * Add a patch to enable custom irq initialization in
> >> >     plattform init host
> >> >   * Add multi_irq_host_ack callback for the msi irq handler
> >> >   * Rework the ahci mvebu patch to initiate the irq and use
> >> >     the new multi_irq_host_ack to handle the custom irq code.
> >> >     Remove the custom irq handler and duplicate code.
> >> >   * Fix the armada8k backwards compatibility code
> >> >   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
> >> >
> >> > Miquel Raynal (5):
> >> >   ata: ahci: mvebu: Rename a platform data flag
> >> >   ata: ahci: mvebu: Support A8k compatible
> >> >   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
> >> >   dt-bindings: ata: Update ahci bindings with possible per-port
> >> >     interrupts
> >> >   dt-bindings: ata: Update ahci_mvebu bindings
> >> >
> >> > Sven Auhagen (4):
> >> >   ata: libahci_platform: Do not try to get an IRQ when
> >> >     AHCI_HFLAG_MULTI_MSI is set
> >> >   ata: ahci: add ack callback to multi irq handler
> >> >   ata: ahci: mvebu: Add support for A8k legacy DT bindings
> >> >   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
> >> >
> >> >  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
> >> >  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
> >> >  drivers/ata/ahci.h                            |   2 +
> >> >  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
> >> >  drivers/ata/libahci.c                         |   4 +
> >> >  drivers/ata/libahci_platform.c                |  19 ++-
> >> >  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
> >> >  include/linux/ahci_platform.h                 |   1 +
> >> >  8 files changed, 160 insertions(+), 40 deletions(-)
> >> >
> >> > --
> >> > 2.20.1
> >> >
> >> >
> >>
> >> _______________________________________________
> >> linux-arm-kernel mailing list
> >> linux-arm-kernel@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> --
> Gregory Clement, Bootlin
> Embedded Linux and Kernel engineering
> http://bootlin.com

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Marcin Wojtas]

HI Gregory,

pt., 19 mar 2021 o 08:35 Gregory CLEMENT <gregory.clement@bootlin.com>
napisał(a):
>
> Hello Marcin,
>
> > [Resend in plain text]
> >
> > Hi,
> >
> > Just letting everyone know - merging only the DT part of this patchset
> > broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
> > release.
>
> It's unfortunate that we didn't know this when v5.11-rc1 was
> released. However it is still time for a fix, I will submit it.
> As I explained in the other email when I applied this I really though
> that the driver part will be applied, I don't know what happened here.
>

Sure, looking at the thread it looks more of a communication issue. I
am also surprised the breakage went unnoticed for a while (unless
everyone is using edk2, like myself :) ). I think it would be good to
revert the change on top of v5.11.x. The drivers adoption would have to
land before v5.12 though, so that not to repeat the problem during next release.

Small rant:
A general issue with the DT binding changes of this kind (previously
clocks, ICU, etc.) that I have, is a side effect of incompatibility
with older kernels/other OSs. The latter must follow the
modifications, but you can forget of booting e.g. Debian Buster with
the ToT device tree. Therefore in edk2 I do not update the device tree
fork to often and need to tweak it in order to have the widest support
coverage.

I'm dropping this note, so that in similar case in future, there is additional
consideration, how the change impacts a wider ecosystem, not only
today's Linux top of tree.

Thanks,
Marcin


> >
> > FYI, I'm currently updating the device trees in EDK2 based on the
> > v5.11 DT sources - I'm going to keep the previous binding anyway, as
> > the new one breaks booting with AHCI not only for older Linux
> > versions, but also for other OSs (yet another argument to use ACPI).
> >
> > Best regards,
> > Marcin
> >
> >
> > sob., 27 lut 2021 o 12:02 Sven Auhagen <sven.auhagen@voleatech.de> napisał(a):
> >>
> >> Hello,
> >>
> >> can I ask about the status of this patch?
> >> As far as I can tell it was not merged to ata and I did not receive
> >> any further feedback that there was a problem with the patch series.
> >>
> >> As a matter of fact the device tree part was already merged by
> >> Gregory Clement.
> >>
> >> Best and thanks
> >> Sven
> >>
> >> On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
> >> > From: Sven Auhagen <sven.auhagen@voleatech.de>
> >> >
> >> > Hello,
> >> >
> >> > There were already 4 versions of this series from Miquèl.
> >> > I talked to Miquèl and I fixed up the last comments from v4.
> >> > I am looking for feedback if this patch series is now ready to be merged
> >> > and what should be further changed.
> >> >
> >> > Here is the original cover letter:
> >> >
> >> > Some time ago, when the initial support for Armada CP110 was
> >> > contributed, the SATA core was not able to handle per-port
> >> > interrupts. Despite the hardware reality, the device tree only
> >> > represents one main interrupt for the two ports. Having both SATA
> >> > ports enabled at the same time has been achieved by a hack in the ICU
> >> > driver(1) that faked the use of the two interrupts, no matter which
> >> > SATA port was in use.
> >> >
> >> > Now that the SATA core is ready to handle more than one interrupt,
> >> > this series adds support for it in the libahci_platform code. The
> >> > CP110 device tree must be updated to reflect the two SATA ports
> >> > available and their respective interrupts. To do not break DT backward
> >> > compatibility, the ahci_platform driver now embeds a special quirk
> >> > which checks if the DT is valid (only for A8k compatible) and, if
> >> > needed, creates the two missing sub-nodes, and assign them the
> >> > relevant "reg" and "interrupts" properties, before removing the main
> >> > SATA node "interrupts" one.
> >> >
> >> > (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
> >> > interrupts into MSIs for the AP806 (north-bridge).
> >> >
> >> > Best
> >> > Sven
> >> >
> >> > Change from v2:
> >> >   * Fix commit message of custom irq init for host init
> >> >
> >> > Change from v1:
> >> >   * Add a patch to enable custom irq initialization in
> >> >     plattform init host
> >> >   * Add multi_irq_host_ack callback for the msi irq handler
> >> >   * Rework the ahci mvebu patch to initiate the irq and use
> >> >     the new multi_irq_host_ack to handle the custom irq code.
> >> >     Remove the custom irq handler and duplicate code.
> >> >   * Fix the armada8k backwards compatibility code
> >> >   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
> >> >
> >> > Miquel Raynal (5):
> >> >   ata: ahci: mvebu: Rename a platform data flag
> >> >   ata: ahci: mvebu: Support A8k compatible
> >> >   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
> >> >   dt-bindings: ata: Update ahci bindings with possible per-port
> >> >     interrupts
> >> >   dt-bindings: ata: Update ahci_mvebu bindings
> >> >
> >> > Sven Auhagen (4):
> >> >   ata: libahci_platform: Do not try to get an IRQ when
> >> >     AHCI_HFLAG_MULTI_MSI is set
> >> >   ata: ahci: add ack callback to multi irq handler
> >> >   ata: ahci: mvebu: Add support for A8k legacy DT bindings
> >> >   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
> >> >
> >> >  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
> >> >  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
> >> >  drivers/ata/ahci.h                            |   2 +
> >> >  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
> >> >  drivers/ata/libahci.c                         |   4 +
> >> >  drivers/ata/libahci_platform.c                |  19 ++-
> >> >  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
> >> >  include/linux/ahci_platform.h                 |   1 +
> >> >  8 files changed, 160 insertions(+), 40 deletions(-)
> >> >
> >> > --
> >> > 2.20.1
> >> >
> >> >
> >>
> >> _______________________________________________
> >> linux-arm-kernel mailing list
> >> linux-arm-kernel@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> --
> Gregory Clement, Bootlin
> Embedded Linux and Kernel engineering
> http://bootlin.com

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Sven Auhagen]

On Fri, Mar 19, 2021 at 08:26:00AM +0100, Gregory CLEMENT wrote:

Hello Grégory,

> Hello Sven,
> 
> > Hello,
> >
> > can I ask about the status of this patch?
> > As far as I can tell it was not merged to ata and I did not receive
> > any further feedback that there was a problem with the patch series.
> >
> > As a matter of fact the device tree part was already merged by
> > Gregory Clement.
> 
> As the maintainer of the ahci subsytem reviewed the series, I really
> expected that he merged it, so me neither I don't understand what
> happened.
> 

I assumed the same and I did not get an answer to my last email
regarding the status of the page.

Best
Sven

> Hans,
> 
> is there still anything wrong that prevent you applying the series ?
> 
> Grégory
> 
> 
> >
> > Best and thanks
> > Sven
> >
> > On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
> >> From: Sven Auhagen <sven.auhagen@voleatech.de>
> >> 
> >> Hello, 
> >> 
> >> There were already 4 versions of this series from Miquèl.
> >> I talked to Miquèl and I fixed up the last comments from v4.
> >> I am looking for feedback if this patch series is now ready to be merged
> >> and what should be further changed.
> >> 
> >> Here is the original cover letter:
> >> 
> >> Some time ago, when the initial support for Armada CP110 was
> >> contributed, the SATA core was not able to handle per-port
> >> interrupts. Despite the hardware reality, the device tree only
> >> represents one main interrupt for the two ports. Having both SATA
> >> ports enabled at the same time has been achieved by a hack in the ICU
> >> driver(1) that faked the use of the two interrupts, no matter which
> >> SATA port was in use.
> >> 
> >> Now that the SATA core is ready to handle more than one interrupt,
> >> this series adds support for it in the libahci_platform code. The
> >> CP110 device tree must be updated to reflect the two SATA ports
> >> available and their respective interrupts. To do not break DT backward
> >> compatibility, the ahci_platform driver now embeds a special quirk
> >> which checks if the DT is valid (only for A8k compatible) and, if
> >> needed, creates the two missing sub-nodes, and assign them the
> >> relevant "reg" and "interrupts" properties, before removing the main
> >> SATA node "interrupts" one.
> >> 
> >> (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
> >> interrupts into MSIs for the AP806 (north-bridge).
> >> 
> >> Best
> >> Sven
> >> 
> >> Change from v2:
> >>   * Fix commit message of custom irq init for host init
> >> 
> >> Change from v1:
> >>   * Add a patch to enable custom irq initialization in 
> >>     plattform init host
> >>   * Add multi_irq_host_ack callback for the msi irq handler
> >>   * Rework the ahci mvebu patch to initiate the irq and use
> >>     the new multi_irq_host_ack to handle the custom irq code.
> >>     Remove the custom irq handler and duplicate code.
> >>   * Fix the armada8k backwards compatibility code
> >>   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
> >> 
> >> Miquel Raynal (5):
> >>   ata: ahci: mvebu: Rename a platform data flag
> >>   ata: ahci: mvebu: Support A8k compatible
> >>   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
> >>   dt-bindings: ata: Update ahci bindings with possible per-port
> >>     interrupts
> >>   dt-bindings: ata: Update ahci_mvebu bindings
> >> 
> >> Sven Auhagen (4):
> >>   ata: libahci_platform: Do not try to get an IRQ when
> >>     AHCI_HFLAG_MULTI_MSI is set
> >>   ata: ahci: add ack callback to multi irq handler
> >>   ata: ahci: mvebu: Add support for A8k legacy DT bindings
> >>   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
> >> 
> >>  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
> >>  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
> >>  drivers/ata/ahci.h                            |   2 +
> >>  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
> >>  drivers/ata/libahci.c                         |   4 +
> >>  drivers/ata/libahci_platform.c                |  19 ++-
> >>  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
> >>  include/linux/ahci_platform.h                 |   1 +
> >>  8 files changed, 160 insertions(+), 40 deletions(-)
> >> 
> >> -- 
> >> 2.20.1
> >> 
> >> 
> 
> -- 
> Gregory Clement, Bootlin
> Embedded Linux and Kernel engineering
> https://eur03.safelinks.protection.outlook.com/?url=http%3A%2F%2Fbootlin.com%2F&amp;data=04%7C01%7Csven.auhagen%40voleatech.de%7C6500487ba77641ea9ae508d8eaa842b1%7Cb82a99f679814a7295344d35298f847b%7C0%7C0%7C637517355700947932%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=eP%2FQEvJ2oUeHeA0DH1N2yxp0CjRZLV50LJ9QbF9nDDs%3D&amp;reserved=0

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Sven Auhagen]

On Fri, Mar 19, 2021 at 08:26:00AM +0100, Gregory CLEMENT wrote:

Hello Grégory,

> Hello Sven,
> 
> > Hello,
> >
> > can I ask about the status of this patch?
> > As far as I can tell it was not merged to ata and I did not receive
> > any further feedback that there was a problem with the patch series.
> >
> > As a matter of fact the device tree part was already merged by
> > Gregory Clement.
> 
> As the maintainer of the ahci subsytem reviewed the series, I really
> expected that he merged it, so me neither I don't understand what
> happened.
> 

I assumed the same and I did not get an answer to my last email
regarding the status of the page.

Best
Sven

> Hans,
> 
> is there still anything wrong that prevent you applying the series ?
> 
> Grégory
> 
> 
> >
> > Best and thanks
> > Sven
> >
> > On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:
> >> From: Sven Auhagen <sven.auhagen@voleatech.de>
> >> 
> >> Hello, 
> >> 
> >> There were already 4 versions of this series from Miquèl.
> >> I talked to Miquèl and I fixed up the last comments from v4.
> >> I am looking for feedback if this patch series is now ready to be merged
> >> and what should be further changed.
> >> 
> >> Here is the original cover letter:
> >> 
> >> Some time ago, when the initial support for Armada CP110 was
> >> contributed, the SATA core was not able to handle per-port
> >> interrupts. Despite the hardware reality, the device tree only
> >> represents one main interrupt for the two ports. Having both SATA
> >> ports enabled at the same time has been achieved by a hack in the ICU
> >> driver(1) that faked the use of the two interrupts, no matter which
> >> SATA port was in use.
> >> 
> >> Now that the SATA core is ready to handle more than one interrupt,
> >> this series adds support for it in the libahci_platform code. The
> >> CP110 device tree must be updated to reflect the two SATA ports
> >> available and their respective interrupts. To do not break DT backward
> >> compatibility, the ahci_platform driver now embeds a special quirk
> >> which checks if the DT is valid (only for A8k compatible) and, if
> >> needed, creates the two missing sub-nodes, and assign them the
> >> relevant "reg" and "interrupts" properties, before removing the main
> >> SATA node "interrupts" one.
> >> 
> >> (1) The ICU is an irqchip aggregating the CP110 (south-bridge)
> >> interrupts into MSIs for the AP806 (north-bridge).
> >> 
> >> Best
> >> Sven
> >> 
> >> Change from v2:
> >>   * Fix commit message of custom irq init for host init
> >> 
> >> Change from v1:
> >>   * Add a patch to enable custom irq initialization in 
> >>     plattform init host
> >>   * Add multi_irq_host_ack callback for the msi irq handler
> >>   * Rework the ahci mvebu patch to initiate the irq and use
> >>     the new multi_irq_host_ack to handle the custom irq code.
> >>     Remove the custom irq handler and duplicate code.
> >>   * Fix the armada8k backwards compatibility code
> >>   * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK
> >> 
> >> Miquel Raynal (5):
> >>   ata: ahci: mvebu: Rename a platform data flag
> >>   ata: ahci: mvebu: Support A8k compatible
> >>   irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
> >>   dt-bindings: ata: Update ahci bindings with possible per-port
> >>     interrupts
> >>   dt-bindings: ata: Update ahci_mvebu bindings
> >> 
> >> Sven Auhagen (4):
> >>   ata: libahci_platform: Do not try to get an IRQ when
> >>     AHCI_HFLAG_MULTI_MSI is set
> >>   ata: ahci: add ack callback to multi irq handler
> >>   ata: ahci: mvebu: Add support for A8k legacy DT bindings
> >>   arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
> >> 
> >>  .../devicetree/bindings/ata/ahci-platform.txt |   7 +
> >>  arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
> >>  drivers/ata/ahci.h                            |   2 +
> >>  drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
> >>  drivers/ata/libahci.c                         |   4 +
> >>  drivers/ata/libahci_platform.c                |  19 ++-
> >>  drivers/irqchip/irq-mvebu-icu.c               |  18 ---
> >>  include/linux/ahci_platform.h                 |   1 +
> >>  8 files changed, 160 insertions(+), 40 deletions(-)
> >> 
> >> -- 
> >> 2.20.1
> >> 
> >> 
> 
> -- 
> Gregory Clement, Bootlin
> Embedded Linux and Kernel engineering
> https://eur03.safelinks.protection.outlook.com/?url=http%3A%2F%2Fbootlin.com%2F&amp;data=04%7C01%7Csven.auhagen%40voleatech.de%7C6500487ba77641ea9ae508d8eaa842b1%7Cb82a99f679814a7295344d35298f847b%7C0%7C0%7C637517355700947932%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=eP%2FQEvJ2oUeHeA0DH1N2yxp0CjRZLV50LJ9QbF9nDDs%3D&amp;reserved=0

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Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Marc Zyngier]

On Fri, 19 Mar 2021 08:08:34 +0000,
Marcin Wojtas <mw@semihalf.com> wrote:
> 
> HI Gregory,
> 
> pt., 19 mar 2021 o 08:35 Gregory CLEMENT <gregory.clement@bootlin.com>
> napisał(a):
> >
> > Hello Marcin,
> >
> > > [Resend in plain text]
> > >
> > > Hi,
> > >
> > > Just letting everyone know - merging only the DT part of this patchset
> > > broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
> > > release.
> >
> > It's unfortunate that we didn't know this when v5.11-rc1 was
> > released. However it is still time for a fix, I will submit it.
> > As I explained in the other email when I applied this I really though
> > that the driver part will be applied, I don't know what happened here.
> >
> 
> Sure, looking at the thread it looks more of a communication issue. I
> am also surprised the breakage went unnoticed for a while (unless
> everyone is using edk2, like myself :) ). I think it would be good to
> revert the change on top of v5.11.x. The drivers adoption would have to
> land before v5.12 though, so that not to repeat the problem during next release.
> 
> Small rant:
> A general issue with the DT binding changes of this kind (previously
> clocks, ICU, etc.) that I have, is a side effect of incompatibility
> with older kernels/other OSs. The latter must follow the
> modifications, but you can forget of booting e.g. Debian Buster with
> the ToT device tree. Therefore in edk2 I do not update the device tree
> fork to often and need to tweak it in order to have the widest support
> coverage.

Unfortunately, this has been the case for this machine since it became
available. I can happily boot any kernel on other systems of the same
vintage without touching anything firmware related, which is crucial
to identify regressions.

The A8k requires instead a per-kernel DT, something that only works if
you treat it as an embedded system, and not a standard system (which
is why mine has been collecting dust for some time now). I don't think
the maintainers have ever been interested in solving this problem.

As for ACPI, that'd probably be the best thing that can happen to this
platform. Not sure that's remotely possible though, given how
"interesting" the HW is.

	M.

-- 
Without deviation from the norm, progress is not possible.

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Marc Zyngier]

On Fri, 19 Mar 2021 08:08:34 +0000,
Marcin Wojtas <mw@semihalf.com> wrote:
> 
> HI Gregory,
> 
> pt., 19 mar 2021 o 08:35 Gregory CLEMENT <gregory.clement@bootlin.com>
> napisał(a):
> >
> > Hello Marcin,
> >
> > > [Resend in plain text]
> > >
> > > Hi,
> > >
> > > Just letting everyone know - merging only the DT part of this patchset
> > > broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
> > > release.
> >
> > It's unfortunate that we didn't know this when v5.11-rc1 was
> > released. However it is still time for a fix, I will submit it.
> > As I explained in the other email when I applied this I really though
> > that the driver part will be applied, I don't know what happened here.
> >
> 
> Sure, looking at the thread it looks more of a communication issue. I
> am also surprised the breakage went unnoticed for a while (unless
> everyone is using edk2, like myself :) ). I think it would be good to
> revert the change on top of v5.11.x. The drivers adoption would have to
> land before v5.12 though, so that not to repeat the problem during next release.
> 
> Small rant:
> A general issue with the DT binding changes of this kind (previously
> clocks, ICU, etc.) that I have, is a side effect of incompatibility
> with older kernels/other OSs. The latter must follow the
> modifications, but you can forget of booting e.g. Debian Buster with
> the ToT device tree. Therefore in edk2 I do not update the device tree
> fork to often and need to tweak it in order to have the widest support
> coverage.

Unfortunately, this has been the case for this machine since it became
available. I can happily boot any kernel on other systems of the same
vintage without touching anything firmware related, which is crucial
to identify regressions.

The A8k requires instead a per-kernel DT, something that only works if
you treat it as an embedded system, and not a standard system (which
is why mine has been collecting dust for some time now). I don't think
the maintainers have ever been interested in solving this problem.

As for ACPI, that'd probably be the best thing that can happen to this
platform. Not sure that's remotely possible though, given how
"interesting" the HW is.

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Marcin Wojtas]

Hi Marc,

pt., 19 mar 2021 o 10:33 Marc Zyngier <maz@kernel.org> napisał(a):
>
> On Fri, 19 Mar 2021 08:08:34 +0000,
> Marcin Wojtas <mw@semihalf.com> wrote:
> >
> > HI Gregory,
> >
> > pt., 19 mar 2021 o 08:35 Gregory CLEMENT <gregory.clement@bootlin.com>
> > napisał(a):
> > >
> > > Hello Marcin,
> > >
> > > > [Resend in plain text]
> > > >
> > > > Hi,
> > > >
> > > > Just letting everyone know - merging only the DT part of this patchset
> > > > broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
> > > > release.
> > >
> > > It's unfortunate that we didn't know this when v5.11-rc1 was
> > > released. However it is still time for a fix, I will submit it.
> > > As I explained in the other email when I applied this I really though
> > > that the driver part will be applied, I don't know what happened here.
> > >
> >
> > Sure, looking at the thread it looks more of a communication issue. I
> > am also surprised the breakage went unnoticed for a while (unless
> > everyone is using edk2, like myself :) ). I think it would be good to
> > revert the change on top of v5.11.x. The drivers adoption would have to
> > land before v5.12 though, so that not to repeat the problem during next release.
> >
> > Small rant:
> > A general issue with the DT binding changes of this kind (previously
> > clocks, ICU, etc.) that I have, is a side effect of incompatibility
> > with older kernels/other OSs. The latter must follow the
> > modifications, but you can forget of booting e.g. Debian Buster with
> > the ToT device tree. Therefore in edk2 I do not update the device tree
> > fork to often and need to tweak it in order to have the widest support
> > coverage.
>
> Unfortunately, this has been the case for this machine since it became
> available. I can happily boot any kernel on other systems of the same
> vintage without touching anything firmware related, which is crucial
> to identify regressions.
>
> The A8k requires instead a per-kernel DT, something that only works if
> you treat it as an embedded system, and not a standard system (which
> is why mine has been collecting dust for some time now). I don't think
> the maintainers have ever been interested in solving this problem.
>
> As for ACPI, that'd probably be the best thing that can happen to this
> platform. Not sure that's remotely possible though, given how
> "interesting" the HW is.

ACPI has been up and running for this platform for a couple of years
now, on MacchiatoBin you get USB, SATA, network ports, PCIE and even
SD/MMC (the latter was merged in v5.11 kernel).

Best regards,
Marcin

>
> --
> Without deviation from the norm, progress is not possible.

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Marcin Wojtas]

Hi Marc,

pt., 19 mar 2021 o 10:33 Marc Zyngier <maz@kernel.org> napisał(a):
>
> On Fri, 19 Mar 2021 08:08:34 +0000,
> Marcin Wojtas <mw@semihalf.com> wrote:
> >
> > HI Gregory,
> >
> > pt., 19 mar 2021 o 08:35 Gregory CLEMENT <gregory.clement@bootlin.com>
> > napisał(a):
> > >
> > > Hello Marcin,
> > >
> > > > [Resend in plain text]
> > > >
> > > > Hi,
> > > >
> > > > Just letting everyone know - merging only the DT part of this patchset
> > > > broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
> > > > release.
> > >
> > > It's unfortunate that we didn't know this when v5.11-rc1 was
> > > released. However it is still time for a fix, I will submit it.
> > > As I explained in the other email when I applied this I really though
> > > that the driver part will be applied, I don't know what happened here.
> > >
> >
> > Sure, looking at the thread it looks more of a communication issue. I
> > am also surprised the breakage went unnoticed for a while (unless
> > everyone is using edk2, like myself :) ). I think it would be good to
> > revert the change on top of v5.11.x. The drivers adoption would have to
> > land before v5.12 though, so that not to repeat the problem during next release.
> >
> > Small rant:
> > A general issue with the DT binding changes of this kind (previously
> > clocks, ICU, etc.) that I have, is a side effect of incompatibility
> > with older kernels/other OSs. The latter must follow the
> > modifications, but you can forget of booting e.g. Debian Buster with
> > the ToT device tree. Therefore in edk2 I do not update the device tree
> > fork to often and need to tweak it in order to have the widest support
> > coverage.
>
> Unfortunately, this has been the case for this machine since it became
> available. I can happily boot any kernel on other systems of the same
> vintage without touching anything firmware related, which is crucial
> to identify regressions.
>
> The A8k requires instead a per-kernel DT, something that only works if
> you treat it as an embedded system, and not a standard system (which
> is why mine has been collecting dust for some time now). I don't think
> the maintainers have ever been interested in solving this problem.
>
> As for ACPI, that'd probably be the best thing that can happen to this
> platform. Not sure that's remotely possible though, given how
> "interesting" the HW is.

ACPI has been up and running for this platform for a couple of years
now, on MacchiatoBin you get USB, SATA, network ports, PCIE and even
SD/MMC (the latter was merged in v5.11 kernel).

Best regards,
Marcin

>
> --
> Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Mark Kettenis]

> From: Marcin Wojtas <mw@semihalf.com>
> Date: Fri, 19 Mar 2021 10:48:08 +0100
> 
> Hi Marc,
> 
> pt., 19 mar 2021 o 10:33 Marc Zyngier <maz@kernel.org> napisał(a):
> >
> > On Fri, 19 Mar 2021 08:08:34 +0000,
> > Marcin Wojtas <mw@semihalf.com> wrote:
> > >
> > > HI Gregory,
> > >
> > > pt., 19 mar 2021 o 08:35 Gregory CLEMENT <gregory.clement@bootlin.com>
> > > napisał(a):
> > > >
> > > > Hello Marcin,
> > > >
> > > > > [Resend in plain text]
> > > > >
> > > > > Hi,
> > > > >
> > > > > Just letting everyone know - merging only the DT part of this patchset
> > > > > broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
> > > > > release.
> > > >
> > > > It's unfortunate that we didn't know this when v5.11-rc1 was
> > > > released. However it is still time for a fix, I will submit it.
> > > > As I explained in the other email when I applied this I really though
> > > > that the driver part will be applied, I don't know what happened here.
> > > >
> > >
> > > Sure, looking at the thread it looks more of a communication issue. I
> > > am also surprised the breakage went unnoticed for a while (unless
> > > everyone is using edk2, like myself :) ). I think it would be good to
> > > revert the change on top of v5.11.x. The drivers adoption would have to
> > > land before v5.12 though, so that not to repeat the problem during next release.
> > >
> > > Small rant:
> > > A general issue with the DT binding changes of this kind (previously
> > > clocks, ICU, etc.) that I have, is a side effect of incompatibility
> > > with older kernels/other OSs. The latter must follow the
> > > modifications, but you can forget of booting e.g. Debian Buster with
> > > the ToT device tree. Therefore in edk2 I do not update the device tree
> > > fork to often and need to tweak it in order to have the widest support
> > > coverage.
> >
> > Unfortunately, this has been the case for this machine since it became
> > available. I can happily boot any kernel on other systems of the same
> > vintage without touching anything firmware related, which is crucial
> > to identify regressions.
> >
> > The A8k requires instead a per-kernel DT, something that only works if
> > you treat it as an embedded system, and not a standard system (which
> > is why mine has been collecting dust for some time now). I don't think
> > the maintainers have ever been interested in solving this problem.
> >
> > As for ACPI, that'd probably be the best thing that can happen to this
> > platform. Not sure that's remotely possible though, given how
> > "interesting" the HW is.
> 
> ACPI has been up and running for this platform for a couple of years
> now, on MacchiatoBin you get USB, SATA, network ports, PCIE and even
> SD/MMC (the latter was merged in v5.11 kernel).

Unfortunately ACPI doesn't describe how the SFP cages are connected.

As soon as GPIOs and I2C busses are involved device trees are so much
better than ACPI, and I wouldn't really be interested in adding the
necessary OS support the network ports with ACPI in OpenBSD.

Cheers,

Mark

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Mark Kettenis]

> From: Marcin Wojtas <mw@semihalf.com>
> Date: Fri, 19 Mar 2021 10:48:08 +0100
> 
> Hi Marc,
> 
> pt., 19 mar 2021 o 10:33 Marc Zyngier <maz@kernel.org> napisał(a):
> >
> > On Fri, 19 Mar 2021 08:08:34 +0000,
> > Marcin Wojtas <mw@semihalf.com> wrote:
> > >
> > > HI Gregory,
> > >
> > > pt., 19 mar 2021 o 08:35 Gregory CLEMENT <gregory.clement@bootlin.com>
> > > napisał(a):
> > > >
> > > > Hello Marcin,
> > > >
> > > > > [Resend in plain text]
> > > > >
> > > > > Hi,
> > > > >
> > > > > Just letting everyone know - merging only the DT part of this patchset
> > > > > broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
> > > > > release.
> > > >
> > > > It's unfortunate that we didn't know this when v5.11-rc1 was
> > > > released. However it is still time for a fix, I will submit it.
> > > > As I explained in the other email when I applied this I really though
> > > > that the driver part will be applied, I don't know what happened here.
> > > >
> > >
> > > Sure, looking at the thread it looks more of a communication issue. I
> > > am also surprised the breakage went unnoticed for a while (unless
> > > everyone is using edk2, like myself :) ). I think it would be good to
> > > revert the change on top of v5.11.x. The drivers adoption would have to
> > > land before v5.12 though, so that not to repeat the problem during next release.
> > >
> > > Small rant:
> > > A general issue with the DT binding changes of this kind (previously
> > > clocks, ICU, etc.) that I have, is a side effect of incompatibility
> > > with older kernels/other OSs. The latter must follow the
> > > modifications, but you can forget of booting e.g. Debian Buster with
> > > the ToT device tree. Therefore in edk2 I do not update the device tree
> > > fork to often and need to tweak it in order to have the widest support
> > > coverage.
> >
> > Unfortunately, this has been the case for this machine since it became
> > available. I can happily boot any kernel on other systems of the same
> > vintage without touching anything firmware related, which is crucial
> > to identify regressions.
> >
> > The A8k requires instead a per-kernel DT, something that only works if
> > you treat it as an embedded system, and not a standard system (which
> > is why mine has been collecting dust for some time now). I don't think
> > the maintainers have ever been interested in solving this problem.
> >
> > As for ACPI, that'd probably be the best thing that can happen to this
> > platform. Not sure that's remotely possible though, given how
> > "interesting" the HW is.
> 
> ACPI has been up and running for this platform for a couple of years
> now, on MacchiatoBin you get USB, SATA, network ports, PCIE and even
> SD/MMC (the latter was merged in v5.11 kernel).

Unfortunately ACPI doesn't describe how the SFP cages are connected.

As soon as GPIOs and I2C busses are involved device trees are so much
better than ACPI, and I wouldn't really be interested in adding the
necessary OS support the network ports with ACPI in OpenBSD.

Cheers,

Mark

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Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Andrew Lunn]

> Unfortunately ACPI doesn't describe how the SFP cages are connected.

Nor MDIO busses and Ethernet PHYs.

ACPI is missing a lot of support for basic elements of networking. I
guess this is because it expects firmware in the NIC to be controlling
these parts, not Linux.

> 
> As soon as GPIOs and I2C busses are involved device trees are so much
> better than ACPI

Yes, ACPI has along way to go before it is usable for SoCs with
integrated Ethernet.

	   Andrew

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Andrew Lunn]

> Unfortunately ACPI doesn't describe how the SFP cages are connected.

Nor MDIO busses and Ethernet PHYs.

ACPI is missing a lot of support for basic elements of networking. I
guess this is because it expects firmware in the NIC to be controlling
these parts, not Linux.

> 
> As soon as GPIOs and I2C busses are involved device trees are so much
> better than ACPI

Yes, ACPI has along way to go before it is usable for SoCs with
integrated Ethernet.

	   Andrew

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Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Marcin Wojtas]

Hi Andrew,

pt., 19 mar 2021 o 21:53 Andrew Lunn <andrew@lunn.ch> napisał(a):
>
> > Unfortunately ACPI doesn't describe how the SFP cages are connected.
>
> Nor MDIO busses and Ethernet PHYs.
>
> ACPI is missing a lot of support for basic elements of networking. I
> guess this is because it expects firmware in the NIC to be controlling
> these parts, not Linux.
>
> >
> > As soon as GPIOs and I2C busses are involved device trees are so much
> > better than ACPI
>
> Yes, ACPI has along way to go before it is usable for SoCs with
> integrated Ethernet.
>

I agree, however hopefully the MDIO + ACPI patchset, that currently
seems to be pretty advanced on the lists, will land - it will be a big
step forward and open a path for full SFP support. However, my point
is, that in case of MacchiatoBin, I prefer to use a bit limited link
IRQs, just for having a guarantee to boot each Linux kernel with mvpp2
starting from v4.16 until today and being sure to install various
distros/OSs/ESXI. For DT one have to find a matching version, that
luckily won't break the boot.

Of course the DT is more flexible and offers huge possibilities (e.g.
DSA), but the way it's been done, inherited straight from armv7
embedded-hacking times is imo a burden. Unstable, constantly changing
ABI, extending drivers rather than describe HW is too often a problem.
This patchset is a bright example that there is a field for
improvement.

In my ideal world DT should be properly designed (vendors+community),
out of Linux tree, reviewed by maintainers from different projects,
backward compatible and ensuring proper information/heads-up when
planning to do a meaningful change. I know how it looks and I'm aware
it is hard, but we should at least try :)

Best regards,
Marcin

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Marcin Wojtas]

Hi Andrew,

pt., 19 mar 2021 o 21:53 Andrew Lunn <andrew@lunn.ch> napisał(a):
>
> > Unfortunately ACPI doesn't describe how the SFP cages are connected.
>
> Nor MDIO busses and Ethernet PHYs.
>
> ACPI is missing a lot of support for basic elements of networking. I
> guess this is because it expects firmware in the NIC to be controlling
> these parts, not Linux.
>
> >
> > As soon as GPIOs and I2C busses are involved device trees are so much
> > better than ACPI
>
> Yes, ACPI has along way to go before it is usable for SoCs with
> integrated Ethernet.
>

I agree, however hopefully the MDIO + ACPI patchset, that currently
seems to be pretty advanced on the lists, will land - it will be a big
step forward and open a path for full SFP support. However, my point
is, that in case of MacchiatoBin, I prefer to use a bit limited link
IRQs, just for having a guarantee to boot each Linux kernel with mvpp2
starting from v4.16 until today and being sure to install various
distros/OSs/ESXI. For DT one have to find a matching version, that
luckily won't break the boot.

Of course the DT is more flexible and offers huge possibilities (e.g.
DSA), but the way it's been done, inherited straight from armv7
embedded-hacking times is imo a burden. Unstable, constantly changing
ABI, extending drivers rather than describe HW is too often a problem.
This patchset is a bright example that there is a field for
improvement.

In my ideal world DT should be properly designed (vendors+community),
out of Linux tree, reviewed by maintainers from different projects,
backward compatible and ensuring proper information/heads-up when
planning to do a meaningful change. I know how it looks and I'm aware
it is hard, but we should at least try :)

Best regards,
Marcin

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Andrew Lunn]

> I agree, however hopefully the MDIO + ACPI patchset, that currently
> seems to be pretty advanced on the lists, will land

Well, it has not yet addressed the standing NACK. Which is why no
networking people are reviewing it. We will have to wait and see if
they can do what it needed to clear the NACK.

     Andrew

Re: [PATCH v3 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem

[Andrew Lunn]

> I agree, however hopefully the MDIO + ACPI patchset, that currently
> seems to be pretty advanced on the lists, will land

Well, it has not yet addressed the standing NACK. Which is why no
networking people are reviewing it. We will have to wait and see if
they can do what it needed to clear the NACK.

     Andrew

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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel