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* [PATCH] dcdbas: force SMI to happen when expected
@ 2011-01-18 18:20 Stuart_Hayes
  2011-02-01 20:42 ` Douglas_Warzecha
  0 siblings, 1 reply; 2+ messages in thread
From: Stuart_Hayes @ 2011-01-18 18:20 UTC (permalink / raw)
  To: Douglas_Warzecha, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 568 bytes --]

The dcdbas driver can do an I/O write to cause a SMI to occur.  On some systems I/O writes are posted in the chipset and don't complete immediately.  This can result in the SMI happening at a later time.  This can result in random failures since the SMI handler expects the EBX register to contain a pointer, and the handler can write to memory.

Performing an I/O read to the same address as the I/O write will force the I/O write to complete.  The patch is against the 2.6.37 kernel and has been tested.

Signed-off-by: Stuart Hayes <stuart_hayes@dell.com>



[-- Attachment #2: dcdbas_37_smiread.patch --]
[-- Type: application/octet-stream, Size: 520 bytes --]

diff -purN linux-2.6.37/drivers/firmware/dcdbas.c linux-2.6.37_test/drivers/firmware/dcdbas.c
--- linux-2.6.37/drivers/firmware/dcdbas.c	2011-01-18 10:44:44.869882461 -0500
+++ linux-2.6.37_test/drivers/firmware/dcdbas.c	2011-01-18 10:41:15.404612154 -0500
@@ -278,6 +278,9 @@ int dcdbas_smi_request(struct smi_cmd *s
 		: "memory"
 	);
 
+	/* read to force posted write through and make SMI happen now */
+	inb(smi_cmd->command_address);
+
 out:
 	set_cpus_allowed_ptr(current, old_mask);
 	free_cpumask_var(old_mask);

^ permalink raw reply	[flat|nested] 2+ messages in thread

* RE: [PATCH] dcdbas: force SMI to happen when expected
  2011-01-18 18:20 [PATCH] dcdbas: force SMI to happen when expected Stuart_Hayes
@ 2011-02-01 20:42 ` Douglas_Warzecha
  0 siblings, 0 replies; 2+ messages in thread
From: Douglas_Warzecha @ 2011-02-01 20:42 UTC (permalink / raw)
  To: linux-kernel, Stuart_Hayes

On 01/18/2011 12:21 PM, Stuart Hayes wrote:
> The dcdbas driver can do an I/O write to cause a SMI to occur.  On some
> systems I/O writes are posted in the chipset and don't complete
> immediately.  This can result in the SMI happening at a later time.
> This can result in random failures since the SMI handler expects the
> EBX register to contain a pointer, and the handler can write to memory.
> 
> Performing an I/O read to the same address as the I/O write will force
> the I/O write to complete.  The patch is against the 2.6.37 kernel and
> has been tested.
> 
> Signed-off-by: Stuart Hayes <stuart_hayes@dell.com>

Acked-by: Doug Warzecha <douglas_warzecha@dell.com>


^ permalink raw reply	[flat|nested] 2+ messages in thread

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2011-01-18 18:20 [PATCH] dcdbas: force SMI to happen when expected Stuart_Hayes
2011-02-01 20:42 ` Douglas_Warzecha

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