From: <Yuiko.Oshino@microchip.com>
To: <andrew@lunn.ch>
Cc: <davem@davemloft.net>, <netdev@vger.kernel.org>,
<Nisar.Sayed@microchip.com>, <UNGLinuxDriver@microchip.com>
Subject: RE: [PATCH net-next] net: phy: microchip_t1: add cable test support for lan87xx phy
Date: Wed, 27 Oct 2021 14:30:38 +0000 [thread overview]
Message-ID: <CH0PR11MB55619DF408C4EC0D729BC87F8E859@CH0PR11MB5561.namprd11.prod.outlook.com> (raw)
In-Reply-To: <YXMXeuMUVvmR5Zrc@lunn.ch>
>-----Original Message-----
>From: Andrew Lunn <andrew@lunn.ch>
>Sent: Friday, October 22, 2021 3:57 PM
>To: Yuiko Oshino - C18177 <Yuiko.Oshino@microchip.com>
>Cc: davem@davemloft.net; netdev@vger.kernel.org; Nisar Sayed - I17970
><Nisar.Sayed@microchip.com>; UNGLinuxDriver
><UNGLinuxDriver@microchip.com>
>Subject: Re: [PATCH net-next] net: phy: microchip_t1: add cable test support for
>lan87xx phy
>
>EXTERNAL EMAIL: Do not click links or open attachments unless you know the
>content is safe
>
>> +static int lan87xx_cable_test_start(struct phy_device *phydev) {
>> + static const struct access_ereg_val cable_test[] = {
>> + /* min wait */
>> + {PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_DSP, 93,
>> + 0, 0},
>> + /* max wait */
>> + {PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_DSP, 94,
>> + 10, 0},
>> + /* pulse cycle */
>> + {PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_DSP, 95,
>> + 90, 0},
>> + /* cable diag thresh */
>> + {PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_DSP, 92,
>> + 60, 0},
>> + /* max gain */
>> + {PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_DSP, 79,
>> + 31, 0},
>> + /* clock align for each iteration */
>> + {PHYACC_ATTR_MODE_MODIFY, PHYACC_ATTR_BANK_DSP, 55,
>> + 0, 0x0038},
>> + /* max cycle wait config */
>> + {PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_DSP, 94,
>> + 70, 0},
>> + /* start cable diag*/
>> + {PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_DSP, 90,
>> + 1, 0},
>> + };
>> + int rc, i;
>> +
>> + rc = microchip_cable_test_start_common(phydev);
>> + if (rc < 0)
>> + return rc;
>> +
>> + /* start cable diag */
>> + /* check if part is alive - if not, return diagnostic error */
>> + rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
>PHYACC_ATTR_BANK_SMI,
>> + 0x00, 0);
>> + if (rc < 0)
>> + return rc;
>> +
>> + if (rc != 0x2100)
>> + return -ENODEV;
>
>What does this actually mean? Would -EOPNOTSUPP be better?
This register should return the value of 0x2100. So if the return value is different, then I assume there is no device.
>
>> +static int lan87xx_cable_test_report_trans(u32 result) {
>> + switch (result) {
>> + case 0:
>> + return ETHTOOL_A_CABLE_RESULT_CODE_OK;
>> + case 1:
>> + return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
>> + case 2:
>> + return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
>
>Please add some #defines for 0, 1, 2.
Sure, will do.
>
> Andrew
Thank you.
Yuiko
next prev parent reply other threads:[~2021-10-27 14:31 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-22 18:36 [PATCH net-next] net: phy: microchip_t1: add cable test support for lan87xx phy Yuiko Oshino
2021-10-22 19:48 ` Andrew Lunn
2021-10-27 14:21 ` Yuiko.Oshino
2021-10-22 19:56 ` Andrew Lunn
2021-10-27 14:30 ` Yuiko.Oshino [this message]
2021-10-27 14:46 ` Andrew Lunn
2021-10-27 14:54 ` Yuiko.Oshino
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