[PATCH 1/3] amd/amdgpu: add Arcturus vf DID support

[PATCH 1/3] amd/amdgpu: add Arcturus vf DID support

[Frank.Min]

Change-Id: I7153153785fdd54a10ebc47e778e06982edc79d7
Signed-off-by: Frank.Min <Frank.Min@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0e8c165..3890ba2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -999,6 +999,7 @@ static const struct pci_device_id pciidlist[] = {
 	{0x1002, 0x738C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
 	{0x1002, 0x7388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
 	{0x1002, 0x738E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
+	{0x1002, 0x7390, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
 	/* Navi10 */
 	{0x1002, 0x7310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
 	{0x1002, 0x7312, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
-- 
2.7.4

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[PATCH 2/3] amd/amdkfd: add Arcturus vf DID support

[Frank.Min]

Change-Id: I842cc31ab040b17dcc5765e275e5402df785b34a
Signed-off-by: Frank.Min <Frank.Min@amd.com>
---
 drivers/gpu/drm/amd/amdkfd/kfd_device.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index 3b9fe62..32b1cfa 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -472,6 +472,7 @@ static const struct kfd_deviceid supported_devices[] = {
 	{ 0x738C, &arcturus_device_info },	/* Arcturus */
 	{ 0x7388, &arcturus_device_info },	/* Arcturus */
 	{ 0x738E, &arcturus_device_info },	/* Arcturus */
+	{ 0x7390, &arcturus_device_info },	/* Arcturus vf */
 	{ 0x7310, &navi10_device_info },	/* Navi10 */
 	{ 0x7312, &navi10_device_info },	/* Navi10 */
 	{ 0x7318, &navi10_device_info },	/* Navi10 */
-- 
2.7.4

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[PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

[Frank.Min]

sriov would not use agp, so seperate the fb aperture setting.

Change-Id: I1372cd355326731a31361bff13d79e12121b8651
Signed-off-by: Frank.Min <Frank.Min@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 39 ++++++++++++++++++++------------
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c    | 12 +++++-----
 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c  | 27 +++++++++++++++-------
 3 files changed, 49 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 6ce37ce..ec78c8b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -75,23 +75,32 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
 	WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
 	WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
 
-	/* Program the system aperture low logical page number. */
-	WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
-		     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
+	if (amdgpu_sriov_vf(adev)) {
+		/* Program the system aperture low logical page number. */
+		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
+				 adev->gmc.fb_start >> 18);
 
-	if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
-		/*
-		 * Raven2 has a HW issue that it is unable to use the vram which
-		 * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
-		 * workaround that increase system aperture high address (add 1)
-		 * to get rid of the VM fault and hardware hang.
-		 */
 		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
-			     max((adev->gmc.fb_end >> 18) + 0x1,
-				 adev->gmc.agp_end >> 18));
-	else
-		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
-			     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
+				 adev->gmc.fb_end >> 18);
+	} else {
+		/* Program the system aperture low logical page number. */
+		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
+			     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
+
+		if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
+			/*
+			 * Raven2 has a HW issue that it is unable to use the vram which
+			 * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
+			 * workaround that increase system aperture high address (add 1)
+			 * to get rid of the VM fault and hardware hang.
+			 */
+			WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
+				     max((adev->gmc.fb_end >> 18) + 0x1,
+					 adev->gmc.agp_end >> 18));
+		else
+			WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
+				     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
+	}
 
 	/* Set default page address. */
 	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 6de1726..1f8bdfa 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -920,12 +920,12 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
 					struct amdgpu_gmc *mc)
 {
 	u64 base = 0;
-	if (!amdgpu_sriov_vf(adev)) {
-		if (adev->asic_type == CHIP_ARCTURUS)
-			base = mmhub_v9_4_get_fb_location(adev);
-		else
-			base = mmhub_v1_0_get_fb_location(adev);
-	}
+
+	if (adev->asic_type == CHIP_ARCTURUS)
+		base = mmhub_v9_4_get_fb_location(adev);
+	else
+		base = mmhub_v1_0_get_fb_location(adev);
+
 	/* add the xgmi offset of the physical node */
 	base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;
 	amdgpu_gmc_vram_location(adev, mc, base);
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index 0cf7ef4..ea3359f 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -118,14 +118,25 @@ static void mmhub_v9_4_init_system_aperture_regs(struct amdgpu_device *adev,
 			    adev->gmc.agp_start >> 24);
 
 	/* Program the system aperture low logical page number. */
-	WREG32_SOC15_OFFSET(MMHUB, 0,
-			    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
-			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
-			    min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
-	WREG32_SOC15_OFFSET(MMHUB, 0,
-			    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
-			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
-			    max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
+	if (amdgpu_sriov_vf(adev)) {
+		WREG32_SOC15_OFFSET(MMHUB, 0,
+					mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
+					hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
+					adev->gmc.fb_start >> 18);
+		WREG32_SOC15_OFFSET(MMHUB, 0,
+					mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
+					hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
+					adev->gmc.fb_end >> 18);
+	} else {
+		WREG32_SOC15_OFFSET(MMHUB, 0,
+				    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
+				    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
+				    min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
+		WREG32_SOC15_OFFSET(MMHUB, 0,
+				    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
+				    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
+				    max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
+	}
 
 	/* Set default page address. */
 	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start +
-- 
2.7.4

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答复: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

[Min, Frank]

Hi Christian,
Thanks for your review.
For SRIOV, amdgpu_gmc_agp_location() would not be called, since it do not use AGP. Also there is no need to use the min and max to judge which range is correct for using.

Best Regards,
Frank

-----邮件原件-----
发件人: Christian König <ckoenig.leichtzumerken@gmail.com> 
发送时间: 2019年8月19日 15:07
收件人: Min, Frank <Frank.Min@amd.com>; amd-gfx@lists.freedesktop.org
主题: Re: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

Am 16.08.19 um 10:59 schrieb Frank.Min:
> sriov would not use agp, so seperate the fb aperture setting.

That won't work correctly. This way we don't program the AGP space into the hardware any more, but would still try to use it.

We rather need to adjust the amdgpu_gmc_agp_location() function or it's caller to not assign an AGP space in the first place.

Christian.

>
> Change-Id: I1372cd355326731a31361bff13d79e12121b8651
> Signed-off-by: Frank.Min <Frank.Min@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 39 ++++++++++++++++++++------------
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c    | 12 +++++-----
>   drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c  | 27 +++++++++++++++-------
>   3 files changed, 49 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> index 6ce37ce..ec78c8b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> @@ -75,23 +75,32 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
>   	WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
>   	WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
>   
> -	/* Program the system aperture low logical page number. */
> -	WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
> -		     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
> +	if (amdgpu_sriov_vf(adev)) {
> +		/* Program the system aperture low logical page number. */
> +		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
> +				 adev->gmc.fb_start >> 18);
>   
> -	if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
> -		/*
> -		 * Raven2 has a HW issue that it is unable to use the vram which
> -		 * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
> -		 * workaround that increase system aperture high address (add 1)
> -		 * to get rid of the VM fault and hardware hang.
> -		 */
>   		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
> -			     max((adev->gmc.fb_end >> 18) + 0x1,
> -				 adev->gmc.agp_end >> 18));
> -	else
> -		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
> -			     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
> +				 adev->gmc.fb_end >> 18);
> +	} else {
> +		/* Program the system aperture low logical page number. */
> +		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
> +			     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
> +
> +		if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
> +			/*
> +			 * Raven2 has a HW issue that it is unable to use the vram which
> +			 * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
> +			 * workaround that increase system aperture high address (add 1)
> +			 * to get rid of the VM fault and hardware hang.
> +			 */
> +			WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
> +				     max((adev->gmc.fb_end >> 18) + 0x1,
> +					 adev->gmc.agp_end >> 18));
> +		else
> +			WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
> +				     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
> +	}
>   
>   	/* Set default page address. */
>   	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start diff 
> --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 6de1726..1f8bdfa 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -920,12 +920,12 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
>   					struct amdgpu_gmc *mc)
>   {
>   	u64 base = 0;
> -	if (!amdgpu_sriov_vf(adev)) {
> -		if (adev->asic_type == CHIP_ARCTURUS)
> -			base = mmhub_v9_4_get_fb_location(adev);
> -		else
> -			base = mmhub_v1_0_get_fb_location(adev);
> -	}
> +
> +	if (adev->asic_type == CHIP_ARCTURUS)
> +		base = mmhub_v9_4_get_fb_location(adev);
> +	else
> +		base = mmhub_v1_0_get_fb_location(adev);
> +
>   	/* add the xgmi offset of the physical node */
>   	base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;
>   	amdgpu_gmc_vram_location(adev, mc, base); diff --git 
> a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 
> b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> index 0cf7ef4..ea3359f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> @@ -118,14 +118,25 @@ static void mmhub_v9_4_init_system_aperture_regs(struct amdgpu_device *adev,
>   			    adev->gmc.agp_start >> 24);
>   
>   	/* Program the system aperture low logical page number. */
> -	WREG32_SOC15_OFFSET(MMHUB, 0,
> -			    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
> -			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
> -			    min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
> -	WREG32_SOC15_OFFSET(MMHUB, 0,
> -			    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
> -			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
> -			    max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
> +	if (amdgpu_sriov_vf(adev)) {
> +		WREG32_SOC15_OFFSET(MMHUB, 0,
> +					mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
> +					hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
> +					adev->gmc.fb_start >> 18);
> +		WREG32_SOC15_OFFSET(MMHUB, 0,
> +					mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
> +					hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
> +					adev->gmc.fb_end >> 18);
> +	} else {
> +		WREG32_SOC15_OFFSET(MMHUB, 0,
> +				    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
> +				    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
> +				    min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
> +		WREG32_SOC15_OFFSET(MMHUB, 0,
> +				    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
> +				    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
> +				    max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
> +	}
>   
>   	/* Set default page address. */
>   	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start +

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Re: 答复: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

[Koenig, Christian]

Yeah, I thought so.

In this case we don't need this patch or is there anything I'm still 
missing?

The use of min/max here is exactly to avoid having a SRIOV dependency here.

Regards,
Christian.

Am 19.08.19 um 09:17 schrieb Min, Frank:
> Hi Christian,
> Thanks for your review.
> For SRIOV, amdgpu_gmc_agp_location() would not be called, since it do not use AGP. Also there is no need to use the min and max to judge which range is correct for using.
>
> Best Regards,
> Frank
>
> -----邮件原件-----
> 发件人: Christian König <ckoenig.leichtzumerken@gmail.com>
> 发送时间: 2019年8月19日 15:07
> 收件人: Min, Frank <Frank.Min@amd.com>; amd-gfx@lists.freedesktop.org
> 主题: Re: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting
>
> Am 16.08.19 um 10:59 schrieb Frank.Min:
>> sriov would not use agp, so seperate the fb aperture setting.
> That won't work correctly. This way we don't program the AGP space into the hardware any more, but would still try to use it.
>
> We rather need to adjust the amdgpu_gmc_agp_location() function or it's caller to not assign an AGP space in the first place.
>
> Christian.
>
>> Change-Id: I1372cd355326731a31361bff13d79e12121b8651
>> Signed-off-by: Frank.Min <Frank.Min@amd.com>
>> ---
>>    drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 39 ++++++++++++++++++++------------
>>    drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c    | 12 +++++-----
>>    drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c  | 27 +++++++++++++++-------
>>    3 files changed, 49 insertions(+), 29 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> index 6ce37ce..ec78c8b 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> @@ -75,23 +75,32 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
>>    	WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
>>    	WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
>>    
>> -	/* Program the system aperture low logical page number. */
>> -	WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> -		     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>> +	if (amdgpu_sriov_vf(adev)) {
>> +		/* Program the system aperture low logical page number. */
>> +		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> +				 adev->gmc.fb_start >> 18);
>>    
>> -	if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
>> -		/*
>> -		 * Raven2 has a HW issue that it is unable to use the vram which
>> -		 * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
>> -		 * workaround that increase system aperture high address (add 1)
>> -		 * to get rid of the VM fault and hardware hang.
>> -		 */
>>    		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> -			     max((adev->gmc.fb_end >> 18) + 0x1,
>> -				 adev->gmc.agp_end >> 18));
>> -	else
>> -		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> -			     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>> +				 adev->gmc.fb_end >> 18);
>> +	} else {
>> +		/* Program the system aperture low logical page number. */
>> +		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> +			     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>> +
>> +		if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
>> +			/*
>> +			 * Raven2 has a HW issue that it is unable to use the vram which
>> +			 * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
>> +			 * workaround that increase system aperture high address (add 1)
>> +			 * to get rid of the VM fault and hardware hang.
>> +			 */
>> +			WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> +				     max((adev->gmc.fb_end >> 18) + 0x1,
>> +					 adev->gmc.agp_end >> 18));
>> +		else
>> +			WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> +				     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>> +	}
>>    
>>    	/* Set default page address. */
>>    	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start diff
>> --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> index 6de1726..1f8bdfa 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> @@ -920,12 +920,12 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
>>    					struct amdgpu_gmc *mc)
>>    {
>>    	u64 base = 0;
>> -	if (!amdgpu_sriov_vf(adev)) {
>> -		if (adev->asic_type == CHIP_ARCTURUS)
>> -			base = mmhub_v9_4_get_fb_location(adev);
>> -		else
>> -			base = mmhub_v1_0_get_fb_location(adev);
>> -	}
>> +
>> +	if (adev->asic_type == CHIP_ARCTURUS)
>> +		base = mmhub_v9_4_get_fb_location(adev);
>> +	else
>> +		base = mmhub_v1_0_get_fb_location(adev);
>> +
>>    	/* add the xgmi offset of the physical node */
>>    	base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;
>>    	amdgpu_gmc_vram_location(adev, mc, base); diff --git
>> a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>> b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>> index 0cf7ef4..ea3359f 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>> @@ -118,14 +118,25 @@ static void mmhub_v9_4_init_system_aperture_regs(struct amdgpu_device *adev,
>>    			    adev->gmc.agp_start >> 24);
>>    
>>    	/* Program the system aperture low logical page number. */
>> -	WREG32_SOC15_OFFSET(MMHUB, 0,
>> -			    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> -			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> -			    min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>> -	WREG32_SOC15_OFFSET(MMHUB, 0,
>> -			    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> -			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> -			    max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>> +	if (amdgpu_sriov_vf(adev)) {
>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>> +					mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> +					hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> +					adev->gmc.fb_start >> 18);
>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>> +					mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> +					hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> +					adev->gmc.fb_end >> 18);
>> +	} else {
>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>> +				    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> +				    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> +				    min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>> +				    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> +				    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> +				    max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>> +	}
>>    
>>    	/* Set default page address. */
>>    	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start +

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答复: 答复: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

[Min, Frank]

Hi Christian,
As I point out. For SRIOV, amdgpu_gmc_agp_location() would not be called, so the value calculation would not be valid. Would you please give more info why we need the AGP except for the zfb?

For another, whether you review the other patches?

Best Regards,
Frank

-----邮件原件-----
发件人: Koenig, Christian <Christian.Koenig@amd.com> 
发送时间: 2019年8月19日 15:21
收件人: Min, Frank <Frank.Min@amd.com>; amd-gfx@lists.freedesktop.org
主题: Re: 答复: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

Yeah, I thought so.

In this case we don't need this patch or is there anything I'm still missing?

The use of min/max here is exactly to avoid having a SRIOV dependency here.

Regards,
Christian.

Am 19.08.19 um 09:17 schrieb Min, Frank:
> Hi Christian,
> Thanks for your review.
> For SRIOV, amdgpu_gmc_agp_location() would not be called, since it do not use AGP. Also there is no need to use the min and max to judge which range is correct for using.
>
> Best Regards,
> Frank
>
> -----邮件原件-----
> 发件人: Christian König <ckoenig.leichtzumerken@gmail.com>
> 发送时间: 2019年8月19日 15:07
> 收件人: Min, Frank <Frank.Min@amd.com>; amd-gfx@lists.freedesktop.org
> 主题: Re: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting
>
> Am 16.08.19 um 10:59 schrieb Frank.Min:
>> sriov would not use agp, so seperate the fb aperture setting.
> That won't work correctly. This way we don't program the AGP space into the hardware any more, but would still try to use it.
>
> We rather need to adjust the amdgpu_gmc_agp_location() function or it's caller to not assign an AGP space in the first place.
>
> Christian.
>
>> Change-Id: I1372cd355326731a31361bff13d79e12121b8651
>> Signed-off-by: Frank.Min <Frank.Min@amd.com>
>> ---
>>    drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 39 ++++++++++++++++++++------------
>>    drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c    | 12 +++++-----
>>    drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c  | 27 +++++++++++++++-------
>>    3 files changed, 49 insertions(+), 29 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> index 6ce37ce..ec78c8b 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> @@ -75,23 +75,32 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
>>    	WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
>>    	WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 
>> 24);
>>    
>> -	/* Program the system aperture low logical page number. */
>> -	WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> -		     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>> +	if (amdgpu_sriov_vf(adev)) {
>> +		/* Program the system aperture low logical page number. */
>> +		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> +				 adev->gmc.fb_start >> 18);
>>    
>> -	if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
>> -		/*
>> -		 * Raven2 has a HW issue that it is unable to use the vram which
>> -		 * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
>> -		 * workaround that increase system aperture high address (add 1)
>> -		 * to get rid of the VM fault and hardware hang.
>> -		 */
>>    		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> -			     max((adev->gmc.fb_end >> 18) + 0x1,
>> -				 adev->gmc.agp_end >> 18));
>> -	else
>> -		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> -			     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>> +				 adev->gmc.fb_end >> 18);
>> +	} else {
>> +		/* Program the system aperture low logical page number. */
>> +		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> +			     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>> +
>> +		if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
>> +			/*
>> +			 * Raven2 has a HW issue that it is unable to use the vram which
>> +			 * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
>> +			 * workaround that increase system aperture high address (add 1)
>> +			 * to get rid of the VM fault and hardware hang.
>> +			 */
>> +			WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> +				     max((adev->gmc.fb_end >> 18) + 0x1,
>> +					 adev->gmc.agp_end >> 18));
>> +		else
>> +			WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> +				     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>> +	}
>>    
>>    	/* Set default page address. */
>>    	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start diff 
>> --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> index 6de1726..1f8bdfa 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> @@ -920,12 +920,12 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
>>    					struct amdgpu_gmc *mc)
>>    {
>>    	u64 base = 0;
>> -	if (!amdgpu_sriov_vf(adev)) {
>> -		if (adev->asic_type == CHIP_ARCTURUS)
>> -			base = mmhub_v9_4_get_fb_location(adev);
>> -		else
>> -			base = mmhub_v1_0_get_fb_location(adev);
>> -	}
>> +
>> +	if (adev->asic_type == CHIP_ARCTURUS)
>> +		base = mmhub_v9_4_get_fb_location(adev);
>> +	else
>> +		base = mmhub_v1_0_get_fb_location(adev);
>> +
>>    	/* add the xgmi offset of the physical node */
>>    	base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;
>>    	amdgpu_gmc_vram_location(adev, mc, base); diff --git 
>> a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>> b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>> index 0cf7ef4..ea3359f 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>> @@ -118,14 +118,25 @@ static void mmhub_v9_4_init_system_aperture_regs(struct amdgpu_device *adev,
>>    			    adev->gmc.agp_start >> 24);
>>    
>>    	/* Program the system aperture low logical page number. */
>> -	WREG32_SOC15_OFFSET(MMHUB, 0,
>> -			    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> -			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> -			    min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>> -	WREG32_SOC15_OFFSET(MMHUB, 0,
>> -			    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> -			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> -			    max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>> +	if (amdgpu_sriov_vf(adev)) {
>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>> +					mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> +					hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> +					adev->gmc.fb_start >> 18);
>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>> +					mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> +					hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> +					adev->gmc.fb_end >> 18);
>> +	} else {
>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>> +				    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
>> +				    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> +				    min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>> +				    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>> +				    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>> +				    max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>> +	}
>>    
>>    	/* Set default page address. */
>>    	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start +

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Re: 答复: 答复: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

[Koenig, Christian]

> As I point out. For SRIOV, amdgpu_gmc_agp_location() would not be called, so the value calculation would not be valid.
Yeah, that is a good point. The values are zero initialized, but that is 
probably not correct in this moment.

agp_start should be set to 0xffffffff and agp_end to 0x0, that are also 
the values the hardware uses to disable the AGP bar.

> Would you please give more info why we need the AGP except for the zfb?
Actually quite a bunch of things. In general we use it to access 
uncached system memory from VMID0 to avoid reprogramming the GART all 
the time.

This in turn is used mostly by the SDMA for keeping page table copies in 
system memory, but can also be used by things like scanout from system 
memory on APUs.

I don't think we have any use case for SRIOV, so disabling the feature 
should be fine.

Regards,
Christian.

Am 19.08.19 um 12:24 schrieb Min, Frank:
> Hi Christian,
> As I point out. For SRIOV, amdgpu_gmc_agp_location() would not be called, so the value calculation would not be valid. Would you please give more info why we need the AGP except for the zfb?
>
> For another, whether you review the other patches?
>
> Best Regards,
> Frank
>
> -----邮件原件-----
> 发件人: Koenig, Christian <Christian.Koenig@amd.com>
> 发送时间: 2019年8月19日 15:21
> 收件人: Min, Frank <Frank.Min@amd.com>; amd-gfx@lists.freedesktop.org
> 主题: Re: 答复: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting
>
> Yeah, I thought so.
>
> In this case we don't need this patch or is there anything I'm still missing?
>
> The use of min/max here is exactly to avoid having a SRIOV dependency here.
>
> Regards,
> Christian.
>
> Am 19.08.19 um 09:17 schrieb Min, Frank:
>> Hi Christian,
>> Thanks for your review.
>> For SRIOV, amdgpu_gmc_agp_location() would not be called, since it do not use AGP. Also there is no need to use the min and max to judge which range is correct for using.
>>
>> Best Regards,
>> Frank
>>
>> -----邮件原件-----
>> 发件人: Christian König <ckoenig.leichtzumerken@gmail.com>
>> 发送时间: 2019年8月19日 15:07
>> 收件人: Min, Frank <Frank.Min@amd.com>; amd-gfx@lists.freedesktop.org
>> 主题: Re: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting
>>
>> Am 16.08.19 um 10:59 schrieb Frank.Min:
>>> sriov would not use agp, so seperate the fb aperture setting.
>> That won't work correctly. This way we don't program the AGP space into the hardware any more, but would still try to use it.
>>
>> We rather need to adjust the amdgpu_gmc_agp_location() function or it's caller to not assign an AGP space in the first place.
>>
>> Christian.
>>
>>> Change-Id: I1372cd355326731a31361bff13d79e12121b8651
>>> Signed-off-by: Frank.Min <Frank.Min@amd.com>
>>> ---
>>>     drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 39 ++++++++++++++++++++------------
>>>     drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c    | 12 +++++-----
>>>     drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c  | 27 +++++++++++++++-------
>>>     3 files changed, 49 insertions(+), 29 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>>> b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>>> index 6ce37ce..ec78c8b 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>>> @@ -75,23 +75,32 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
>>>     	WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
>>>     	WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >>
>>> 24);
>>>     
>>> -	/* Program the system aperture low logical page number. */
>>> -	WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
>>> -		     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>>> +	if (amdgpu_sriov_vf(adev)) {
>>> +		/* Program the system aperture low logical page number. */
>>> +		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
>>> +				 adev->gmc.fb_start >> 18);
>>>     
>>> -	if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
>>> -		/*
>>> -		 * Raven2 has a HW issue that it is unable to use the vram which
>>> -		 * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
>>> -		 * workaround that increase system aperture high address (add 1)
>>> -		 * to get rid of the VM fault and hardware hang.
>>> -		 */
>>>     		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>>> -			     max((adev->gmc.fb_end >> 18) + 0x1,
>>> -				 adev->gmc.agp_end >> 18));
>>> -	else
>>> -		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>>> -			     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>>> +				 adev->gmc.fb_end >> 18);
>>> +	} else {
>>> +		/* Program the system aperture low logical page number. */
>>> +		WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
>>> +			     min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>>> +
>>> +		if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
>>> +			/*
>>> +			 * Raven2 has a HW issue that it is unable to use the vram which
>>> +			 * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
>>> +			 * workaround that increase system aperture high address (add 1)
>>> +			 * to get rid of the VM fault and hardware hang.
>>> +			 */
>>> +			WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>>> +				     max((adev->gmc.fb_end >> 18) + 0x1,
>>> +					 adev->gmc.agp_end >> 18));
>>> +		else
>>> +			WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>>> +				     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>>> +	}
>>>     
>>>     	/* Set default page address. */
>>>     	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start diff
>>> --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> index 6de1726..1f8bdfa 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> @@ -920,12 +920,12 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
>>>     					struct amdgpu_gmc *mc)
>>>     {
>>>     	u64 base = 0;
>>> -	if (!amdgpu_sriov_vf(adev)) {
>>> -		if (adev->asic_type == CHIP_ARCTURUS)
>>> -			base = mmhub_v9_4_get_fb_location(adev);
>>> -		else
>>> -			base = mmhub_v1_0_get_fb_location(adev);
>>> -	}
>>> +
>>> +	if (adev->asic_type == CHIP_ARCTURUS)
>>> +		base = mmhub_v9_4_get_fb_location(adev);
>>> +	else
>>> +		base = mmhub_v1_0_get_fb_location(adev);
>>> +
>>>     	/* add the xgmi offset of the physical node */
>>>     	base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;
>>>     	amdgpu_gmc_vram_location(adev, mc, base); diff --git
>>> a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>>> b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>>> index 0cf7ef4..ea3359f 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
>>> @@ -118,14 +118,25 @@ static void mmhub_v9_4_init_system_aperture_regs(struct amdgpu_device *adev,
>>>     			    adev->gmc.agp_start >> 24);
>>>     
>>>     	/* Program the system aperture low logical page number. */
>>> -	WREG32_SOC15_OFFSET(MMHUB, 0,
>>> -			    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
>>> -			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>>> -			    min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>>> -	WREG32_SOC15_OFFSET(MMHUB, 0,
>>> -			    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>>> -			    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>>> -			    max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>>> +	if (amdgpu_sriov_vf(adev)) {
>>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>>> +					mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
>>> +					hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>>> +					adev->gmc.fb_start >> 18);
>>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>>> +					mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>>> +					hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>>> +					adev->gmc.fb_end >> 18);
>>> +	} else {
>>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>>> +				    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_LOW_ADDR,
>>> +				    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>>> +				    min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
>>> +		WREG32_SOC15_OFFSET(MMHUB, 0,
>>> +				    mmVMSHAREDVC0_MC_VM_SYSTEM_APERTURE_HIGH_ADDR,
>>> +				    hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
>>> +				    max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>>> +	}
>>>     
>>>     	/* Set default page address. */
>>>     	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start +

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Re: [PATCH 1/3] amd/amdgpu: add Arcturus vf DID support

[Christian König]

Am 16.08.19 um 10:59 schrieb Frank.Min:
> Change-Id: I7153153785fdd54a10ebc47e778e06982edc79d7
> Signed-off-by: Frank.Min <Frank.Min@amd.com>

Can't judge if the values are correct, but feel free to add an Acked-by: 
Christian König <christian.koenig@amd.com> to the first two patches.

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 0e8c165..3890ba2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -999,6 +999,7 @@ static const struct pci_device_id pciidlist[] = {
>   	{0x1002, 0x738C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
>   	{0x1002, 0x7388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
>   	{0x1002, 0x738E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
> +	{0x1002, 0x7390, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
>   	/* Navi10 */
>   	{0x1002, 0x7310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
>   	{0x1002, 0x7312, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},

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答复: [PATCH 2/3] amd/amdkfd: add Arcturus vf DID support

[Min, Frank]

Hi Alex,
Would you please help to review the kfd did add patch?

Best Regards,
Frank

-----邮件原件-----
发件人: Frank.Min <Frank.Min@amd.com> 
发送时间: 2019年8月16日 16:59
收件人: amd-gfx@lists.freedesktop.org
抄送: Min, Frank <Frank.Min@amd.com>
主题: [PATCH 2/3] amd/amdkfd: add Arcturus vf DID support

Change-Id: I842cc31ab040b17dcc5765e275e5402df785b34a
Signed-off-by: Frank.Min <Frank.Min@amd.com>
---
 drivers/gpu/drm/amd/amdkfd/kfd_device.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index 3b9fe62..32b1cfa 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -472,6 +472,7 @@ static const struct kfd_deviceid supported_devices[] = {
 	{ 0x738C, &arcturus_device_info },	/* Arcturus */
 	{ 0x7388, &arcturus_device_info },	/* Arcturus */
 	{ 0x738E, &arcturus_device_info },	/* Arcturus */
+	{ 0x7390, &arcturus_device_info },	/* Arcturus vf */
 	{ 0x7310, &navi10_device_info },	/* Navi10 */
 	{ 0x7312, &navi10_device_info },	/* Navi10 */
 	{ 0x7318, &navi10_device_info },	/* Navi10 */
-- 
2.7.4

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RE: [PATCH 1/3] amd/amdgpu: add Arcturus vf DID support

[Xu, Feifei]

Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Frank.Min
Sent: 2019年8月16日 16:59
To: amd-gfx@lists.freedesktop.org
Cc: Min, Frank <Frank.Min@amd.com>
Subject: [PATCH 1/3] amd/amdgpu: add Arcturus vf DID support

Change-Id: I7153153785fdd54a10ebc47e778e06982edc79d7
Signed-off-by: Frank.Min <Frank.Min@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0e8c165..3890ba2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -999,6 +999,7 @@ static const struct pci_device_id pciidlist[] = {
 	{0x1002, 0x738C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
 	{0x1002, 0x7388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
 	{0x1002, 0x738E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
+	{0x1002, 0x7390, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
 	/* Navi10 */
 	{0x1002, 0x7310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
 	{0x1002, 0x7312, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
-- 
2.7.4

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Re: [PATCH 2/3] amd/amdkfd: add Arcturus vf DID support

[Deucher, Alexander]

[-- Attachment #1.1: Type: text/plain, Size: 1654 bytes --]

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
________________________________
From: Min, Frank <Frank.Min@amd.com>
Sent: Thursday, August 22, 2019 4:24 AM
To: Zeng, Oak <Oak.Zeng@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher@amd.com>
Subject: 答复: [PATCH 2/3] amd/amdkfd: add Arcturus vf DID support

Hi Alex,
Would you please help to review the kfd did add patch?

Best Regards,
Frank

-----邮件原件-----
发件人: Frank.Min <Frank.Min@amd.com>
发送时间: 2019年8月16日 16:59
收件人: amd-gfx@lists.freedesktop.org
抄送: Min, Frank <Frank.Min@amd.com>
主题: [PATCH 2/3] amd/amdkfd: add Arcturus vf DID support

Change-Id: I842cc31ab040b17dcc5765e275e5402df785b34a
Signed-off-by: Frank.Min <Frank.Min@amd.com>
---
 drivers/gpu/drm/amd/amdkfd/kfd_device.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index 3b9fe62..32b1cfa 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -472,6 +472,7 @@ static const struct kfd_deviceid supported_devices[] = {
         { 0x738C, &arcturus_device_info },      /* Arcturus */
         { 0x7388, &arcturus_device_info },      /* Arcturus */
         { 0x738E, &arcturus_device_info },      /* Arcturus */
+       { 0x7390, &arcturus_device_info },      /* Arcturus vf */
         { 0x7310, &navi10_device_info },        /* Navi10 */
         { 0x7312, &navi10_device_info },        /* Navi10 */
         { 0x7318, &navi10_device_info },        /* Navi10 */
--
2.7.4


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