* [PATCH v2 00/10] Misc clean ups to target/ppc exception handling
@ 2023-06-14 21:34 BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 01/10] target/ppc: Remove some superfluous parentheses BALATON Zoltan
` (9 more replies)
0 siblings, 10 replies; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-14 21:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza, Nicholas Piggin
These are some small clean ups for target/ppc/excp_helper.c trying to
make this code a bit simpler. No functional change is intended.
v2: Patch 3 changes according to review, added tags
Regards,
BALATON Zoltan
BALATON Zoltan (10):
target/ppc: Remove some superfluous parentheses
target/ppc: Remove unneeded parameter from powerpc_reset_wakeup()
target/ppc: Move common check in exception handlers to a function
target/ppc: Use env_cpu for cpu_abort in excp_helper
target/ppc: Change parameter of cpu_interrupt_exittb() to an env
pointer
target/ppc: Readability improvements in exception handlers
target/ppd: Remove unused define
target/ppc: Fix gen_sc to use correct nip
target/ppc: Simplify syscall exception handlers
target/ppc: Get CPUState in one step
target/ppc/cpu.h | 1 +
target/ppc/excp_helper.c | 512 +++++++++++----------------------------
target/ppc/helper_regs.c | 15 +-
target/ppc/helper_regs.h | 2 +-
target/ppc/translate.c | 9 +-
5 files changed, 158 insertions(+), 381 deletions(-)
--
2.30.9
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 01/10] target/ppc: Remove some superfluous parentheses
2023-06-14 21:34 [PATCH v2 00/10] Misc clean ups to target/ppc exception handling BALATON Zoltan
@ 2023-06-14 21:34 ` BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 02/10] target/ppc: Remove unneeded parameter from powerpc_reset_wakeup() BALATON Zoltan
` (8 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-14 21:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza, Nicholas Piggin
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Acked-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/excp_helper.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 12d8a7257b..8298217e78 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1009,7 +1009,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
{
int lev = env->error_code;
- if ((lev == 1) && cpu->vhyp) {
+ if (lev == 1 && cpu->vhyp) {
dump_hcall(env);
} else {
dump_syscall(env);
@@ -1027,7 +1027,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
* uses VOF and the 74xx CPUs, so although the 74xx don't have
* HV mode, we need to keep hypercall support.
*/
- if ((lev == 1) && cpu->vhyp) {
+ if (lev == 1 && cpu->vhyp) {
PPCVirtualHypervisorClass *vhc =
PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp);
vhc->hypercall(cpu->vhyp, cpu);
@@ -1481,7 +1481,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_SYSCALL: /* System call exception */
lev = env->error_code;
- if ((lev == 1) && cpu->vhyp) {
+ if (lev == 1 && cpu->vhyp) {
dump_hcall(env);
} else {
dump_syscall(env);
@@ -1494,7 +1494,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
env->nip += 4;
/* "PAPR mode" built-in hypercall emulation */
- if ((lev == 1) && books_vhyp_handles_hcall(cpu)) {
+ if (lev == 1 && books_vhyp_handles_hcall(cpu)) {
PPCVirtualHypervisorClass *vhc =
PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp);
vhc->hypercall(cpu->vhyp, cpu);
--
2.30.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 02/10] target/ppc: Remove unneeded parameter from powerpc_reset_wakeup()
2023-06-14 21:34 [PATCH v2 00/10] Misc clean ups to target/ppc exception handling BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 01/10] target/ppc: Remove some superfluous parentheses BALATON Zoltan
@ 2023-06-14 21:34 ` BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 03/10] target/ppc: Move common check in exception handlers to a function BALATON Zoltan
` (7 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-14 21:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza, Nicholas Piggin
CPUState is rarely needed by this function (only for logging a fatal
error) and it's easy to get from the env parameter so passing it
separately is not necessary.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Acked-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/excp_helper.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 8298217e78..3783315fdb 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -166,8 +166,7 @@ static void ppc_excp_debug_sw_tlb(CPUPPCState *env, int excp)
}
#if defined(TARGET_PPC64)
-static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp,
- target_ulong *msr)
+static int powerpc_reset_wakeup(CPUPPCState *env, int excp, target_ulong *msr)
{
/* We no longer are in a PM state */
env->resume_as_sreset = false;
@@ -202,8 +201,8 @@ static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp,
*msr |= SRR1_WAKEHVI;
break;
default:
- cpu_abort(cs, "Unsupported exception %d in Power Save mode\n",
- excp);
+ cpu_abort(env_cpu(env),
+ "Unsupported exception %d in Power Save mode\n", excp);
}
return POWERPC_EXCP_RESET;
}
@@ -1353,7 +1352,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
* P7/P8/P9
*/
if (env->resume_as_sreset) {
- excp = powerpc_reset_wakeup(cs, env, excp, &msr);
+ excp = powerpc_reset_wakeup(env, excp, &msr);
}
/*
--
2.30.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 03/10] target/ppc: Move common check in exception handlers to a function
2023-06-14 21:34 [PATCH v2 00/10] Misc clean ups to target/ppc exception handling BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 01/10] target/ppc: Remove some superfluous parentheses BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 02/10] target/ppc: Remove unneeded parameter from powerpc_reset_wakeup() BALATON Zoltan
@ 2023-06-14 21:34 ` BALATON Zoltan
2023-06-15 3:28 ` Nicholas Piggin
2023-06-14 21:34 ` [PATCH v2 04/10] target/ppc: Use env_cpu for cpu_abort in excp_helper BALATON Zoltan
` (6 subsequent siblings)
9 siblings, 1 reply; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-14 21:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza, Nicholas Piggin
All powerpc exception handlers share some code when handling machine
check exceptions. Move this to a common function.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
target/ppc/excp_helper.c | 114 +++++++++------------------------------
1 file changed, 25 insertions(+), 89 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 3783315fdb..79f5ca1034 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -403,6 +403,25 @@ static void powerpc_set_excp_state(PowerPCCPU *cpu, target_ulong vector,
env->reserve_addr = -1;
}
+static void powerpc_mcheck_checkstop(CPUPPCState *env)
+{
+ CPUState *cs = env_cpu(env);
+
+ if (FIELD_EX64(env->msr, MSR, ME)) {
+ return;
+ }
+
+ /* Machine check exception is not enabled. Enter checkstop state. */
+ fprintf(stderr, "Machine check while not allowed. "
+ "Entering checkstop state\n");
+ if (qemu_log_separate()) {
+ qemu_log("Machine check while not allowed. "
+ "Entering checkstop state\n");
+ }
+ cs->halted = 1;
+ cpu_interrupt_exittb(cs);
+}
+
static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
{
CPUState *cs = CPU(cpu);
@@ -445,21 +464,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
srr1 = SPR_40x_SRR3;
break;
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
-
+ powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
@@ -576,21 +581,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_CRITICAL: /* Critical input */
break;
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
-
+ powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
@@ -749,21 +740,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
switch (excp) {
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
-
+ powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
@@ -934,21 +911,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
switch (excp) {
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
-
+ powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
@@ -1129,21 +1092,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
srr1 = SPR_BOOKE_CSRR1;
break;
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
-
+ powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
@@ -1376,20 +1325,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
switch (excp) {
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
+ powerpc_mcheck_checkstop(env);
if (env->msr_mask & MSR_HVB) {
/*
* ISA specifies HV, but can be delivered to guest with HV
--
2.30.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 04/10] target/ppc: Use env_cpu for cpu_abort in excp_helper
2023-06-14 21:34 [PATCH v2 00/10] Misc clean ups to target/ppc exception handling BALATON Zoltan
` (2 preceding siblings ...)
2023-06-14 21:34 ` [PATCH v2 03/10] target/ppc: Move common check in exception handlers to a function BALATON Zoltan
@ 2023-06-14 21:34 ` BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer BALATON Zoltan
` (5 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-14 21:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza, Nicholas Piggin
Use the env_cpu function to get the CPUState for cpu_abort. These are
only needed in case of fatal errors so this allows to avoid casting
and storing CPUState in a local variable wnen not needed.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
target/ppc/excp_helper.c | 118 +++++++++++++++++++++------------------
1 file changed, 63 insertions(+), 55 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 79f5ca1034..122e2a6e41 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -424,7 +424,6 @@ static void powerpc_mcheck_checkstop(CPUPPCState *env)
static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
{
- CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
target_ulong msr, new_msr, vector;
int srr0, srr1;
@@ -452,8 +451,8 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
vector = env->excp_vectors[excp];
if (vector == (target_ulong)-1ULL) {
- cpu_abort(cs, "Raised an exception without defined vector %d\n",
- excp);
+ cpu_abort(env_cpu(env),
+ "Raised an exception without defined vector %d\n", excp);
}
vector |= env->excp_prefix;
@@ -502,7 +501,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
env->spr[SPR_40x_ESR] = ESR_PTR;
break;
default:
- cpu_abort(cs, "Invalid program exception %d. Aborting\n",
+ cpu_abort(env_cpu(env), "Invalid program exception %d. Aborting\n",
env->error_code);
break;
}
@@ -529,11 +528,12 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
trace_ppc_excp_print("PIT");
break;
case POWERPC_EXCP_DEBUG: /* Debug interrupt */
- cpu_abort(cs, "%s exception not implemented\n",
+ cpu_abort(env_cpu(env), "%s exception not implemented\n",
powerpc_excp_name(excp));
break;
default:
- cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp);
+ cpu_abort(env_cpu(env), "Invalid PowerPC exception %d. Aborting\n",
+ excp);
break;
}
@@ -548,7 +548,6 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
{
- CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
target_ulong msr, new_msr, vector;
@@ -571,8 +570,8 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
vector = env->excp_vectors[excp];
if (vector == (target_ulong)-1ULL) {
- cpu_abort(cs, "Raised an exception without defined vector %d\n",
- excp);
+ cpu_abort(env_cpu(env),
+ "Raised an exception without defined vector %d\n", excp);
}
vector |= env->excp_prefix;
@@ -632,7 +631,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
break;
default:
/* Should never occur */
- cpu_abort(cs, "Invalid program exception %d. Aborting\n",
+ cpu_abort(env_cpu(env), "Invalid program exception %d. Aborting\n",
env->error_code);
break;
}
@@ -654,8 +653,9 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
break;
case POWERPC_EXCP_RESET: /* System reset exception */
if (FIELD_EX64(env->msr, MSR, POW)) {
- cpu_abort(cs, "Trying to deliver power-saving system reset "
- "exception %d with no HV support\n", excp);
+ cpu_abort(env_cpu(env),
+ "Trying to deliver power-saving system reset exception "
+ "%d with no HV support\n", excp);
}
break;
case POWERPC_EXCP_TRACE: /* Trace exception */
@@ -682,11 +682,12 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_SMI: /* System management interrupt */
case POWERPC_EXCP_MEXTBR: /* Maskable external breakpoint */
case POWERPC_EXCP_NMEXTBR: /* Non maskable external breakpoint */
- cpu_abort(cs, "%s exception not implemented\n",
+ cpu_abort(env_cpu(env), "%s exception not implemented\n",
powerpc_excp_name(excp));
break;
default:
- cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp);
+ cpu_abort(env_cpu(env), "Invalid PowerPC exception %d. Aborting\n",
+ excp);
break;
}
@@ -709,7 +710,6 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
{
- CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
target_ulong msr, new_msr, vector;
@@ -732,8 +732,8 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
vector = env->excp_vectors[excp];
if (vector == (target_ulong)-1ULL) {
- cpu_abort(cs, "Raised an exception without defined vector %d\n",
- excp);
+ cpu_abort(env_cpu(env),
+ "Raised an exception without defined vector %d\n", excp);
}
vector |= env->excp_prefix;
@@ -791,7 +791,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
break;
default:
/* Should never occur */
- cpu_abort(cs, "Invalid program exception %d. Aborting\n",
+ cpu_abort(env_cpu(env), "Invalid program exception %d. Aborting\n",
env->error_code);
break;
}
@@ -832,8 +832,9 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
break;
case POWERPC_EXCP_RESET: /* System reset exception */
if (FIELD_EX64(env->msr, MSR, POW)) {
- cpu_abort(cs, "Trying to deliver power-saving system reset "
- "exception %d with no HV support\n", excp);
+ cpu_abort(env_cpu(env),
+ "Trying to deliver power-saving system reset exception "
+ "%d with no HV support\n", excp);
}
break;
case POWERPC_EXCP_TRACE: /* Trace exception */
@@ -853,11 +854,12 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_SMI: /* System management interrupt */
case POWERPC_EXCP_THERM: /* Thermal interrupt */
case POWERPC_EXCP_PERFM: /* Embedded performance monitor interrupt */
- cpu_abort(cs, "%s exception not implemented\n",
+ cpu_abort(env_cpu(env), "%s exception not implemented\n",
powerpc_excp_name(excp));
break;
default:
- cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp);
+ cpu_abort(env_cpu(env), "Invalid PowerPC exception %d. Aborting\n",
+ excp);
break;
}
@@ -880,7 +882,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
{
- CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
target_ulong msr, new_msr, vector;
@@ -903,8 +904,8 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
vector = env->excp_vectors[excp];
if (vector == (target_ulong)-1ULL) {
- cpu_abort(cs, "Raised an exception without defined vector %d\n",
- excp);
+ cpu_abort(env_cpu(env),
+ "Raised an exception without defined vector %d\n", excp);
}
vector |= env->excp_prefix;
@@ -962,7 +963,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
break;
default:
/* Should never occur */
- cpu_abort(cs, "Invalid program exception %d. Aborting\n",
+ cpu_abort(env_cpu(env), "Invalid program exception %d. Aborting\n",
env->error_code);
break;
}
@@ -1003,7 +1004,8 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
break;
case POWERPC_EXCP_RESET: /* System reset exception */
if (FIELD_EX64(env->msr, MSR, POW)) {
- cpu_abort(cs, "Trying to deliver power-saving system reset "
+ cpu_abort(env_cpu(env),
+ "Trying to deliver power-saving system reset "
"exception %d with no HV support\n", excp);
}
break;
@@ -1016,11 +1018,12 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_THERM: /* Thermal interrupt */
case POWERPC_EXCP_PERFM: /* Embedded performance monitor interrupt */
case POWERPC_EXCP_VPUA: /* Vector assist exception */
- cpu_abort(cs, "%s exception not implemented\n",
+ cpu_abort(env_cpu(env), "%s exception not implemented\n",
powerpc_excp_name(excp));
break;
default:
- cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp);
+ cpu_abort(env_cpu(env), "Invalid PowerPC exception %d. Aborting\n",
+ excp);
break;
}
@@ -1043,7 +1046,6 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
{
- CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
target_ulong msr, new_msr, vector;
int srr0, srr1;
@@ -1080,8 +1082,8 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
vector = env->excp_vectors[excp];
if (vector == (target_ulong)-1ULL) {
- cpu_abort(cs, "Raised an exception without defined vector %d\n",
- excp);
+ cpu_abort(env_cpu(env),
+ "Raised an exception without defined vector %d\n", excp);
}
vector |= env->excp_prefix;
@@ -1112,6 +1114,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
break;
case POWERPC_EXCP_EXTERNAL: /* External input */
if (env->mpic_proxy) {
+ CPUState *cs = env_cpu(env);
/* IACK the IRQ on delivery */
env->spr[SPR_BOOKE_EPR] = ldl_phys(cs->as, env->mpic_iack);
}
@@ -1150,7 +1153,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
break;
default:
/* Should never occur */
- cpu_abort(cs, "Invalid program exception %d. Aborting\n",
+ cpu_abort(env_cpu(env), "Invalid program exception %d. Aborting\n",
env->error_code);
break;
}
@@ -1191,7 +1194,8 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
/* DBSR already modified by caller */
} else {
- cpu_abort(cs, "Debug exception triggered on unsupported model\n");
+ cpu_abort(env_cpu(env),
+ "Debug exception triggered on unsupported model\n");
}
break;
case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavailable/VPU */
@@ -1205,17 +1209,19 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
break;
case POWERPC_EXCP_RESET: /* System reset exception */
if (FIELD_EX64(env->msr, MSR, POW)) {
- cpu_abort(cs, "Trying to deliver power-saving system reset "
+ cpu_abort(env_cpu(env),
+ "Trying to deliver power-saving system reset "
"exception %d with no HV support\n", excp);
}
break;
case POWERPC_EXCP_EFPDI: /* Embedded floating-point data interrupt */
case POWERPC_EXCP_EFPRI: /* Embedded floating-point round interrupt */
- cpu_abort(cs, "%s exception not implemented\n",
+ cpu_abort(env_cpu(env), "%s exception not implemented\n",
powerpc_excp_name(excp));
break;
default:
- cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp);
+ cpu_abort(env_cpu(env), "Invalid PowerPC exception %d. Aborting\n",
+ excp);
break;
}
@@ -1278,7 +1284,6 @@ static bool books_vhyp_handles_hv_excp(PowerPCCPU *cpu)
static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
{
- CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
target_ulong msr, new_msr, vector;
int srr0, srr1, lev = -1;
@@ -1317,8 +1322,8 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
vector = env->excp_vectors[excp];
if (vector == (target_ulong)-1ULL) {
- cpu_abort(cs, "Raised an exception without defined vector %d\n",
- excp);
+ cpu_abort(env_cpu(env),
+ "Raised an exception without defined vector %d\n", excp);
}
vector |= env->excp_prefix;
@@ -1408,7 +1413,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
break;
default:
/* Should never occur */
- cpu_abort(cs, "Invalid program exception %d. Aborting\n",
+ cpu_abort(env_cpu(env), "Invalid program exception %d. Aborting\n",
env->error_code);
break;
}
@@ -1469,7 +1474,8 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
new_msr |= (target_ulong)MSR_HVB;
} else {
if (FIELD_EX64(env->msr, MSR, POW)) {
- cpu_abort(cs, "Trying to deliver power-saving system reset "
+ cpu_abort(env_cpu(env),
+ "Trying to deliver power-saving system reset "
"exception %d with no HV support\n", excp);
}
}
@@ -1524,11 +1530,12 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_VPUA: /* Vector assist exception */
case POWERPC_EXCP_MAINT: /* Maintenance exception */
case POWERPC_EXCP_HV_MAINT: /* Hypervisor Maintenance exception */
- cpu_abort(cs, "%s exception not implemented\n",
+ cpu_abort(env_cpu(env), "%s exception not implemented\n",
powerpc_excp_name(excp));
break;
default:
- cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp);
+ cpu_abort(env_cpu(env), "Invalid PowerPC exception %d. Aborting\n",
+ excp);
break;
}
@@ -1561,8 +1568,8 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
} else {
/* Sanity check */
if (!(env->msr_mask & MSR_HVB) && srr0 == SPR_HSRR0) {
- cpu_abort(cs, "Trying to deliver HV exception (HSRR) %d with "
- "no HV support\n", excp);
+ cpu_abort(env_cpu(env), "Trying to deliver HV exception (HSRR) %d "
+ "with no HV support\n", excp);
}
/* This can update new_msr and vector if AIL applies */
@@ -1580,11 +1587,11 @@ static inline void powerpc_excp_books(PowerPCCPU *cpu, int excp)
static void powerpc_excp(PowerPCCPU *cpu, int excp)
{
- CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
if (excp <= POWERPC_EXCP_NONE || excp >= POWERPC_EXCP_NB) {
- cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp);
+ cpu_abort(env_cpu(env), "Invalid PowerPC exception %d. Aborting\n",
+ excp);
}
qemu_log_mask(CPU_LOG_INT, "Raise exception at " TARGET_FMT_lx
@@ -2118,7 +2125,6 @@ void ppc_maybe_interrupt(CPUPPCState *env)
static void p7_deliver_interrupt(CPUPPCState *env, int interrupt)
{
PowerPCCPU *cpu = env_archcpu(env);
- CPUState *cs = env_cpu(env);
switch (interrupt) {
case PPC_INTERRUPT_MCK: /* Machine check exception */
@@ -2162,14 +2168,14 @@ static void p7_deliver_interrupt(CPUPPCState *env, int interrupt)
assert(!env->resume_as_sreset);
break;
default:
- cpu_abort(cs, "Invalid PowerPC interrupt %d. Aborting\n", interrupt);
+ cpu_abort(env_cpu(env), "Invalid PowerPC interrupt %d. Aborting\n",
+ interrupt);
}
}
static void p8_deliver_interrupt(CPUPPCState *env, int interrupt)
{
PowerPCCPU *cpu = env_archcpu(env);
- CPUState *cs = env_cpu(env);
switch (interrupt) {
case PPC_INTERRUPT_MCK: /* Machine check exception */
@@ -2233,7 +2239,8 @@ static void p8_deliver_interrupt(CPUPPCState *env, int interrupt)
assert(!env->resume_as_sreset);
break;
default:
- cpu_abort(cs, "Invalid PowerPC interrupt %d. Aborting\n", interrupt);
+ cpu_abort(env_cpu(env), "Invalid PowerPC interrupt %d. Aborting\n",
+ interrupt);
}
}
@@ -2312,7 +2319,8 @@ static void p9_deliver_interrupt(CPUPPCState *env, int interrupt)
assert(!env->resume_as_sreset);
break;
default:
- cpu_abort(cs, "Invalid PowerPC interrupt %d. Aborting\n", interrupt);
+ cpu_abort(env_cpu(env), "Invalid PowerPC interrupt %d. Aborting\n",
+ interrupt);
}
}
#endif
@@ -2320,7 +2328,6 @@ static void p9_deliver_interrupt(CPUPPCState *env, int interrupt)
static void ppc_deliver_interrupt_generic(CPUPPCState *env, int interrupt)
{
PowerPCCPU *cpu = env_archcpu(env);
- CPUState *cs = env_cpu(env);
switch (interrupt) {
case PPC_INTERRUPT_RESET: /* External reset */
@@ -2417,7 +2424,8 @@ static void ppc_deliver_interrupt_generic(CPUPPCState *env, int interrupt)
assert(!env->resume_as_sreset);
break;
default:
- cpu_abort(cs, "Invalid PowerPC interrupt %d. Aborting\n", interrupt);
+ cpu_abort(env_cpu(env), "Invalid PowerPC interrupt %d. Aborting\n",
+ interrupt);
}
}
--
2.30.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer
2023-06-14 21:34 [PATCH v2 00/10] Misc clean ups to target/ppc exception handling BALATON Zoltan
` (3 preceding siblings ...)
2023-06-14 21:34 ` [PATCH v2 04/10] target/ppc: Use env_cpu for cpu_abort in excp_helper BALATON Zoltan
@ 2023-06-14 21:34 ` BALATON Zoltan
2023-06-15 3:32 ` Nicholas Piggin
2023-06-14 21:34 ` [PATCH v2 06/10] target/ppc: Readability improvements in exception handlers BALATON Zoltan
` (4 subsequent siblings)
9 siblings, 1 reply; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-14 21:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza, Nicholas Piggin
Changing the parameter of cpu_interrupt_exittb() from CPUState to env
allows removing some more local CPUState variables in callers.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
target/ppc/excp_helper.c | 9 +++------
target/ppc/helper_regs.c | 15 ++++++---------
target/ppc/helper_regs.h | 2 +-
3 files changed, 10 insertions(+), 16 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 122e2a6e41..49ed3e1825 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -419,7 +419,7 @@ static void powerpc_mcheck_checkstop(CPUPPCState *env)
"Entering checkstop state\n");
}
cs->halted = 1;
- cpu_interrupt_exittb(cs);
+ cpu_interrupt_exittb(env);
}
static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
@@ -2551,8 +2551,7 @@ void helper_store_msr(CPUPPCState *env, target_ulong val)
uint32_t excp = hreg_store_msr(env, val, 0);
if (excp != 0) {
- CPUState *cs = env_cpu(env);
- cpu_interrupt_exittb(cs);
+ cpu_interrupt_exittb(env);
raise_exception(env, excp);
}
}
@@ -2589,8 +2588,6 @@ void helper_pminsn(CPUPPCState *env, uint32_t insn)
static void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr)
{
- CPUState *cs = env_cpu(env);
-
/* MSR:POW cannot be set by any form of rfi */
msr &= ~(1ULL << MSR_POW);
@@ -2614,7 +2611,7 @@ static void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr)
* No need to raise an exception here, as rfi is always the last
* insn of a TB
*/
- cpu_interrupt_exittb(cs);
+ cpu_interrupt_exittb(env);
/* Reset the reservation */
env->reserve_addr = -1;
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index bc7e9d7eda..ffedd38985 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -237,7 +237,7 @@ void cpu_get_tb_cpu_state(CPUPPCState *env, target_ulong *pc,
}
#endif
-void cpu_interrupt_exittb(CPUState *cs)
+void cpu_interrupt_exittb(CPUPPCState *env)
{
/*
* We don't need to worry about translation blocks
@@ -245,18 +245,14 @@ void cpu_interrupt_exittb(CPUState *cs)
*/
if (tcg_enabled()) {
QEMU_IOTHREAD_LOCK_GUARD();
- cpu_interrupt(cs, CPU_INTERRUPT_EXITTB);
+ cpu_interrupt(env_cpu(env), CPU_INTERRUPT_EXITTB);
}
}
int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv)
{
- int excp;
-#if !defined(CONFIG_USER_ONLY)
- CPUState *cs = env_cpu(env);
-#endif
+ int excp = 0;
- excp = 0;
value &= env->msr_mask;
#if !defined(CONFIG_USER_ONLY)
/* Neither mtmsr nor guest state can alter HV */
@@ -265,12 +261,12 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv)
value |= env->msr & MSR_HVB;
}
if ((value ^ env->msr) & (R_MSR_IR_MASK | R_MSR_DR_MASK)) {
- cpu_interrupt_exittb(cs);
+ cpu_interrupt_exittb(env);
}
if ((env->mmu_model == POWERPC_MMU_BOOKE ||
env->mmu_model == POWERPC_MMU_BOOKE206) &&
((value ^ env->msr) & R_MSR_GS_MASK)) {
- cpu_interrupt_exittb(cs);
+ cpu_interrupt_exittb(env);
}
if (unlikely((env->flags & POWERPC_FLAG_TGPR) &&
((value ^ env->msr) & (1 << MSR_TGPR)))) {
@@ -301,6 +297,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv)
if (unlikely(FIELD_EX64(env->msr, MSR, POW))) {
if (!env->pending_interrupts && (*env->check_pow)(env)) {
+ CPUState *cs = env_cpu(env);
cs->halted = 1;
excp = EXCP_HALTED;
}
diff --git a/target/ppc/helper_regs.h b/target/ppc/helper_regs.h
index 8196c1346d..3e1606f293 100644
--- a/target/ppc/helper_regs.h
+++ b/target/ppc/helper_regs.h
@@ -23,7 +23,7 @@
void hreg_swap_gpr_tgpr(CPUPPCState *env);
void hreg_compute_hflags(CPUPPCState *env);
void hreg_update_pmu_hflags(CPUPPCState *env);
-void cpu_interrupt_exittb(CPUState *cs);
+void cpu_interrupt_exittb(CPUPPCState *env);
int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv);
#ifdef CONFIG_USER_ONLY
--
2.30.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 06/10] target/ppc: Readability improvements in exception handlers
2023-06-14 21:34 [PATCH v2 00/10] Misc clean ups to target/ppc exception handling BALATON Zoltan
` (4 preceding siblings ...)
2023-06-14 21:34 ` [PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer BALATON Zoltan
@ 2023-06-14 21:34 ` BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 07/10] target/ppd: Remove unused define BALATON Zoltan
` (3 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-14 21:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza, Nicholas Piggin
Improve readability by shortening some long comments, removing
comments that state the obvious and dropping some empty lines so they
don't distract when reading the code.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Acked-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/cpu.h | 1 +
target/ppc/excp_helper.c | 180 +++++++--------------------------------
2 files changed, 33 insertions(+), 148 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 0ee2adc105..d7acd65176 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -2739,6 +2739,7 @@ static inline bool ppc_has_spr(PowerPCCPU *cpu, int spr)
}
#if !defined(CONFIG_USER_ONLY)
+/* Sort out endianness of interrupt. Depends on the CPU, HV mode, etc. */
static inline bool ppc_interrupts_little_endian(PowerPCCPU *cpu, bool hv)
{
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 49ed3e1825..74113958b5 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -382,9 +382,8 @@ static void powerpc_set_excp_state(PowerPCCPU *cpu, target_ulong vector,
* We don't use hreg_store_msr here as already have treated any
* special case that could occur. Just store MSR and update hflags
*
- * Note: We *MUST* not use hreg_store_msr() as-is anyway because it
- * will prevent setting of the HV bit which some exceptions might need
- * to do.
+ * Note: We *MUST* not use hreg_store_msr() as-is anyway because it will
+ * prevent setting of the HV bit which some exceptions might need to do.
*/
env->nip = vector;
env->msr = msr;
@@ -426,25 +425,15 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
{
CPUPPCState *env = &cpu->env;
target_ulong msr, new_msr, vector;
- int srr0, srr1;
+ int srr0 = SPR_SRR0, srr1 = SPR_SRR1;
/* new srr1 value excluding must-be-zero bits */
msr = env->msr & ~0x783f0000ULL;
- /*
- * new interrupt handler msr preserves existing ME unless
- * explicitly overriden.
- */
+ /* new interrupt handler msr preserves ME unless explicitly overriden */
new_msr = env->msr & (((target_ulong)1 << MSR_ME));
- /* target registers */
- srr0 = SPR_SRR0;
- srr1 = SPR_SRR1;
-
- /*
- * Hypervisor emulation assistance interrupt only exists on server
- * arch 2.05 server or later.
- */
+ /* HV emu assistance interrupt only exists on server arch 2.05 or later */
if (excp == POWERPC_EXCP_HV_EMU) {
excp = POWERPC_EXCP_PROGRAM;
}
@@ -454,7 +443,6 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
cpu_abort(env_cpu(env),
"Raised an exception without defined vector %d\n", excp);
}
-
vector |= env->excp_prefix;
switch (excp) {
@@ -466,7 +454,6 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
-
srr0 = SPR_40x_SRR2;
srr1 = SPR_40x_SRR3;
break;
@@ -537,12 +524,8 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
break;
}
- /* Save PC */
env->spr[srr0] = env->nip;
-
- /* Save MSR */
env->spr[srr1] = msr;
-
powerpc_set_excp_state(cpu, vector, new_msr);
}
@@ -554,16 +537,10 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
/* new srr1 value excluding must-be-zero bits */
msr = env->msr & ~0x783f0000ULL;
- /*
- * new interrupt handler msr preserves existing ME unless
- * explicitly overriden
- */
+ /* new interrupt handler msr preserves ME unless explicitly overriden */
new_msr = env->msr & ((target_ulong)1 << MSR_ME);
- /*
- * Hypervisor emulation assistance interrupt only exists on server
- * arch 2.05 server or later.
- */
+ /* HV emu assistance interrupt only exists on server arch 2.05 or later */
if (excp == POWERPC_EXCP_HV_EMU) {
excp = POWERPC_EXCP_PROGRAM;
}
@@ -573,7 +550,6 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
cpu_abort(env_cpu(env),
"Raised an exception without defined vector %d\n", excp);
}
-
vector |= env->excp_prefix;
switch (excp) {
@@ -583,7 +559,6 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
-
break;
case POWERPC_EXCP_DSI: /* Data storage exception */
trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]);
@@ -611,11 +586,9 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
powerpc_reset_excp_state(cpu);
return;
}
-
/*
- * FP exceptions always have NIP pointing to the faulting
- * instruction, so always use store_next and claim we are
- * precise in the MSR.
+ * NIP always points to the faulting instruction for FP exceptions,
+ * so always use store_next and claim we are precise in the MSR.
*/
msr |= 0x00100000;
break;
@@ -691,20 +664,11 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
break;
}
- /*
- * Sort out endianness of interrupt, this differs depending on the
- * CPU, the HV mode, etc...
- */
if (ppc_interrupts_little_endian(cpu, !!(new_msr & MSR_HVB))) {
new_msr |= (target_ulong)1 << MSR_LE;
}
-
- /* Save PC */
env->spr[SPR_SRR0] = env->nip;
-
- /* Save MSR */
env->spr[SPR_SRR1] = msr;
-
powerpc_set_excp_state(cpu, vector, new_msr);
}
@@ -716,16 +680,10 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
/* new srr1 value excluding must-be-zero bits */
msr = env->msr & ~0x783f0000ULL;
- /*
- * new interrupt handler msr preserves existing ME unless
- * explicitly overriden
- */
+ /* new interrupt handler msr preserves ME unless explicitly overriden */
new_msr = env->msr & ((target_ulong)1 << MSR_ME);
- /*
- * Hypervisor emulation assistance interrupt only exists on server
- * arch 2.05 server or later.
- */
+ /* HV emu assistance interrupt only exists on server arch 2.05 or later */
if (excp == POWERPC_EXCP_HV_EMU) {
excp = POWERPC_EXCP_PROGRAM;
}
@@ -735,7 +693,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
cpu_abort(env_cpu(env),
"Raised an exception without defined vector %d\n", excp);
}
-
vector |= env->excp_prefix;
switch (excp) {
@@ -743,7 +700,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
-
break;
case POWERPC_EXCP_DSI: /* Data storage exception */
trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]);
@@ -771,11 +727,9 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
powerpc_reset_excp_state(cpu);
return;
}
-
/*
- * FP exceptions always have NIP pointing to the faulting
- * instruction, so always use store_next and claim we are
- * precise in the MSR.
+ * NIP always points to the faulting instruction for FP exceptions,
+ * so always use store_next and claim we are precise in the MSR.
*/
msr |= 0x00100000;
break;
@@ -843,12 +797,10 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
ppc_excp_debug_sw_tlb(env, excp);
-
msr |= env->crf[0] << 28;
msr |= env->error_code; /* key, D/I, S/L bits */
/* Set way using a LRU mechanism */
msr |= ((env->last_way + 1) & (env->nb_ways - 1)) << 17;
-
break;
case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
case POWERPC_EXCP_SMI: /* System management interrupt */
@@ -863,20 +815,11 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
break;
}
- /*
- * Sort out endianness of interrupt, this differs depending on the
- * CPU, the HV mode, etc...
- */
if (ppc_interrupts_little_endian(cpu, !!(new_msr & MSR_HVB))) {
new_msr |= (target_ulong)1 << MSR_LE;
}
-
- /* Save PC */
env->spr[SPR_SRR0] = env->nip;
-
- /* Save MSR */
env->spr[SPR_SRR1] = msr;
-
powerpc_set_excp_state(cpu, vector, new_msr);
}
@@ -888,16 +831,10 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
/* new srr1 value excluding must-be-zero bits */
msr = env->msr & ~0x783f0000ULL;
- /*
- * new interrupt handler msr preserves existing ME unless
- * explicitly overriden
- */
+ /* new interrupt handler msr preserves ME unless explicitly overriden */
new_msr = env->msr & ((target_ulong)1 << MSR_ME);
- /*
- * Hypervisor emulation assistance interrupt only exists on server
- * arch 2.05 server or later.
- */
+ /* HV emu assistance interrupt only exists on server arch 2.05 or later */
if (excp == POWERPC_EXCP_HV_EMU) {
excp = POWERPC_EXCP_PROGRAM;
}
@@ -907,7 +844,6 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
cpu_abort(env_cpu(env),
"Raised an exception without defined vector %d\n", excp);
}
-
vector |= env->excp_prefix;
switch (excp) {
@@ -915,7 +851,6 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
-
break;
case POWERPC_EXCP_DSI: /* Data storage exception */
trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]);
@@ -943,11 +878,9 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
powerpc_reset_excp_state(cpu);
return;
}
-
/*
- * FP exceptions always have NIP pointing to the faulting
- * instruction, so always use store_next and claim we are
- * precise in the MSR.
+ * NIP always points to the faulting instruction for FP exceptions,
+ * so always use store_next and claim we are precise in the MSR.
*/
msr |= 0x00100000;
break;
@@ -1027,20 +960,11 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
break;
}
- /*
- * Sort out endianness of interrupt, this differs depending on the
- * CPU, the HV mode, etc...
- */
if (ppc_interrupts_little_endian(cpu, !!(new_msr & MSR_HVB))) {
new_msr |= (target_ulong)1 << MSR_LE;
}
-
- /* Save PC */
env->spr[SPR_SRR0] = env->nip;
-
- /* Save MSR */
env->spr[SPR_SRR1] = msr;
-
powerpc_set_excp_state(cpu, vector, new_msr);
}
@@ -1048,24 +972,18 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
{
CPUPPCState *env = &cpu->env;
target_ulong msr, new_msr, vector;
- int srr0, srr1;
-
- msr = env->msr;
+ int srr0 = SPR_SRR0, srr1 = SPR_SRR1;
/*
- * new interrupt handler msr preserves existing ME unless
- * explicitly overriden
+ * Book E does not play games with certain bits of xSRR1 being MSR save
+ * bits and others being error status. xSRR1 is the old MSR, period.
*/
- new_msr = env->msr & ((target_ulong)1 << MSR_ME);
+ msr = env->msr;
- /* target registers */
- srr0 = SPR_SRR0;
- srr1 = SPR_SRR1;
+ /* new interrupt handler msr preserves ME unless explicitly overriden */
+ new_msr = env->msr & ((target_ulong)1 << MSR_ME);
- /*
- * Hypervisor emulation assistance interrupt only exists on server
- * arch 2.05 server or later.
- */
+ /* HV emu assistance interrupt only exists on server arch 2.05 or later */
if (excp == POWERPC_EXCP_HV_EMU) {
excp = POWERPC_EXCP_PROGRAM;
}
@@ -1085,7 +1003,6 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
cpu_abort(env_cpu(env),
"Raised an exception without defined vector %d\n", excp);
}
-
vector |= env->excp_prefix;
switch (excp) {
@@ -1129,11 +1046,9 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
powerpc_reset_excp_state(cpu);
return;
}
-
/*
- * FP exceptions always have NIP pointing to the faulting
- * instruction, so always use store_next and claim we are
- * precise in the MSR.
+ * NIP always points to the faulting instruction for FP exceptions,
+ * so always use store_next and claim we are precise in the MSR.
*/
msr |= 0x00100000;
env->spr[SPR_BOOKE_ESR] = ESR_FP;
@@ -1234,12 +1149,8 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
}
#endif
- /* Save PC */
env->spr[srr0] = env->nip;
-
- /* Save MSR */
env->spr[srr1] = msr;
-
powerpc_set_excp_state(cpu, vector, new_msr);
}
@@ -1286,21 +1197,17 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
{
CPUPPCState *env = &cpu->env;
target_ulong msr, new_msr, vector;
- int srr0, srr1, lev = -1;
+ int srr0 = SPR_SRR0, srr1 = SPR_SRR1, lev = -1;
/* new srr1 value excluding must-be-zero bits */
msr = env->msr & ~0x783f0000ULL;
/*
- * new interrupt handler msr preserves existing HV and ME unless
- * explicitly overriden
+ * new interrupt handler msr preserves HV and ME unless explicitly
+ * overriden
*/
new_msr = env->msr & (((target_ulong)1 << MSR_ME) | MSR_HVB);
- /* target registers */
- srr0 = SPR_SRR0;
- srr1 = SPR_SRR1;
-
/*
* check for special resume at 0x100 from doze/nap/sleep/winkle on
* P7/P8/P9
@@ -1325,7 +1232,6 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
cpu_abort(env_cpu(env),
"Raised an exception without defined vector %d\n", excp);
}
-
vector |= env->excp_prefix;
switch (excp) {
@@ -1338,10 +1244,8 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
*/
new_msr |= (target_ulong)MSR_HVB;
}
-
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
-
break;
case POWERPC_EXCP_DSI: /* Data storage exception */
trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]);
@@ -1354,23 +1258,17 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
{
bool lpes0;
- /*
- * LPES0 is only taken into consideration if we support HV
- * mode for this CPU.
- */
+ /* LPES0 is only taken into consideration if we support HV mode */
if (!env->has_hv_mode) {
break;
}
-
lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0);
-
if (!lpes0) {
new_msr |= (target_ulong)MSR_HVB;
new_msr |= env->msr & ((target_ulong)1 << MSR_RI);
srr0 = SPR_HSRR0;
srr1 = SPR_HSRR1;
}
-
break;
}
case POWERPC_EXCP_ALIGN: /* Alignment exception */
@@ -1393,11 +1291,9 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
powerpc_reset_excp_state(cpu);
return;
}
-
/*
- * FP exceptions always have NIP pointing to the faulting
- * instruction, so always use store_next and claim we are
- * precise in the MSR.
+ * NIP always points to the faulting instruction for FP exceptions,
+ * so always use store_next and claim we are precise in the MSR.
*/
msr |= 0x00100000;
break;
@@ -1539,21 +1435,13 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
break;
}
- /*
- * Sort out endianness of interrupt, this differs depending on the
- * CPU, the HV mode, etc...
- */
if (ppc_interrupts_little_endian(cpu, !!(new_msr & MSR_HVB))) {
new_msr |= (target_ulong)1 << MSR_LE;
}
-
new_msr |= (target_ulong)1 << MSR_SF;
if (excp != POWERPC_EXCP_SYSCALL_VECTORED) {
- /* Save PC */
env->spr[srr0] = env->nip;
-
- /* Save MSR */
env->spr[srr1] = msr;
}
@@ -1562,19 +1450,15 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp);
/* Deliver interrupt to L1 by returning from the H_ENTER_NESTED call */
vhc->deliver_hv_excp(cpu, excp);
-
powerpc_reset_excp_state(cpu);
-
} else {
/* Sanity check */
if (!(env->msr_mask & MSR_HVB) && srr0 == SPR_HSRR0) {
cpu_abort(env_cpu(env), "Trying to deliver HV exception (HSRR) %d "
"with no HV support\n", excp);
}
-
/* This can update new_msr and vector if AIL applies */
ppc_excp_apply_ail(cpu, excp, msr, &new_msr, &vector);
-
powerpc_set_excp_state(cpu, vector, new_msr);
}
}
--
2.30.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 07/10] target/ppd: Remove unused define
2023-06-14 21:34 [PATCH v2 00/10] Misc clean ups to target/ppc exception handling BALATON Zoltan
` (5 preceding siblings ...)
2023-06-14 21:34 ` [PATCH v2 06/10] target/ppc: Readability improvements in exception handlers BALATON Zoltan
@ 2023-06-14 21:34 ` BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 08/10] target/ppc: Fix gen_sc to use correct nip BALATON Zoltan
` (2 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-14 21:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza, Nicholas Piggin
Commit 7a3fe174b12d removed usage of POWERPC_SYSCALL_VECTORED, drop
the unused define as well.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/translate.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index b591f2e496..a32a9b8a5f 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -4416,7 +4416,6 @@ static void gen_hrfid(DisasContext *ctx)
#define POWERPC_SYSCALL POWERPC_EXCP_SYSCALL_USER
#else
#define POWERPC_SYSCALL POWERPC_EXCP_SYSCALL
-#define POWERPC_SYSCALL_VECTORED POWERPC_EXCP_SYSCALL_VECTORED
#endif
static void gen_sc(DisasContext *ctx)
{
--
2.30.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 08/10] target/ppc: Fix gen_sc to use correct nip
2023-06-14 21:34 [PATCH v2 00/10] Misc clean ups to target/ppc exception handling BALATON Zoltan
` (6 preceding siblings ...)
2023-06-14 21:34 ` [PATCH v2 07/10] target/ppd: Remove unused define BALATON Zoltan
@ 2023-06-14 21:34 ` BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 09/10] target/ppc: Simplify syscall exception handlers BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 10/10] target/ppc: Get CPUState in one step BALATON Zoltan
9 siblings, 0 replies; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-14 21:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza, Nicholas Piggin
Most exceptions are raised with nip pointing to the faulting
instruction but the sc instruction generating a syscall exception
leaves nip pointing to next instruction. Fix gen_sc to not use
gen_exception_err() which sets nip back but correctly set nip to
pc_next so we don't have to patch this in the exception handlers.
This changes the nip logged in dump_syscall and dump_hcall debug
functions but now this matches how nip would be on a real CPU.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
target/ppc/excp_helper.c | 39 ---------------------------------------
target/ppc/translate.c | 8 +++++---
2 files changed, 5 insertions(+), 42 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 74113958b5..1682b988ba 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -495,12 +495,6 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
break;
case POWERPC_EXCP_SYSCALL: /* System call exception */
dump_syscall(env);
-
- /*
- * We need to correct the NIP which in this case is supposed
- * to point to the next instruction
- */
- env->nip += 4;
break;
case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
trace_ppc_excp_print("FIT");
@@ -611,12 +605,6 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
break;
case POWERPC_EXCP_SYSCALL: /* System call exception */
dump_syscall(env);
-
- /*
- * We need to correct the NIP which in this case is supposed
- * to point to the next instruction
- */
- env->nip += 4;
break;
case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
case POWERPC_EXCP_DECR: /* Decrementer exception */
@@ -759,13 +747,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
} else {
dump_syscall(env);
}
-
- /*
- * We need to correct the NIP which in this case is supposed
- * to point to the next instruction
- */
- env->nip += 4;
-
/*
* The Virtual Open Firmware (VOF) relies on the 'sc 1'
* instruction to communicate with QEMU. The pegasos2 machine
@@ -910,13 +891,6 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
} else {
dump_syscall(env);
}
-
- /*
- * We need to correct the NIP which in this case is supposed
- * to point to the next instruction
- */
- env->nip += 4;
-
/*
* The Virtual Open Firmware (VOF) relies on the 'sc 1'
* instruction to communicate with QEMU. The pegasos2 machine
@@ -1075,12 +1049,6 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
break;
case POWERPC_EXCP_SYSCALL: /* System call exception */
dump_syscall(env);
-
- /*
- * We need to correct the NIP which in this case is supposed
- * to point to the next instruction
- */
- env->nip += 4;
break;
case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
@@ -1322,13 +1290,6 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
} else {
dump_syscall(env);
}
-
- /*
- * We need to correct the NIP which in this case is supposed
- * to point to the next instruction
- */
- env->nip += 4;
-
/* "PAPR mode" built-in hypercall emulation */
if (lev == 1 && books_vhyp_handles_hcall(cpu)) {
PPCVirtualHypervisorClass *vhc =
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index a32a9b8a5f..4260d3d66f 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -4419,10 +4419,12 @@ static void gen_hrfid(DisasContext *ctx)
#endif
static void gen_sc(DisasContext *ctx)
{
- uint32_t lev;
+ uint32_t lev = (ctx->opcode >> 5) & 0x7F;
- lev = (ctx->opcode >> 5) & 0x7F;
- gen_exception_err(ctx, POWERPC_SYSCALL, lev);
+ gen_update_nip(ctx, ctx->base.pc_next);
+ gen_helper_raise_exception_err(cpu_env, tcg_constant_i32(POWERPC_SYSCALL),
+ tcg_constant_i32(lev));
+ ctx->base.is_jmp = DISAS_NORETURN;
}
#if defined(TARGET_PPC64)
--
2.30.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 09/10] target/ppc: Simplify syscall exception handlers
2023-06-14 21:34 [PATCH v2 00/10] Misc clean ups to target/ppc exception handling BALATON Zoltan
` (7 preceding siblings ...)
2023-06-14 21:34 ` [PATCH v2 08/10] target/ppc: Fix gen_sc to use correct nip BALATON Zoltan
@ 2023-06-14 21:34 ` BALATON Zoltan
2023-06-15 3:34 ` Nicholas Piggin
2023-06-14 21:34 ` [PATCH v2 10/10] target/ppc: Get CPUState in one step BALATON Zoltan
9 siblings, 1 reply; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-14 21:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza, Nicholas Piggin
After previous changes the hypercall handling in 7xx and 74xx
exception handlers can be folded into one if statement to simpilfy
this code.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
target/ppc/excp_helper.c | 26 ++++++++++----------------
1 file changed, 10 insertions(+), 16 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 1682b988ba..662457f342 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -740,26 +740,23 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
break;
case POWERPC_EXCP_SYSCALL: /* System call exception */
{
- int lev = env->error_code;
+ PowerPCCPU *cpu = env_archcpu(env);
- if (lev == 1 && cpu->vhyp) {
- dump_hcall(env);
- } else {
- dump_syscall(env);
- }
/*
* The Virtual Open Firmware (VOF) relies on the 'sc 1'
* instruction to communicate with QEMU. The pegasos2 machine
* uses VOF and the 7xx CPUs, so although the 7xx don't have
* HV mode, we need to keep hypercall support.
*/
- if (lev == 1 && cpu->vhyp) {
+ if (unlikely(env->error_code == 1 && cpu->vhyp)) {
PPCVirtualHypervisorClass *vhc =
PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp);
+ dump_hcall(env);
vhc->hypercall(cpu->vhyp, cpu);
return;
+ } else {
+ dump_syscall(env);
}
-
break;
}
case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
@@ -884,26 +881,23 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
break;
case POWERPC_EXCP_SYSCALL: /* System call exception */
{
- int lev = env->error_code;
+ PowerPCCPU *cpu = env_archcpu(env);
- if (lev == 1 && cpu->vhyp) {
- dump_hcall(env);
- } else {
- dump_syscall(env);
- }
/*
* The Virtual Open Firmware (VOF) relies on the 'sc 1'
* instruction to communicate with QEMU. The pegasos2 machine
* uses VOF and the 74xx CPUs, so although the 74xx don't have
* HV mode, we need to keep hypercall support.
*/
- if (lev == 1 && cpu->vhyp) {
+ if (unlikely(env->error_code == 1 && cpu->vhyp)) {
PPCVirtualHypervisorClass *vhc =
PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp);
+ dump_hcall(env);
vhc->hypercall(cpu->vhyp, cpu);
return;
+ } else {
+ dump_syscall(env);
}
-
break;
}
case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
--
2.30.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 10/10] target/ppc: Get CPUState in one step
2023-06-14 21:34 [PATCH v2 00/10] Misc clean ups to target/ppc exception handling BALATON Zoltan
` (8 preceding siblings ...)
2023-06-14 21:34 ` [PATCH v2 09/10] target/ppc: Simplify syscall exception handlers BALATON Zoltan
@ 2023-06-14 21:34 ` BALATON Zoltan
2023-06-15 3:35 ` Nicholas Piggin
9 siblings, 1 reply; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-14 21:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza, Nicholas Piggin
We can get CPUState from env with env_cpu without going through
PowerPCCPU and casting that.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
target/ppc/excp_helper.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 662457f342..5edf06210f 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1506,8 +1506,8 @@ static int p7_interrupt_powersave(CPUPPCState *env)
static int p7_next_unmasked_interrupt(CPUPPCState *env)
{
- PowerPCCPU *cpu = env_archcpu(env);
- CPUState *cs = CPU(cpu);
+ CPUState *cs = env_cpu(env);
+
/* Ignore MSR[EE] when coming out of some power management states */
bool msr_ee = FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset;
@@ -1596,8 +1596,8 @@ static int p8_interrupt_powersave(CPUPPCState *env)
static int p8_next_unmasked_interrupt(CPUPPCState *env)
{
- PowerPCCPU *cpu = env_archcpu(env);
- CPUState *cs = CPU(cpu);
+ CPUState *cs = env_cpu(env);
+
/* Ignore MSR[EE] when coming out of some power management states */
bool msr_ee = FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset;
@@ -1717,8 +1717,8 @@ static int p9_interrupt_powersave(CPUPPCState *env)
static int p9_next_unmasked_interrupt(CPUPPCState *env)
{
- PowerPCCPU *cpu = env_archcpu(env);
- CPUState *cs = CPU(cpu);
+ CPUState *cs = env_cpu(env);
+
/* Ignore MSR[EE] when coming out of some power management states */
bool msr_ee = FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset;
@@ -2412,9 +2412,8 @@ void helper_scv(CPUPPCState *env, uint32_t lev)
void helper_pminsn(CPUPPCState *env, uint32_t insn)
{
- CPUState *cs;
+ CPUState *cs = env_cpu(env);
- cs = env_cpu(env);
cs->halted = 1;
/* Condition for waking up at 0x100 */
--
2.30.9
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 03/10] target/ppc: Move common check in exception handlers to a function
2023-06-14 21:34 ` [PATCH v2 03/10] target/ppc: Move common check in exception handlers to a function BALATON Zoltan
@ 2023-06-15 3:28 ` Nicholas Piggin
0 siblings, 0 replies; 21+ messages in thread
From: Nicholas Piggin @ 2023-06-15 3:28 UTC (permalink / raw)
To: BALATON Zoltan, qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza
On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
> All powerpc exception handlers share some code when handling machine
> check exceptions. Move this to a common function.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> target/ppc/excp_helper.c | 114 +++++++++------------------------------
> 1 file changed, 25 insertions(+), 89 deletions(-)
>
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 3783315fdb..79f5ca1034 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -403,6 +403,25 @@ static void powerpc_set_excp_state(PowerPCCPU *cpu, target_ulong vector,
> env->reserve_addr = -1;
> }
>
> +static void powerpc_mcheck_checkstop(CPUPPCState *env)
> +{
> + CPUState *cs = env_cpu(env);
> +
> + if (FIELD_EX64(env->msr, MSR, ME)) {
> + return;
> + }
> +
> + /* Machine check exception is not enabled. Enter checkstop state. */
> + fprintf(stderr, "Machine check while not allowed. "
> + "Entering checkstop state\n");
> + if (qemu_log_separate()) {
> + qemu_log("Machine check while not allowed. "
> + "Entering checkstop state\n");
> + }
> + cs->halted = 1;
> + cpu_interrupt_exittb(cs);
> +}
> +
> static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
> {
> CPUState *cs = CPU(cpu);
> @@ -445,21 +464,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
> srr1 = SPR_40x_SRR3;
> break;
> case POWERPC_EXCP_MCHECK: /* Machine check exception */
> - if (!FIELD_EX64(env->msr, MSR, ME)) {
> - /*
> - * Machine check exception is not enabled. Enter
> - * checkstop state.
> - */
> - fprintf(stderr, "Machine check while not allowed. "
> - "Entering checkstop state\n");
> - if (qemu_log_separate()) {
> - qemu_log("Machine check while not allowed. "
> - "Entering checkstop state\n");
> - }
> - cs->halted = 1;
> - cpu_interrupt_exittb(cs);
> - }
> -
> + powerpc_mcheck_checkstop(env);
> /* machine check exceptions don't have ME set */
> new_msr &= ~((target_ulong)1 << MSR_ME);
>
> @@ -576,21 +581,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
> case POWERPC_EXCP_CRITICAL: /* Critical input */
> break;
> case POWERPC_EXCP_MCHECK: /* Machine check exception */
> - if (!FIELD_EX64(env->msr, MSR, ME)) {
> - /*
> - * Machine check exception is not enabled. Enter
> - * checkstop state.
> - */
> - fprintf(stderr, "Machine check while not allowed. "
> - "Entering checkstop state\n");
> - if (qemu_log_separate()) {
> - qemu_log("Machine check while not allowed. "
> - "Entering checkstop state\n");
> - }
> - cs->halted = 1;
> - cpu_interrupt_exittb(cs);
> - }
> -
> + powerpc_mcheck_checkstop(env);
> /* machine check exceptions don't have ME set */
> new_msr &= ~((target_ulong)1 << MSR_ME);
>
> @@ -749,21 +740,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
>
> switch (excp) {
> case POWERPC_EXCP_MCHECK: /* Machine check exception */
> - if (!FIELD_EX64(env->msr, MSR, ME)) {
> - /*
> - * Machine check exception is not enabled. Enter
> - * checkstop state.
> - */
> - fprintf(stderr, "Machine check while not allowed. "
> - "Entering checkstop state\n");
> - if (qemu_log_separate()) {
> - qemu_log("Machine check while not allowed. "
> - "Entering checkstop state\n");
> - }
> - cs->halted = 1;
> - cpu_interrupt_exittb(cs);
> - }
> -
> + powerpc_mcheck_checkstop(env);
> /* machine check exceptions don't have ME set */
> new_msr &= ~((target_ulong)1 << MSR_ME);
>
> @@ -934,21 +911,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
>
> switch (excp) {
> case POWERPC_EXCP_MCHECK: /* Machine check exception */
> - if (!FIELD_EX64(env->msr, MSR, ME)) {
> - /*
> - * Machine check exception is not enabled. Enter
> - * checkstop state.
> - */
> - fprintf(stderr, "Machine check while not allowed. "
> - "Entering checkstop state\n");
> - if (qemu_log_separate()) {
> - qemu_log("Machine check while not allowed. "
> - "Entering checkstop state\n");
> - }
> - cs->halted = 1;
> - cpu_interrupt_exittb(cs);
> - }
> -
> + powerpc_mcheck_checkstop(env);
> /* machine check exceptions don't have ME set */
> new_msr &= ~((target_ulong)1 << MSR_ME);
>
> @@ -1129,21 +1092,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
> srr1 = SPR_BOOKE_CSRR1;
> break;
> case POWERPC_EXCP_MCHECK: /* Machine check exception */
> - if (!FIELD_EX64(env->msr, MSR, ME)) {
> - /*
> - * Machine check exception is not enabled. Enter
> - * checkstop state.
> - */
> - fprintf(stderr, "Machine check while not allowed. "
> - "Entering checkstop state\n");
> - if (qemu_log_separate()) {
> - qemu_log("Machine check while not allowed. "
> - "Entering checkstop state\n");
> - }
> - cs->halted = 1;
> - cpu_interrupt_exittb(cs);
> - }
> -
> + powerpc_mcheck_checkstop(env);
> /* machine check exceptions don't have ME set */
> new_msr &= ~((target_ulong)1 << MSR_ME);
>
> @@ -1376,20 +1325,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
>
> switch (excp) {
> case POWERPC_EXCP_MCHECK: /* Machine check exception */
> - if (!FIELD_EX64(env->msr, MSR, ME)) {
> - /*
> - * Machine check exception is not enabled. Enter
> - * checkstop state.
> - */
> - fprintf(stderr, "Machine check while not allowed. "
> - "Entering checkstop state\n");
> - if (qemu_log_separate()) {
> - qemu_log("Machine check while not allowed. "
> - "Entering checkstop state\n");
> - }
> - cs->halted = 1;
> - cpu_interrupt_exittb(cs);
> - }
> + powerpc_mcheck_checkstop(env);
> if (env->msr_mask & MSR_HVB) {
> /*
> * ISA specifies HV, but can be delivered to guest with HV
> --
> 2.30.9
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer
2023-06-14 21:34 ` [PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer BALATON Zoltan
@ 2023-06-15 3:32 ` Nicholas Piggin
2023-06-15 9:19 ` BALATON Zoltan
0 siblings, 1 reply; 21+ messages in thread
From: Nicholas Piggin @ 2023-06-15 3:32 UTC (permalink / raw)
To: BALATON Zoltan, qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza
On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
> Changing the parameter of cpu_interrupt_exittb() from CPUState to env
> allows removing some more local CPUState variables in callers.
I think it's more consistent to keep cs, which is same as
cpu_interrupt().
Thanks,
Nick
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 09/10] target/ppc: Simplify syscall exception handlers
2023-06-14 21:34 ` [PATCH v2 09/10] target/ppc: Simplify syscall exception handlers BALATON Zoltan
@ 2023-06-15 3:34 ` Nicholas Piggin
2023-06-15 9:25 ` BALATON Zoltan
0 siblings, 1 reply; 21+ messages in thread
From: Nicholas Piggin @ 2023-06-15 3:34 UTC (permalink / raw)
To: BALATON Zoltan, qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza
On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
> After previous changes the hypercall handling in 7xx and 74xx
> exception handlers can be folded into one if statement to simpilfy
> this code.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
> target/ppc/excp_helper.c | 26 ++++++++++----------------
> 1 file changed, 10 insertions(+), 16 deletions(-)
>
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 1682b988ba..662457f342 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -740,26 +740,23 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
> break;
> case POWERPC_EXCP_SYSCALL: /* System call exception */
> {
> - int lev = env->error_code;
I would still keep lev. Self documenting and consistent with books
handler.
> + PowerPCCPU *cpu = env_archcpu(env);
Is this necessary?
Thanks,
Nick
>
> - if (lev == 1 && cpu->vhyp) {
> - dump_hcall(env);
> - } else {
> - dump_syscall(env);
> - }
> /*
> * The Virtual Open Firmware (VOF) relies on the 'sc 1'
> * instruction to communicate with QEMU. The pegasos2 machine
> * uses VOF and the 7xx CPUs, so although the 7xx don't have
> * HV mode, we need to keep hypercall support.
> */
> - if (lev == 1 && cpu->vhyp) {
> + if (unlikely(env->error_code == 1 && cpu->vhyp)) {
> PPCVirtualHypervisorClass *vhc =
> PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp);
> + dump_hcall(env);
> vhc->hypercall(cpu->vhyp, cpu);
> return;
> + } else {
> + dump_syscall(env);
> }
> -
> break;
> }
> case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
> @@ -884,26 +881,23 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
> break;
> case POWERPC_EXCP_SYSCALL: /* System call exception */
> {
> - int lev = env->error_code;
> + PowerPCCPU *cpu = env_archcpu(env);
>
> - if (lev == 1 && cpu->vhyp) {
> - dump_hcall(env);
> - } else {
> - dump_syscall(env);
> - }
> /*
> * The Virtual Open Firmware (VOF) relies on the 'sc 1'
> * instruction to communicate with QEMU. The pegasos2 machine
> * uses VOF and the 74xx CPUs, so although the 74xx don't have
> * HV mode, we need to keep hypercall support.
> */
> - if (lev == 1 && cpu->vhyp) {
> + if (unlikely(env->error_code == 1 && cpu->vhyp)) {
> PPCVirtualHypervisorClass *vhc =
> PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp);
> + dump_hcall(env);
> vhc->hypercall(cpu->vhyp, cpu);
> return;
> + } else {
> + dump_syscall(env);
> }
> -
> break;
> }
> case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
> --
> 2.30.9
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 10/10] target/ppc: Get CPUState in one step
2023-06-14 21:34 ` [PATCH v2 10/10] target/ppc: Get CPUState in one step BALATON Zoltan
@ 2023-06-15 3:35 ` Nicholas Piggin
0 siblings, 0 replies; 21+ messages in thread
From: Nicholas Piggin @ 2023-06-15 3:35 UTC (permalink / raw)
To: BALATON Zoltan, qemu-devel, qemu-ppc
Cc: clg, Greg Kurz, Daniel Henrique Barboza
On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
> We can get CPUState from env with env_cpu without going through
> PowerPCCPU and casting that.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Acked-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> target/ppc/excp_helper.c | 15 +++++++--------
> 1 file changed, 7 insertions(+), 8 deletions(-)
>
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 662457f342..5edf06210f 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -1506,8 +1506,8 @@ static int p7_interrupt_powersave(CPUPPCState *env)
>
> static int p7_next_unmasked_interrupt(CPUPPCState *env)
> {
> - PowerPCCPU *cpu = env_archcpu(env);
> - CPUState *cs = CPU(cpu);
> + CPUState *cs = env_cpu(env);
> +
> /* Ignore MSR[EE] when coming out of some power management states */
> bool msr_ee = FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset;
>
> @@ -1596,8 +1596,8 @@ static int p8_interrupt_powersave(CPUPPCState *env)
>
> static int p8_next_unmasked_interrupt(CPUPPCState *env)
> {
> - PowerPCCPU *cpu = env_archcpu(env);
> - CPUState *cs = CPU(cpu);
> + CPUState *cs = env_cpu(env);
> +
> /* Ignore MSR[EE] when coming out of some power management states */
> bool msr_ee = FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset;
>
> @@ -1717,8 +1717,8 @@ static int p9_interrupt_powersave(CPUPPCState *env)
>
> static int p9_next_unmasked_interrupt(CPUPPCState *env)
> {
> - PowerPCCPU *cpu = env_archcpu(env);
> - CPUState *cs = CPU(cpu);
> + CPUState *cs = env_cpu(env);
> +
> /* Ignore MSR[EE] when coming out of some power management states */
> bool msr_ee = FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset;
>
> @@ -2412,9 +2412,8 @@ void helper_scv(CPUPPCState *env, uint32_t lev)
>
> void helper_pminsn(CPUPPCState *env, uint32_t insn)
> {
> - CPUState *cs;
> + CPUState *cs = env_cpu(env);
>
> - cs = env_cpu(env);
> cs->halted = 1;
>
> /* Condition for waking up at 0x100 */
> --
> 2.30.9
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer
2023-06-15 3:32 ` Nicholas Piggin
@ 2023-06-15 9:19 ` BALATON Zoltan
2023-06-15 11:40 ` Nicholas Piggin
0 siblings, 1 reply; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-15 9:19 UTC (permalink / raw)
To: Nicholas Piggin
Cc: qemu-devel, qemu-ppc, clg, Greg Kurz, Daniel Henrique Barboza
On Thu, 15 Jun 2023, Nicholas Piggin wrote:
> On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
>> Changing the parameter of cpu_interrupt_exittb() from CPUState to env
>> allows removing some more local CPUState variables in callers.
>
> I think it's more consistent to keep cs, which is same as
> cpu_interrupt().
But with this patch it's more consistent with the other functions devlared
in helper_regs.h and gets rid of the #ifdef in hreg_store_msr() so I'd
still like to keep this patch. Callers already have env so it should not
matter.
Regards,
BALATON Zoltan
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 09/10] target/ppc: Simplify syscall exception handlers
2023-06-15 3:34 ` Nicholas Piggin
@ 2023-06-15 9:25 ` BALATON Zoltan
2023-06-15 11:46 ` Nicholas Piggin
0 siblings, 1 reply; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-15 9:25 UTC (permalink / raw)
To: Nicholas Piggin
Cc: qemu-devel, qemu-ppc, clg, Greg Kurz, Daniel Henrique Barboza
On Thu, 15 Jun 2023, Nicholas Piggin wrote:
> On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
>> After previous changes the hypercall handling in 7xx and 74xx
>> exception handlers can be folded into one if statement to simpilfy
>> this code.
>>
>> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
>> ---
>> target/ppc/excp_helper.c | 26 ++++++++++----------------
>> 1 file changed, 10 insertions(+), 16 deletions(-)
>>
>> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
>> index 1682b988ba..662457f342 100644
>> --- a/target/ppc/excp_helper.c
>> +++ b/target/ppc/excp_helper.c
>> @@ -740,26 +740,23 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
>> break;
>> case POWERPC_EXCP_SYSCALL: /* System call exception */
>> {
>> - int lev = env->error_code;
>
> I would still keep lev. Self documenting and consistent with books
> handler.
lev is still there in the books version, but probably not really needed in
these 7xx versions which does not really have level parameter. This hack
should likely go away and replaced with something else on the long run as
this won't work with KVM but that needs some support from VOF or compiling
a different version for pegasos2 which wasn't considered so far. I can add
the local back if you really insist but I don't think it really makes much
sense in these cases for 7xx and 74xx.
>> + PowerPCCPU *cpu = env_archcpu(env);
>
> Is this necessary?
Yes, for cpu->vhyp below.
Regards,
BALATON Zoltan
> Thanks,
> Nick
>
>>
>> - if (lev == 1 && cpu->vhyp) {
>> - dump_hcall(env);
>> - } else {
>> - dump_syscall(env);
>> - }
>> /*
>> * The Virtual Open Firmware (VOF) relies on the 'sc 1'
>> * instruction to communicate with QEMU. The pegasos2 machine
>> * uses VOF and the 7xx CPUs, so although the 7xx don't have
>> * HV mode, we need to keep hypercall support.
>> */
>> - if (lev == 1 && cpu->vhyp) {
>> + if (unlikely(env->error_code == 1 && cpu->vhyp)) {
>> PPCVirtualHypervisorClass *vhc =
>> PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp);
>> + dump_hcall(env);
>> vhc->hypercall(cpu->vhyp, cpu);
>> return;
>> + } else {
>> + dump_syscall(env);
>> }
>> -
>> break;
>> }
>> case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
>> @@ -884,26 +881,23 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
>> break;
>> case POWERPC_EXCP_SYSCALL: /* System call exception */
>> {
>> - int lev = env->error_code;
>> + PowerPCCPU *cpu = env_archcpu(env);
>>
>> - if (lev == 1 && cpu->vhyp) {
>> - dump_hcall(env);
>> - } else {
>> - dump_syscall(env);
>> - }
>> /*
>> * The Virtual Open Firmware (VOF) relies on the 'sc 1'
>> * instruction to communicate with QEMU. The pegasos2 machine
>> * uses VOF and the 74xx CPUs, so although the 74xx don't have
>> * HV mode, we need to keep hypercall support.
>> */
>> - if (lev == 1 && cpu->vhyp) {
>> + if (unlikely(env->error_code == 1 && cpu->vhyp)) {
>> PPCVirtualHypervisorClass *vhc =
>> PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp);
>> + dump_hcall(env);
>> vhc->hypercall(cpu->vhyp, cpu);
>> return;
>> + } else {
>> + dump_syscall(env);
>> }
>> -
>> break;
>> }
>> case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
>> --
>> 2.30.9
>
>
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer
2023-06-15 9:19 ` BALATON Zoltan
@ 2023-06-15 11:40 ` Nicholas Piggin
2023-06-15 23:00 ` BALATON Zoltan
0 siblings, 1 reply; 21+ messages in thread
From: Nicholas Piggin @ 2023-06-15 11:40 UTC (permalink / raw)
To: BALATON Zoltan
Cc: qemu-devel, qemu-ppc, clg, Greg Kurz, Daniel Henrique Barboza
On Thu Jun 15, 2023 at 7:19 PM AEST, BALATON Zoltan wrote:
> On Thu, 15 Jun 2023, Nicholas Piggin wrote:
> > On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
> >> Changing the parameter of cpu_interrupt_exittb() from CPUState to env
> >> allows removing some more local CPUState variables in callers.
> >
> > I think it's more consistent to keep cs, which is same as
> > cpu_interrupt().
>
> But with this patch it's more consistent with the other functions devlared
> in helper_regs.h and gets rid of the #ifdef in hreg_store_msr() so I'd
> still like to keep this patch. Callers already have env so it should not
> matter.
Being consistent with functions of the same file is not important or
really makes sense. It's important to be consistent with functions
of similar type. cpu_interrupt_exittb() is a helper to call
cpu_interrupt() so makes sense to be similar. At best it seems like
pointless churn.
Thanks,
Nick
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 09/10] target/ppc: Simplify syscall exception handlers
2023-06-15 9:25 ` BALATON Zoltan
@ 2023-06-15 11:46 ` Nicholas Piggin
2023-06-15 23:02 ` BALATON Zoltan
0 siblings, 1 reply; 21+ messages in thread
From: Nicholas Piggin @ 2023-06-15 11:46 UTC (permalink / raw)
To: BALATON Zoltan
Cc: qemu-devel, qemu-ppc, clg, Greg Kurz, Daniel Henrique Barboza
On Thu Jun 15, 2023 at 7:25 PM AEST, BALATON Zoltan wrote:
> On Thu, 15 Jun 2023, Nicholas Piggin wrote:
> > On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
> >> After previous changes the hypercall handling in 7xx and 74xx
> >> exception handlers can be folded into one if statement to simpilfy
> >> this code.
> >>
> >> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> >> ---
> >> target/ppc/excp_helper.c | 26 ++++++++++----------------
> >> 1 file changed, 10 insertions(+), 16 deletions(-)
> >>
> >> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> >> index 1682b988ba..662457f342 100644
> >> --- a/target/ppc/excp_helper.c
> >> +++ b/target/ppc/excp_helper.c
> >> @@ -740,26 +740,23 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
> >> break;
> >> case POWERPC_EXCP_SYSCALL: /* System call exception */
> >> {
> >> - int lev = env->error_code;
> >
> > I would still keep lev. Self documenting and consistent with books
> > handler.
>
> lev is still there in the books version, but probably not really needed in
> these 7xx versions which does not really have level parameter. This hack
> should likely go away and replaced with something else on the long run as
> this won't work with KVM but that needs some support from VOF or compiling
> a different version for pegasos2 which wasn't considered so far. I can add
> the local back if you really insist but I don't think it really makes much
> sense in these cases for 7xx and 74xx.
It is using the sc 1 instruction which does have a lev field though? The
hardware might not have such a thing but what is being emulatd here
does, so I think lev makes sense.
Removing this would be fine, but while you have it yes please just leave
it as lev.
> >> + PowerPCCPU *cpu = env_archcpu(env);
> >
> > Is this necessary?
>
> Yes, for cpu->vhyp below.
cpu->vhyp was there before your patch...
Thanks,
Nick
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer
2023-06-15 11:40 ` Nicholas Piggin
@ 2023-06-15 23:00 ` BALATON Zoltan
0 siblings, 0 replies; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-15 23:00 UTC (permalink / raw)
To: Nicholas Piggin
Cc: qemu-devel, qemu-ppc, clg, Greg Kurz, Daniel Henrique Barboza
On Thu, 15 Jun 2023, Nicholas Piggin wrote:
> On Thu Jun 15, 2023 at 7:19 PM AEST, BALATON Zoltan wrote:
>> On Thu, 15 Jun 2023, Nicholas Piggin wrote:
>>> On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
>>>> Changing the parameter of cpu_interrupt_exittb() from CPUState to env
>>>> allows removing some more local CPUState variables in callers.
>>>
>>> I think it's more consistent to keep cs, which is same as
>>> cpu_interrupt().
>>
>> But with this patch it's more consistent with the other functions devlared
>> in helper_regs.h and gets rid of the #ifdef in hreg_store_msr() so I'd
>> still like to keep this patch. Callers already have env so it should not
>> matter.
>
> Being consistent with functions of the same file is not important or
> really makes sense. It's important to be consistent with functions
> of similar type. cpu_interrupt_exittb() is a helper to call
> cpu_interrupt() so makes sense to be similar. At best it seems like
> pointless churn.
OK I've revised it in v3 and dropped most of this patch.
Regards,
BALATON Zoltan
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 09/10] target/ppc: Simplify syscall exception handlers
2023-06-15 11:46 ` Nicholas Piggin
@ 2023-06-15 23:02 ` BALATON Zoltan
0 siblings, 0 replies; 21+ messages in thread
From: BALATON Zoltan @ 2023-06-15 23:02 UTC (permalink / raw)
To: Nicholas Piggin
Cc: qemu-devel, qemu-ppc, clg, Greg Kurz, Daniel Henrique Barboza
On Thu, 15 Jun 2023, Nicholas Piggin wrote:
> On Thu Jun 15, 2023 at 7:25 PM AEST, BALATON Zoltan wrote:
>> On Thu, 15 Jun 2023, Nicholas Piggin wrote:
>>> On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote:
>>>> After previous changes the hypercall handling in 7xx and 74xx
>>>> exception handlers can be folded into one if statement to simpilfy
>>>> this code.
>>>>
>>>> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
>>>> ---
>>>> target/ppc/excp_helper.c | 26 ++++++++++----------------
>>>> 1 file changed, 10 insertions(+), 16 deletions(-)
>>>>
>>>> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
>>>> index 1682b988ba..662457f342 100644
>>>> --- a/target/ppc/excp_helper.c
>>>> +++ b/target/ppc/excp_helper.c
>>>> @@ -740,26 +740,23 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
>>>> break;
>>>> case POWERPC_EXCP_SYSCALL: /* System call exception */
>>>> {
>>>> - int lev = env->error_code;
>>>
>>> I would still keep lev. Self documenting and consistent with books
>>> handler.
>>
>> lev is still there in the books version, but probably not really needed in
>> these 7xx versions which does not really have level parameter. This hack
>> should likely go away and replaced with something else on the long run as
>> this won't work with KVM but that needs some support from VOF or compiling
>> a different version for pegasos2 which wasn't considered so far. I can add
>> the local back if you really insist but I don't think it really makes much
>> sense in these cases for 7xx and 74xx.
>
> It is using the sc 1 instruction which does have a lev field though? The
> hardware might not have such a thing but what is being emulatd here
> does, so I think lev makes sense.
>
> Removing this would be fine, but while you have it yes please just leave
> it as lev.
>
>>>> + PowerPCCPU *cpu = env_archcpu(env);
>>>
>>> Is this necessary?
>>
>> Yes, for cpu->vhyp below.
>
> cpu->vhyp was there before your patch...
Originally I had another patch that chnaged these functions to take an env
pointer and since cpu is only needed here this was declared local to where
it's used. Now that we don't have those patches that change more functions
parameters to env then it's indeed not needed. I've added back lev in v3
instead.
Regards,
BALATON Zoltan
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2023-06-15 23:03 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-14 21:34 [PATCH v2 00/10] Misc clean ups to target/ppc exception handling BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 01/10] target/ppc: Remove some superfluous parentheses BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 02/10] target/ppc: Remove unneeded parameter from powerpc_reset_wakeup() BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 03/10] target/ppc: Move common check in exception handlers to a function BALATON Zoltan
2023-06-15 3:28 ` Nicholas Piggin
2023-06-14 21:34 ` [PATCH v2 04/10] target/ppc: Use env_cpu for cpu_abort in excp_helper BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer BALATON Zoltan
2023-06-15 3:32 ` Nicholas Piggin
2023-06-15 9:19 ` BALATON Zoltan
2023-06-15 11:40 ` Nicholas Piggin
2023-06-15 23:00 ` BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 06/10] target/ppc: Readability improvements in exception handlers BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 07/10] target/ppd: Remove unused define BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 08/10] target/ppc: Fix gen_sc to use correct nip BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 09/10] target/ppc: Simplify syscall exception handlers BALATON Zoltan
2023-06-15 3:34 ` Nicholas Piggin
2023-06-15 9:25 ` BALATON Zoltan
2023-06-15 11:46 ` Nicholas Piggin
2023-06-15 23:02 ` BALATON Zoltan
2023-06-14 21:34 ` [PATCH v2 10/10] target/ppc: Get CPUState in one step BALATON Zoltan
2023-06-15 3:35 ` Nicholas Piggin
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