* [PATCH] drm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in OD
@ 2018-06-12 14:54 Kenneth Feng
[not found] ` <1528815253-14142-1-git-send-email-kenneth.feng-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Kenneth Feng @ 2018-06-12 14:54 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Kenneth Feng
Fix the issue that SCLK&MCLK can't be set higher than dpm7 when
OD is enabled in SMU7.
Change-Id: If8249795739e29a063154cffce693b3c77cca151
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index b763c54..11e1762 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -3762,7 +3762,10 @@ static int smu7_generate_dpm_level_enable_mask(
const struct smu7_power_state *smu7_ps =
cast_const_phw_smu7_power_state(states->pnew_state);
- result = smu7_trim_dpm_states(hwmgr, smu7_ps);
+ /*skip the trim if od is enabled*/
+ if (!hwmgr->od_enabled)
+ result = smu7_trim_dpm_states(hwmgr, smu7_ps);
+
if (result)
return result;
--
2.7.4
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in OD
[not found] ` <1528815253-14142-1-git-send-email-kenneth.feng-5C7GfCeVMHo@public.gmane.org>
@ 2018-06-12 15:01 ` Zhu, Rex
[not found] ` <CY4PR12MB1687467F513BB24796B1FC63FB7F0-rpdhrqHFk06Y0SjTqZDccQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Zhu, Rex @ 2018-06-12 15:01 UTC (permalink / raw)
To: Feng, Kenneth, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
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Acked-by: Rex Zhu<rezhu-5C7GfCeVMHo@public.gmane.org>
Best Regards
Rex
________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Kenneth Feng <kenneth.feng-5C7GfCeVMHo@public.gmane.org>
Sent: Tuesday, June 12, 2018 10:54 PM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Feng, Kenneth
Subject: [PATCH] drm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in OD
Fix the issue that SCLK&MCLK can't be set higher than dpm7 when
OD is enabled in SMU7.
Change-Id: If8249795739e29a063154cffce693b3c77cca151
Signed-off-by: Kenneth Feng <kenneth.feng-5C7GfCeVMHo@public.gmane.org>
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index b763c54..11e1762 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -3762,7 +3762,10 @@ static int smu7_generate_dpm_level_enable_mask(
const struct smu7_power_state *smu7_ps =
cast_const_phw_smu7_power_state(states->pnew_state);
- result = smu7_trim_dpm_states(hwmgr, smu7_ps);
+ /*skip the trim if od is enabled*/
+ if (!hwmgr->od_enabled)
+ result = smu7_trim_dpm_states(hwmgr, smu7_ps);
+
if (result)
return result;
--
2.7.4
_______________________________________________
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in OD
[not found] ` <CY4PR12MB1687467F513BB24796B1FC63FB7F0-rpdhrqHFk06Y0SjTqZDccQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2018-06-12 20:29 ` Deucher, Alexander
0 siblings, 0 replies; 3+ messages in thread
From: Deucher, Alexander @ 2018-06-12 20:29 UTC (permalink / raw)
To: Zhu, Rex, Feng, Kenneth, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
[-- Attachment #1.1: Type: text/plain, Size: 2461 bytes --]
Acked-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Zhu, Rex <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
Sent: Tuesday, June 12, 2018 11:01:46 AM
To: Feng, Kenneth; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH] drm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in OD
Acked-by: Rex Zhu<rezhu-5C7GfCeVMHo@public.gmane.org>
Best Regards
Rex
________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Kenneth Feng <kenneth.feng-5C7GfCeVMHo@public.gmane.org>
Sent: Tuesday, June 12, 2018 10:54 PM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Feng, Kenneth
Subject: [PATCH] drm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in OD
Fix the issue that SCLK&MCLK can't be set higher than dpm7 when
OD is enabled in SMU7.
Change-Id: If8249795739e29a063154cffce693b3c77cca151
Signed-off-by: Kenneth Feng <kenneth.feng-5C7GfCeVMHo@public.gmane.org>
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index b763c54..11e1762 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -3762,7 +3762,10 @@ static int smu7_generate_dpm_level_enable_mask(
const struct smu7_power_state *smu7_ps =
cast_const_phw_smu7_power_state(states->pnew_state);
- result = smu7_trim_dpm_states(hwmgr, smu7_ps);
+ /*skip the trim if od is enabled*/
+ if (!hwmgr->od_enabled)
+ result = smu7_trim_dpm_states(hwmgr, smu7_ps);
+
if (result)
return result;
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
amd-gfx Info Page - freedesktop.org<https://lists.freedesktop.org/mailman/listinfo/amd-gfx>
lists.freedesktop.org
Subscribing to amd-gfx: Subscribe to amd-gfx by filling out the following form. Use of all freedesktop.org lists is subject to our Code of Conduct.
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_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 3+ messages in thread
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2018-06-12 14:54 [PATCH] drm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in OD Kenneth Feng
[not found] ` <1528815253-14142-1-git-send-email-kenneth.feng-5C7GfCeVMHo@public.gmane.org>
2018-06-12 15:01 ` Zhu, Rex
[not found] ` <CY4PR12MB1687467F513BB24796B1FC63FB7F0-rpdhrqHFk06Y0SjTqZDccQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-06-12 20:29 ` Deucher, Alexander
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