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From: "H. Nikolaus Schaller" <hns@goldelico.com>
To: Paul Boddie <paul@boddie.org.uk>
Cc: Paul Cercueil <paul@crapouillou.net>,
	Mark Rutland <mark.rutland@arm.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Neil Armstrong <narmstrong@baylibre.com>,
	David Airlie <airlied@linux.ie>,
	dri-devel <dri-devel@lists.freedesktop.org>,
	linux-mips <linux-mips@vger.kernel.org>,
	Andrzej Hajda <a.hajda@samsung.com>,
	Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Sam Ravnborg <sam@ravnborg.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Harry Wentland <harry.wentland@amd.com>,
	OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS 
	<devicetree@vger.kernel.org>, Kees Cook <keescook@chromium.org>,
	Jonas Karlman <jonas@kwiboo.se>, Mark Brown <broonie@kernel.org>,
	Maxime Ripard <maxime@cerno.tech>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Robert Foss <robert.foss@linaro.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>, Daniel Vetter <daniel@ffwll.ch>,
	Hans Verkuil <hverkuil-cisco@xs4all.nl>,
	Discussions about the Letux Kernel 
	<letux-kernel@openphoenux.org>
Subject: Re: [PATCH v5 2/7] drm/ingenic: Add support for JZ4780 and HDMI output
Date: Wed, 19 Jan 2022 07:40:22 +0100	[thread overview]
Message-ID: <D0989ACA-F6DB-4E16-8D95-5ACBAD90AACD@goldelico.com> (raw)
In-Reply-To: <13356060.GkHXLIg068@jason>

Hi Paul,

> Am 18.01.2022 um 23:59 schrieb Paul Boddie <paul@boddie.org.uk>:
> 
> On Tuesday, 18 January 2022 17:58:58 CET Paul Cercueil wrote:
>> 
>> Not at all. If the clock is disabled, the LCD controller is disabled,
>> so all the registers read zero, this makes sense. You can only read the
>> registers when the clock is enabled. On some SoCs, reading disabled
>> registers can even cause a complete lockup.
> 
> My concern was that something might be accessing the registers before the 
> clock had been enabled. It seems unlikely, given that the clock is enabled in 
> the bind function, and I would have thought that nothing would invoke the 
> different driver operations ("funcs") until bind has been called, nor should 
> anything called from within bind itself be accessing registers.
> 
>> Why is this JZ_LCD_OSDC_ALPHAEN bit needed now? I remember it working
>> fine last time I tried, and now I indeed get a black screen unless this
>> bit is set. The PM doesn't make it obvious that the bit is required,
>> but that wouldn't be surprising.
> 
> It isn't actually needed. If the DMA descriptors are set up appropriately, the 
> OSD alpha bit seems to be set as a consequence. In my non-Linux testing 
> environment I don't even set any OSD registers explicitly, but the OSD alpha 
> and enable flags become set when the display is active.

Is it set by DMA descriptors or by explicit code?

We did have an explicit setting of JZ_LCD_OSDC_ALPHAEN

https://www.spinics.net/lists/devicetree/msg438447.html

but that was postponed for further discussion. And now if we
add it (from basic functionality) back, it is fine again.

BR,
Nikolaus

WARNING: multiple messages have this Message-ID (diff)
From: "H. Nikolaus Schaller" <hns@goldelico.com>
To: Paul Boddie <paul@boddie.org.uk>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Neil Armstrong <narmstrong@baylibre.com>,
	David Airlie <airlied@linux.ie>,
	dri-devel <dri-devel@lists.freedesktop.org>,
	linux-mips <linux-mips@vger.kernel.org>,
	Paul Cercueil <paul@crapouillou.net>,
	Andrzej Hajda <a.hajda@samsung.com>,
	Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Sam Ravnborg <sam@ravnborg.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
	<devicetree@vger.kernel.org>, Kees Cook <keescook@chromium.org>,
	Jonas Karlman <jonas@kwiboo.se>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	Maxime Ripard <maxime@cerno.tech>,
	Discussions about the Letux Kernel <letux-kernel@openphoenux.org>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Robert Foss <robert.foss@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Hans Verkuil <hverkuil-cisco@xs4all.nl>
Subject: Re: [PATCH v5 2/7] drm/ingenic: Add support for JZ4780 and HDMI output
Date: Wed, 19 Jan 2022 07:40:22 +0100	[thread overview]
Message-ID: <D0989ACA-F6DB-4E16-8D95-5ACBAD90AACD@goldelico.com> (raw)
In-Reply-To: <13356060.GkHXLIg068@jason>

Hi Paul,

> Am 18.01.2022 um 23:59 schrieb Paul Boddie <paul@boddie.org.uk>:
> 
> On Tuesday, 18 January 2022 17:58:58 CET Paul Cercueil wrote:
>> 
>> Not at all. If the clock is disabled, the LCD controller is disabled,
>> so all the registers read zero, this makes sense. You can only read the
>> registers when the clock is enabled. On some SoCs, reading disabled
>> registers can even cause a complete lockup.
> 
> My concern was that something might be accessing the registers before the 
> clock had been enabled. It seems unlikely, given that the clock is enabled in 
> the bind function, and I would have thought that nothing would invoke the 
> different driver operations ("funcs") until bind has been called, nor should 
> anything called from within bind itself be accessing registers.
> 
>> Why is this JZ_LCD_OSDC_ALPHAEN bit needed now? I remember it working
>> fine last time I tried, and now I indeed get a black screen unless this
>> bit is set. The PM doesn't make it obvious that the bit is required,
>> but that wouldn't be surprising.
> 
> It isn't actually needed. If the DMA descriptors are set up appropriately, the 
> OSD alpha bit seems to be set as a consequence. In my non-Linux testing 
> environment I don't even set any OSD registers explicitly, but the OSD alpha 
> and enable flags become set when the display is active.

Is it set by DMA descriptors or by explicit code?

We did have an explicit setting of JZ_LCD_OSDC_ALPHAEN

https://www.spinics.net/lists/devicetree/msg438447.html

but that was postponed for further discussion. And now if we
add it (from basic functionality) back, it is fine again.

BR,
Nikolaus

  reply	other threads:[~2022-01-19  6:42 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-05 12:29 [PATCH v5 0/7] MIPS: JZ4780 and CI20 HDMI H. Nikolaus Schaller
2021-10-05 12:29 ` [PATCH v5 1/7] drm/ingenic: Fix drm_init error path if IPU was registered H. Nikolaus Schaller
2021-10-05 12:29 ` [PATCH v5 2/7] drm/ingenic: Add support for JZ4780 and HDMI output H. Nikolaus Schaller
2021-10-05 20:22   ` Paul Cercueil
2021-11-07 13:41     ` H. Nikolaus Schaller
2021-11-07 19:01       ` Paul Cercueil
2021-11-07 19:01         ` Paul Cercueil
2021-11-07 20:25         ` H. Nikolaus Schaller
2021-11-07 20:25           ` H. Nikolaus Schaller
2021-11-08  9:37           ` Paul Cercueil
2021-11-08  9:37             ` Paul Cercueil
2021-11-08 10:52             ` H. Nikolaus Schaller
2021-11-08 10:52               ` H. Nikolaus Schaller
2021-11-08 12:20               ` Paul Cercueil
2021-11-08 12:20                 ` Paul Cercueil
2021-11-08 15:29                 ` H. Nikolaus Schaller
2021-11-08 15:29                   ` H. Nikolaus Schaller
2021-11-08 16:30                   ` Paul Cercueil
2021-11-08 16:30                     ` Paul Cercueil
2021-11-08 17:22                     ` H. Nikolaus Schaller
2021-11-08 17:22                       ` H. Nikolaus Schaller
2021-11-08 17:49                       ` Paul Cercueil
2021-11-08 17:49                         ` Paul Cercueil
2021-11-08 18:33                         ` H. Nikolaus Schaller
2021-11-08 18:33                           ` H. Nikolaus Schaller
2021-11-08 18:53                           ` Paul Cercueil
2021-11-08 18:53                             ` Paul Cercueil
2021-12-22 14:03             ` H. Nikolaus Schaller
2021-12-22 14:03               ` H. Nikolaus Schaller
2022-01-18 14:50               ` H. Nikolaus Schaller
2022-01-18 14:50                 ` H. Nikolaus Schaller
2022-01-18 16:58                 ` Paul Cercueil
2022-01-18 16:58                   ` Paul Cercueil
2022-01-18 17:14                   ` H. Nikolaus Schaller
2022-01-18 17:14                     ` H. Nikolaus Schaller
2022-01-18 22:59                   ` Paul Boddie
2022-01-19  6:40                     ` H. Nikolaus Schaller [this message]
2022-01-19  6:40                       ` H. Nikolaus Schaller
2022-01-19 20:04                       ` Paul Boddie
2022-01-19 20:04                         ` Paul Boddie
2021-10-05 12:29 ` [PATCH v5 3/7] dt-bindings: display: Add ingenic,jz4780-dw-hdmi DT Schema H. Nikolaus Schaller
2021-10-05 12:29   ` [PATCH v5 3/7] dt-bindings: display: Add ingenic, jz4780-dw-hdmi " H. Nikolaus Schaller
2021-10-05 20:43   ` [PATCH v5 3/7] dt-bindings: display: Add ingenic,jz4780-dw-hdmi " Paul Cercueil
2021-11-07 13:43     ` H. Nikolaus Schaller
2021-11-07 13:43       ` H. Nikolaus Schaller
2021-11-07 19:03       ` Paul Cercueil
2021-11-07 19:03         ` Paul Cercueil
2021-10-05 22:45   ` Rob Herring
2021-10-05 22:45     ` [PATCH v5 3/7] dt-bindings: display: Add ingenic, jz4780-dw-hdmi " Rob Herring
2021-10-05 12:29 ` [PATCH v5 4/7] drm/ingenic: Add dw-hdmi driver for jz4780 H. Nikolaus Schaller
2021-10-05 12:29 ` [PATCH v5 5/7] MIPS: DTS: jz4780: Account for Synopsys HDMI driver and LCD controllers H. Nikolaus Schaller
2021-10-05 20:50   ` Paul Cercueil
2021-10-05 21:44     ` Paul Boddie
2021-10-05 21:52       ` Paul Cercueil
2021-11-07 13:45         ` H. Nikolaus Schaller
2021-11-07 13:45           ` H. Nikolaus Schaller
2021-11-07 19:05           ` Paul Cercueil
2021-11-07 19:05             ` Paul Cercueil
2021-11-09 20:19             ` H. Nikolaus Schaller
2021-11-09 20:19               ` H. Nikolaus Schaller
2021-11-09 20:36               ` Paul Cercueil
2021-11-09 20:36                 ` Paul Cercueil
2021-11-09 20:42                 ` H. Nikolaus Schaller
2021-11-09 20:42                   ` H. Nikolaus Schaller
2021-11-09 21:14                   ` [Letux-kernel] " H. Nikolaus Schaller
2021-11-09 21:14                     ` H. Nikolaus Schaller
2021-10-05 12:29 ` [PATCH v5 6/7] MIPS: DTS: CI20: Add DT nodes for HDMI setup H. Nikolaus Schaller
2021-10-05 12:29 ` [PATCH v5 7/7] MIPS: defconfig: CI20: configure for DRM_DW_HDMI_JZ4780 H. Nikolaus Schaller

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