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* [PATCH] arm64: dts: imx8mm: Move gic node into soc node
@ 2019-06-03  1:50 ` Anson.Huang
  0 siblings, 0 replies; 8+ messages in thread
From: Anson.Huang @ 2019-06-03  1:50 UTC (permalink / raw)
  To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
	leonard.crestez, aisheng.dong, viresh.kumar, ping.bai,
	devicetree, linux-arm-kernel, linux-kernel
  Cc: Linux-imx

From: Anson Huang <Anson.Huang@nxp.com>

GIC is inside of SoC from architecture perspective, it should
be located inside of soc node in DT.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index dc99f45..429312e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -169,15 +169,6 @@
 		clock-output-names = "clk_ext4";
 	};
 
-	gic: interrupt-controller@38800000 {
-		compatible = "arm,gic-v3";
-		reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
-		      <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */
-		#interrupt-cells = <3>;
-		interrupt-controller;
-		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
-	};
-
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
@@ -739,6 +730,15 @@
 			dma-names = "rx-tx";
 			status = "disabled";
 		};
+
+		gic: interrupt-controller@38800000 {
+			compatible = "arm,gic-v3";
+			reg = <0x38800000 0x10000>, /* GIC Dist */
+			      <0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */
+			#interrupt-cells = <3>;
+			interrupt-controller;
+			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		};
 	};
 
 	usbphynop1: usbphynop1 {
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH] arm64: dts: imx8mm: Move gic node into soc node
@ 2019-06-03  1:50 ` Anson.Huang
  0 siblings, 0 replies; 8+ messages in thread
From: Anson.Huang @ 2019-06-03  1:50 UTC (permalink / raw)
  To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
	leonard.crestez, aisheng.dong, viresh.kumar, ping.bai,
	devicetree, linux-arm-kernel, linux-kernel
  Cc: Linux-imx

From: Anson Huang <Anson.Huang@nxp.com>

GIC is inside of SoC from architecture perspective, it should
be located inside of soc node in DT.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index dc99f45..429312e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -169,15 +169,6 @@
 		clock-output-names = "clk_ext4";
 	};
 
-	gic: interrupt-controller@38800000 {
-		compatible = "arm,gic-v3";
-		reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
-		      <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */
-		#interrupt-cells = <3>;
-		interrupt-controller;
-		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
-	};
-
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
@@ -739,6 +730,15 @@
 			dma-names = "rx-tx";
 			status = "disabled";
 		};
+
+		gic: interrupt-controller@38800000 {
+			compatible = "arm,gic-v3";
+			reg = <0x38800000 0x10000>, /* GIC Dist */
+			      <0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */
+			#interrupt-cells = <3>;
+			interrupt-controller;
+			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		};
 	};
 
 	usbphynop1: usbphynop1 {
-- 
2.7.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* Re: [PATCH] arm64: dts: imx8mm: Move gic node into soc node
  2019-06-03  1:50 ` Anson.Huang
  (?)
@ 2019-06-06  2:18   ` Shawn Guo
  -1 siblings, 0 replies; 8+ messages in thread
From: Shawn Guo @ 2019-06-06  2:18 UTC (permalink / raw)
  To: Anson.Huang
  Cc: robh+dt, mark.rutland, s.hauer, kernel, festevam,
	leonard.crestez, aisheng.dong, viresh.kumar, ping.bai,
	devicetree, linux-arm-kernel, linux-kernel, Linux-imx

On Mon, Jun 03, 2019 at 09:50:20AM +0800, Anson.Huang@nxp.com wrote:
> From: Anson Huang <Anson.Huang@nxp.com>
> 
> GIC is inside of SoC from architecture perspective, it should
> be located inside of soc node in DT.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

It doesn't apply to my imx/dt64 branch.  Please generate it against that
branch for my for-next.

Shawn

> ---
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index dc99f45..429312e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -169,15 +169,6 @@
>  		clock-output-names = "clk_ext4";
>  	};
>  
> -	gic: interrupt-controller@38800000 {
> -		compatible = "arm,gic-v3";
> -		reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
> -		      <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */
> -		#interrupt-cells = <3>;
> -		interrupt-controller;
> -		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> -	};
> -
>  	psci {
>  		compatible = "arm,psci-1.0";
>  		method = "smc";
> @@ -739,6 +730,15 @@
>  			dma-names = "rx-tx";
>  			status = "disabled";
>  		};
> +
> +		gic: interrupt-controller@38800000 {
> +			compatible = "arm,gic-v3";
> +			reg = <0x38800000 0x10000>, /* GIC Dist */
> +			      <0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */
> +			#interrupt-cells = <3>;
> +			interrupt-controller;
> +			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +		};
>  	};
>  
>  	usbphynop1: usbphynop1 {
> -- 
> 2.7.4
> 

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH] arm64: dts: imx8mm: Move gic node into soc node
@ 2019-06-06  2:18   ` Shawn Guo
  0 siblings, 0 replies; 8+ messages in thread
From: Shawn Guo @ 2019-06-06  2:18 UTC (permalink / raw)
  To: Anson.Huang
  Cc: mark.rutland, aisheng.dong, ping.bai, devicetree, viresh.kumar,
	s.hauer, linux-kernel, robh+dt, Linux-imx, kernel,
	leonard.crestez, festevam, linux-arm-kernel

On Mon, Jun 03, 2019 at 09:50:20AM +0800, Anson.Huang@nxp.com wrote:
> From: Anson Huang <Anson.Huang@nxp.com>
> 
> GIC is inside of SoC from architecture perspective, it should
> be located inside of soc node in DT.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

It doesn't apply to my imx/dt64 branch.  Please generate it against that
branch for my for-next.

Shawn

> ---
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index dc99f45..429312e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -169,15 +169,6 @@
>  		clock-output-names = "clk_ext4";
>  	};
>  
> -	gic: interrupt-controller@38800000 {
> -		compatible = "arm,gic-v3";
> -		reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
> -		      <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */
> -		#interrupt-cells = <3>;
> -		interrupt-controller;
> -		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> -	};
> -
>  	psci {
>  		compatible = "arm,psci-1.0";
>  		method = "smc";
> @@ -739,6 +730,15 @@
>  			dma-names = "rx-tx";
>  			status = "disabled";
>  		};
> +
> +		gic: interrupt-controller@38800000 {
> +			compatible = "arm,gic-v3";
> +			reg = <0x38800000 0x10000>, /* GIC Dist */
> +			      <0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */
> +			#interrupt-cells = <3>;
> +			interrupt-controller;
> +			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +		};
>  	};
>  
>  	usbphynop1: usbphynop1 {
> -- 
> 2.7.4
> 

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH] arm64: dts: imx8mm: Move gic node into soc node
@ 2019-06-06  2:18   ` Shawn Guo
  0 siblings, 0 replies; 8+ messages in thread
From: Shawn Guo @ 2019-06-06  2:18 UTC (permalink / raw)
  To: Anson.Huang
  Cc: mark.rutland, aisheng.dong, ping.bai, devicetree, viresh.kumar,
	s.hauer, linux-kernel, robh+dt, Linux-imx, kernel,
	leonard.crestez, festevam, linux-arm-kernel

On Mon, Jun 03, 2019 at 09:50:20AM +0800, Anson.Huang@nxp.com wrote:
> From: Anson Huang <Anson.Huang@nxp.com>
> 
> GIC is inside of SoC from architecture perspective, it should
> be located inside of soc node in DT.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

It doesn't apply to my imx/dt64 branch.  Please generate it against that
branch for my for-next.

Shawn

> ---
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index dc99f45..429312e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -169,15 +169,6 @@
>  		clock-output-names = "clk_ext4";
>  	};
>  
> -	gic: interrupt-controller@38800000 {
> -		compatible = "arm,gic-v3";
> -		reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
> -		      <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */
> -		#interrupt-cells = <3>;
> -		interrupt-controller;
> -		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> -	};
> -
>  	psci {
>  		compatible = "arm,psci-1.0";
>  		method = "smc";
> @@ -739,6 +730,15 @@
>  			dma-names = "rx-tx";
>  			status = "disabled";
>  		};
> +
> +		gic: interrupt-controller@38800000 {
> +			compatible = "arm,gic-v3";
> +			reg = <0x38800000 0x10000>, /* GIC Dist */
> +			      <0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */
> +			#interrupt-cells = <3>;
> +			interrupt-controller;
> +			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +		};
>  	};
>  
>  	usbphynop1: usbphynop1 {
> -- 
> 2.7.4
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 8+ messages in thread
* RE: [PATCH] arm64: dts: imx8mm: Move gic node into soc node
  2019-06-06  2:18   ` Shawn Guo
  (?)
@ 2019-06-06  2:38     ` Anson Huang
  -1 siblings, 0 replies; 8+ messages in thread
From: Anson Huang @ 2019-06-06  2:38 UTC (permalink / raw)
  To: Shawn Guo
  Cc: robh+dt, mark.rutland, s.hauer, kernel, festevam,
	Leonard Crestez, Aisheng Dong, viresh.kumar, Jacky Bai,
	devicetree, linux-arm-kernel, linux-kernel, dl-linux-imx

Hi, Shawn

> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: Thursday, June 6, 2019 10:18 AM
> To: Anson Huang <anson.huang@nxp.com>
> Cc: robh+dt@kernel.org; mark.rutland@arm.com; s.hauer@pengutronix.de;
> kernel@pengutronix.de; festevam@gmail.com; Leonard Crestez
> <leonard.crestez@nxp.com>; Aisheng Dong <aisheng.dong@nxp.com>;
> viresh.kumar@linaro.org; Jacky Bai <ping.bai@nxp.com>;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH] arm64: dts: imx8mm: Move gic node into soc node
> 
> On Mon, Jun 03, 2019 at 09:50:20AM +0800, Anson.Huang@nxp.com wrote:
> > From: Anson Huang <Anson.Huang@nxp.com>
> >
> > GIC is inside of SoC from architecture perspective, it should be
> > located inside of soc node in DT.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> 
> It doesn't apply to my imx/dt64 branch.  Please generate it against that
> branch for my for-next.

OK, just resent the patch based on the correct branch.

Thanks,
Anson.

> 
> Shawn
> 
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 18 +++++++++---------
> >  1 file changed, 9 insertions(+), 9 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index dc99f45..429312e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -169,15 +169,6 @@
> >  		clock-output-names = "clk_ext4";
> >  	};
> >
> > -	gic: interrupt-controller@38800000 {
> > -		compatible = "arm,gic-v3";
> > -		reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
> > -		      <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base +
> SGI_base) */
> > -		#interrupt-cells = <3>;
> > -		interrupt-controller;
> > -		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > -	};
> > -
> >  	psci {
> >  		compatible = "arm,psci-1.0";
> >  		method = "smc";
> > @@ -739,6 +730,15 @@
> >  			dma-names = "rx-tx";
> >  			status = "disabled";
> >  		};
> > +
> > +		gic: interrupt-controller@38800000 {
> > +			compatible = "arm,gic-v3";
> > +			reg = <0x38800000 0x10000>, /* GIC Dist */
> > +			      <0x38880000 0xc0000>; /* GICR (RD_base +
> SGI_base) */
> > +			#interrupt-cells = <3>;
> > +			interrupt-controller;
> > +			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > +		};
> >  	};
> >
> >  	usbphynop1: usbphynop1 {
> > --
> > 2.7.4
> >

^ permalink raw reply	[flat|nested] 8+ messages in thread
* RE: [PATCH] arm64: dts: imx8mm: Move gic node into soc node
@ 2019-06-06  2:38     ` Anson Huang
  0 siblings, 0 replies; 8+ messages in thread
From: Anson Huang @ 2019-06-06  2:38 UTC (permalink / raw)
  To: Shawn Guo
  Cc: mark.rutland, Aisheng Dong, Jacky Bai, devicetree, viresh.kumar,
	s.hauer, linux-kernel, robh+dt, dl-linux-imx, kernel,
	Leonard Crestez, festevam, linux-arm-kernel

Hi, Shawn

> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: Thursday, June 6, 2019 10:18 AM
> To: Anson Huang <anson.huang@nxp.com>
> Cc: robh+dt@kernel.org; mark.rutland@arm.com; s.hauer@pengutronix.de;
> kernel@pengutronix.de; festevam@gmail.com; Leonard Crestez
> <leonard.crestez@nxp.com>; Aisheng Dong <aisheng.dong@nxp.com>;
> viresh.kumar@linaro.org; Jacky Bai <ping.bai@nxp.com>;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH] arm64: dts: imx8mm: Move gic node into soc node
> 
> On Mon, Jun 03, 2019 at 09:50:20AM +0800, Anson.Huang@nxp.com wrote:
> > From: Anson Huang <Anson.Huang@nxp.com>
> >
> > GIC is inside of SoC from architecture perspective, it should be
> > located inside of soc node in DT.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> 
> It doesn't apply to my imx/dt64 branch.  Please generate it against that
> branch for my for-next.

OK, just resent the patch based on the correct branch.

Thanks,
Anson.

> 
> Shawn
> 
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 18 +++++++++---------
> >  1 file changed, 9 insertions(+), 9 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index dc99f45..429312e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -169,15 +169,6 @@
> >  		clock-output-names = "clk_ext4";
> >  	};
> >
> > -	gic: interrupt-controller@38800000 {
> > -		compatible = "arm,gic-v3";
> > -		reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
> > -		      <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base +
> SGI_base) */
> > -		#interrupt-cells = <3>;
> > -		interrupt-controller;
> > -		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > -	};
> > -
> >  	psci {
> >  		compatible = "arm,psci-1.0";
> >  		method = "smc";
> > @@ -739,6 +730,15 @@
> >  			dma-names = "rx-tx";
> >  			status = "disabled";
> >  		};
> > +
> > +		gic: interrupt-controller@38800000 {
> > +			compatible = "arm,gic-v3";
> > +			reg = <0x38800000 0x10000>, /* GIC Dist */
> > +			      <0x38880000 0xc0000>; /* GICR (RD_base +
> SGI_base) */
> > +			#interrupt-cells = <3>;
> > +			interrupt-controller;
> > +			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > +		};
> >  	};
> >
> >  	usbphynop1: usbphynop1 {
> > --
> > 2.7.4
> >

^ permalink raw reply	[flat|nested] 8+ messages in thread
* RE: [PATCH] arm64: dts: imx8mm: Move gic node into soc node
@ 2019-06-06  2:38     ` Anson Huang
  0 siblings, 0 replies; 8+ messages in thread
From: Anson Huang @ 2019-06-06  2:38 UTC (permalink / raw)
  To: Shawn Guo
  Cc: mark.rutland, Aisheng Dong, Jacky Bai, devicetree, viresh.kumar,
	s.hauer, linux-kernel, robh+dt, dl-linux-imx, kernel,
	Leonard Crestez, festevam, linux-arm-kernel

Hi, Shawn

> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: Thursday, June 6, 2019 10:18 AM
> To: Anson Huang <anson.huang@nxp.com>
> Cc: robh+dt@kernel.org; mark.rutland@arm.com; s.hauer@pengutronix.de;
> kernel@pengutronix.de; festevam@gmail.com; Leonard Crestez
> <leonard.crestez@nxp.com>; Aisheng Dong <aisheng.dong@nxp.com>;
> viresh.kumar@linaro.org; Jacky Bai <ping.bai@nxp.com>;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH] arm64: dts: imx8mm: Move gic node into soc node
> 
> On Mon, Jun 03, 2019 at 09:50:20AM +0800, Anson.Huang@nxp.com wrote:
> > From: Anson Huang <Anson.Huang@nxp.com>
> >
> > GIC is inside of SoC from architecture perspective, it should be
> > located inside of soc node in DT.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> 
> It doesn't apply to my imx/dt64 branch.  Please generate it against that
> branch for my for-next.

OK, just resent the patch based on the correct branch.

Thanks,
Anson.

> 
> Shawn
> 
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 18 +++++++++---------
> >  1 file changed, 9 insertions(+), 9 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index dc99f45..429312e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -169,15 +169,6 @@
> >  		clock-output-names = "clk_ext4";
> >  	};
> >
> > -	gic: interrupt-controller@38800000 {
> > -		compatible = "arm,gic-v3";
> > -		reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
> > -		      <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base +
> SGI_base) */
> > -		#interrupt-cells = <3>;
> > -		interrupt-controller;
> > -		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > -	};
> > -
> >  	psci {
> >  		compatible = "arm,psci-1.0";
> >  		method = "smc";
> > @@ -739,6 +730,15 @@
> >  			dma-names = "rx-tx";
> >  			status = "disabled";
> >  		};
> > +
> > +		gic: interrupt-controller@38800000 {
> > +			compatible = "arm,gic-v3";
> > +			reg = <0x38800000 0x10000>, /* GIC Dist */
> > +			      <0x38880000 0xc0000>; /* GICR (RD_base +
> SGI_base) */
> > +			#interrupt-cells = <3>;
> > +			interrupt-controller;
> > +			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > +		};
> >  	};
> >
> >  	usbphynop1: usbphynop1 {
> > --
> > 2.7.4
> >
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^ permalink raw reply	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2019-06-06  2:39 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-03  1:50 [PATCH] arm64: dts: imx8mm: Move gic node into soc node Anson.Huang
2019-06-03  1:50 ` Anson.Huang
2019-06-06  2:18 ` Shawn Guo
2019-06-06  2:18   ` Shawn Guo
2019-06-06  2:18   ` Shawn Guo
2019-06-06  2:38   ` Anson Huang
2019-06-06  2:38     ` Anson Huang
2019-06-06  2:38     ` Anson Huang

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