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From: "A.S. Dong" <aisheng.dong-3arQi8VN3Tc@public.gmane.org>
To: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org"
	<kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	"patchwork-lst-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org"
	<patchwork-lst-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Subject: RE: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver
Date: Wed, 29 Mar 2017 16:08:02 +0000	[thread overview]
Message-ID: <DB5PR04MB1431A7CC91F55ECFE5BE31FB80350@DB5PR04MB1431.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20170323144418.30977-3-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>

Hi Lucas,

> -----Original Message-----
> From: Lucas Stach [mailto:l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org]
> Sent: Thursday, March 23, 2017 10:44 PM
> To: Shawn Guo
> Cc: Fabio Estevam; A.S. Dong; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-arm-
> kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org; kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org; patchwork-
> lst-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org
> Subject: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD
> driver
> 
> On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be
> stalled during the power up sequencing of the PU power domain. As this may
> lead to a complete loss of display output, the recommended workaround is
> to keep the PU domain enabled during normal system operation.
> 
> Implement this by rejecting the domain power down request on the affected
> SoC.
> 
> Signed-off-by: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> ---
>  drivers/soc/imx/gpc.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index
> 4294287e5f6c..599e1e46f694 100644
> --- a/drivers/soc/imx/gpc.c
> +++ b/drivers/soc/imx/gpc.c
> @@ -45,6 +45,7 @@ struct imx_pm_domain {
>  	unsigned int reg_offs;
>  	signed char cntr_pdn_bit;
>  	unsigned int ipg_rate_mhz;
> +	bool allow_dynamic_pd;
>  };
> 
>  static inline struct imx_pm_domain *
> @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct
> generic_pm_domain *genpd)
>  	int iso, iso2sw;
>  	u32 val;
> 
> +	if (!pd->allow_dynamic_pd)
> +		return -EBUSY;
> +
>  	/* Read ISO and ISO2SW power down delays */
>  	regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val);
>  	iso = val & 0x3f;
> @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = {
>  		},
>  		.reg_offs = 0x260,
>  		.cntr_pdn_bit = 0,
> +		.allow_dynamic_pd = true,
>  	}, {
>  		.base = {
>  			.name = "DISPLAY",
> @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = {
>  		},
>  		.reg_offs = 0x240,
>  		.cntr_pdn_bit = 4,
> +		.allow_dynamic_pd = true,

Just a Nitpick, besides shawn's comment in another mail,
if we use a domain flag like IMX_PD_ALWAYS_ON set by SoC errata flag,
then probably we can save all the default allow_dynamic_pd lines.
This also release the life when adding new domains.

Otherwise, the two patch seems good to me.

Regards
Dong Aisheng

>  	}
>  };
> 
>  struct imx_gpc_dt_data {
>  	int num_domains;
> +	bool err009619_present;
>  };
> 
>  static const struct imx_gpc_dt_data imx6q_dt_data = {
>  	.num_domains = 2,
> +	.err009619_present = false,
> +};
> +
> +static const struct imx_gpc_dt_data imx6qp_dt_data = {
> +	.num_domains = 2,
> +	.err009619_present = true,
>  };
> 
>  static const struct imx_gpc_dt_data imx6sl_dt_data = {
>  	.num_domains = 3,
> +	.err009619_present = false,
>  };
> 
>  static const struct of_device_id imx_gpc_dt_ids[] = {
>  	{ .compatible = "fsl,imx6q-gpc", .data = &imx6q_dt_data },
> +	{ .compatible = "fsl,imx6qp-gpc", .data = &imx6qp_dt_data },
>  	{ .compatible = "fsl,imx6sl-gpc", .data = &imx6sl_dt_data },
>  	{ }
>  };
> @@ -377,6 +392,10 @@ static int imx_gpc_probe(struct platform_device *pdev)
>  		return ret;
>  	}
> 
> +	/* Disable PU power down in normal operation if ERR009619 is present
> */
> +	if (of_id_data->err009619_present)
> +		imx_gpc_domains[1].allow_dynamic_pd = false;
> +
>  	if (!pgc_node) {
>  		ret = imx_gpc_old_dt_init(&pdev->dev, regmap,
>  					  of_id_data->num_domains);
> --
> 2.11.0

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WARNING: multiple messages have this Message-ID (diff)
From: aisheng.dong@nxp.com (A.S. Dong)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver
Date: Wed, 29 Mar 2017 16:08:02 +0000	[thread overview]
Message-ID: <DB5PR04MB1431A7CC91F55ECFE5BE31FB80350@DB5PR04MB1431.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20170323144418.30977-3-l.stach@pengutronix.de>

Hi Lucas,

> -----Original Message-----
> From: Lucas Stach [mailto:l.stach at pengutronix.de]
> Sent: Thursday, March 23, 2017 10:44 PM
> To: Shawn Guo
> Cc: Fabio Estevam; A.S. Dong; devicetree at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org; kernel at pengutronix.de; patchwork-
> lst at pengutronix.de
> Subject: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD
> driver
> 
> On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be
> stalled during the power up sequencing of the PU power domain. As this may
> lead to a complete loss of display output, the recommended workaround is
> to keep the PU domain enabled during normal system operation.
> 
> Implement this by rejecting the domain power down request on the affected
> SoC.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>  drivers/soc/imx/gpc.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index
> 4294287e5f6c..599e1e46f694 100644
> --- a/drivers/soc/imx/gpc.c
> +++ b/drivers/soc/imx/gpc.c
> @@ -45,6 +45,7 @@ struct imx_pm_domain {
>  	unsigned int reg_offs;
>  	signed char cntr_pdn_bit;
>  	unsigned int ipg_rate_mhz;
> +	bool allow_dynamic_pd;
>  };
> 
>  static inline struct imx_pm_domain *
> @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct
> generic_pm_domain *genpd)
>  	int iso, iso2sw;
>  	u32 val;
> 
> +	if (!pd->allow_dynamic_pd)
> +		return -EBUSY;
> +
>  	/* Read ISO and ISO2SW power down delays */
>  	regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val);
>  	iso = val & 0x3f;
> @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = {
>  		},
>  		.reg_offs = 0x260,
>  		.cntr_pdn_bit = 0,
> +		.allow_dynamic_pd = true,
>  	}, {
>  		.base = {
>  			.name = "DISPLAY",
> @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = {
>  		},
>  		.reg_offs = 0x240,
>  		.cntr_pdn_bit = 4,
> +		.allow_dynamic_pd = true,

Just a Nitpick, besides shawn's comment in another mail,
if we use a domain flag like IMX_PD_ALWAYS_ON set by SoC errata flag,
then probably we can save all the default allow_dynamic_pd lines.
This also release the life when adding new domains.

Otherwise, the two patch seems good to me.

Regards
Dong Aisheng

>  	}
>  };
> 
>  struct imx_gpc_dt_data {
>  	int num_domains;
> +	bool err009619_present;
>  };
> 
>  static const struct imx_gpc_dt_data imx6q_dt_data = {
>  	.num_domains = 2,
> +	.err009619_present = false,
> +};
> +
> +static const struct imx_gpc_dt_data imx6qp_dt_data = {
> +	.num_domains = 2,
> +	.err009619_present = true,
>  };
> 
>  static const struct imx_gpc_dt_data imx6sl_dt_data = {
>  	.num_domains = 3,
> +	.err009619_present = false,
>  };
> 
>  static const struct of_device_id imx_gpc_dt_ids[] = {
>  	{ .compatible = "fsl,imx6q-gpc", .data = &imx6q_dt_data },
> +	{ .compatible = "fsl,imx6qp-gpc", .data = &imx6qp_dt_data },
>  	{ .compatible = "fsl,imx6sl-gpc", .data = &imx6sl_dt_data },
>  	{ }
>  };
> @@ -377,6 +392,10 @@ static int imx_gpc_probe(struct platform_device *pdev)
>  		return ret;
>  	}
> 
> +	/* Disable PU power down in normal operation if ERR009619 is present
> */
> +	if (of_id_data->err009619_present)
> +		imx_gpc_domains[1].allow_dynamic_pd = false;
> +
>  	if (!pgc_node) {
>  		ret = imx_gpc_old_dt_init(&pdev->dev, regmap,
>  					  of_id_data->num_domains);
> --
> 2.11.0

  parent reply	other threads:[~2017-03-29 16:08 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-23 14:44 [PATCH 0/2] i.MX6QP GPC fixes Lucas Stach
2017-03-23 14:44 ` Lucas Stach
     [not found] ` <20170323144418.30977-1-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2017-03-23 14:44   ` [PATCH 1/2] dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible Lucas Stach
2017-03-23 14:44     ` Lucas Stach
     [not found]     ` <20170323144418.30977-2-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2017-03-29 15:59       ` Rob Herring
2017-03-29 15:59         ` Rob Herring
2017-03-23 14:44   ` [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver Lucas Stach
2017-03-23 14:44     ` Lucas Stach
     [not found]     ` <20170323144418.30977-3-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2017-03-24  6:28       ` Shawn Guo
2017-03-24  6:28         ` Shawn Guo
2017-03-29 16:08       ` A.S. Dong [this message]
2017-03-29 16:08         ` A.S. Dong
     [not found]         ` <DB5PR04MB1431A7CC91F55ECFE5BE31FB80350-rqLcZCCNzVwrYIBjo4yUUM9NdZoXdze2vxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-03-29 16:13           ` Lucas Stach
2017-03-29 16:13             ` Lucas Stach
2017-03-30  7:08             ` Lothar Waßmann
2017-03-30  7:08               ` Lothar Waßmann
2017-03-30  8:22               ` Lucas Stach
2017-03-30  8:22                 ` Lucas Stach

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