* [PATCH 0/4] arm64: dts: imx8m: add spda bus
@ 2020-12-29 12:00 ` peng.fan
0 siblings, 0 replies; 22+ messages in thread
From: peng.fan @ 2020-12-29 12:00 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam, robh+dt
Cc: devicetree, Peng Fan, linux-kernel, krzk, linux-imx, kernel,
linux-arm-kernel
From: Peng Fan <peng.fan@nxp.com>
There is spba bus in aips1 and aips3, each spba bus has some
peripherals inside, add the spba bus node
Peng Fan (4):
arm64: dts: imx8mn: add spba bus node of aips3
arm64: dts: imx8mn: add spba bus node
arm64: dts: imx8mn: add spba bus node
arm64: dts: imx8mq: add spba bus node
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362 ++++++++++----------
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 146 ++++----
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 386 +++++++++++-----------
3 files changed, 467 insertions(+), 427 deletions(-)
--
2.28.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/4] arm64: dts: imx8mn: add spba bus node of aips3
2020-12-29 12:00 ` peng.fan
@ 2020-12-29 12:00 ` peng.fan
-1 siblings, 0 replies; 22+ messages in thread
From: peng.fan @ 2020-12-29 12:00 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam, robh+dt
Cc: kernel, linux-imx, linux-arm-kernel, linux-kernel, devicetree,
krzk, Peng Fan
From: Peng Fan <peng.fan@nxp.com>
There is a spba bus inside aips3 space, add it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 148 ++++++++++++----------
1 file changed, 78 insertions(+), 70 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index ee1790230490..73602832ccaa 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -253,7 +253,7 @@ aips1: bus@30000000 {
#size-cells = <1>;
ranges;
- spba: bus@30000000 {
+ spba1: bus@30000000 {
compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@@ -667,81 +667,89 @@ aips3: bus@30800000 {
#size-cells = <1>;
ranges;
- ecspi1: spi@30820000 {
- compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
+ spba2: bus@30800000 {
+ compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30820000 0x10000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_ECSPI1_ROOT>,
- <&clk IMX8MN_CLK_ECSPI1_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ #size-cells = <1>;
+ reg = <0x30800000 0x100000>;
+ ranges;
- ecspi2: spi@30830000 {
- compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30830000 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_ECSPI2_ROOT>,
- <&clk IMX8MN_CLK_ECSPI2_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ ecspi1: spi@30820000 {
+ compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30820000 0x10000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ECSPI1_ROOT>,
+ <&clk IMX8MN_CLK_ECSPI1_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- ecspi3: spi@30840000 {
- compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30840000 0x10000>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_ECSPI3_ROOT>,
- <&clk IMX8MN_CLK_ECSPI3_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ ecspi2: spi@30830000 {
+ compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30830000 0x10000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ECSPI2_ROOT>,
+ <&clk IMX8MN_CLK_ECSPI2_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart1: serial@30860000 {
- compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
- reg = <0x30860000 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_UART1_ROOT>,
- <&clk IMX8MN_CLK_UART1_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ ecspi3: spi@30840000 {
+ compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30840000 0x10000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ECSPI3_ROOT>,
+ <&clk IMX8MN_CLK_ECSPI3_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart3: serial@30880000 {
- compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
- reg = <0x30880000 0x10000>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_UART3_ROOT>,
- <&clk IMX8MN_CLK_UART3_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ uart1: serial@30860000 {
+ compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
+ reg = <0x30860000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_UART1_ROOT>,
+ <&clk IMX8MN_CLK_UART1_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart2: serial@30890000 {
- compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
- reg = <0x30890000 0x10000>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_UART2_ROOT>,
- <&clk IMX8MN_CLK_UART2_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ uart3: serial@30880000 {
+ compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
+ reg = <0x30880000 0x10000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_UART3_ROOT>,
+ <&clk IMX8MN_CLK_UART3_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ uart2: serial@30890000 {
+ compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
+ reg = <0x30890000 0x10000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_UART2_ROOT>,
+ <&clk IMX8MN_CLK_UART2_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+ }
crypto: crypto@30900000 {
compatible = "fsl,sec-v4.0";
--
2.28.0
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH 1/4] arm64: dts: imx8mn: add spba bus node of aips3
@ 2020-12-29 12:00 ` peng.fan
0 siblings, 0 replies; 22+ messages in thread
From: peng.fan @ 2020-12-29 12:00 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam, robh+dt
Cc: devicetree, Peng Fan, linux-kernel, krzk, linux-imx, kernel,
linux-arm-kernel
From: Peng Fan <peng.fan@nxp.com>
There is a spba bus inside aips3 space, add it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 148 ++++++++++++----------
1 file changed, 78 insertions(+), 70 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index ee1790230490..73602832ccaa 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -253,7 +253,7 @@ aips1: bus@30000000 {
#size-cells = <1>;
ranges;
- spba: bus@30000000 {
+ spba1: bus@30000000 {
compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@@ -667,81 +667,89 @@ aips3: bus@30800000 {
#size-cells = <1>;
ranges;
- ecspi1: spi@30820000 {
- compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
+ spba2: bus@30800000 {
+ compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30820000 0x10000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_ECSPI1_ROOT>,
- <&clk IMX8MN_CLK_ECSPI1_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ #size-cells = <1>;
+ reg = <0x30800000 0x100000>;
+ ranges;
- ecspi2: spi@30830000 {
- compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30830000 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_ECSPI2_ROOT>,
- <&clk IMX8MN_CLK_ECSPI2_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ ecspi1: spi@30820000 {
+ compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30820000 0x10000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ECSPI1_ROOT>,
+ <&clk IMX8MN_CLK_ECSPI1_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- ecspi3: spi@30840000 {
- compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30840000 0x10000>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_ECSPI3_ROOT>,
- <&clk IMX8MN_CLK_ECSPI3_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ ecspi2: spi@30830000 {
+ compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30830000 0x10000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ECSPI2_ROOT>,
+ <&clk IMX8MN_CLK_ECSPI2_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart1: serial@30860000 {
- compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
- reg = <0x30860000 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_UART1_ROOT>,
- <&clk IMX8MN_CLK_UART1_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ ecspi3: spi@30840000 {
+ compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30840000 0x10000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ECSPI3_ROOT>,
+ <&clk IMX8MN_CLK_ECSPI3_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart3: serial@30880000 {
- compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
- reg = <0x30880000 0x10000>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_UART3_ROOT>,
- <&clk IMX8MN_CLK_UART3_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ uart1: serial@30860000 {
+ compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
+ reg = <0x30860000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_UART1_ROOT>,
+ <&clk IMX8MN_CLK_UART1_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart2: serial@30890000 {
- compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
- reg = <0x30890000 0x10000>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MN_CLK_UART2_ROOT>,
- <&clk IMX8MN_CLK_UART2_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ uart3: serial@30880000 {
+ compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
+ reg = <0x30880000 0x10000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_UART3_ROOT>,
+ <&clk IMX8MN_CLK_UART3_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ uart2: serial@30890000 {
+ compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
+ reg = <0x30890000 0x10000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_UART2_ROOT>,
+ <&clk IMX8MN_CLK_UART2_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+ }
crypto: crypto@30900000 {
compatible = "fsl,sec-v4.0";
--
2.28.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
2020-12-29 12:00 ` peng.fan
@ 2020-12-29 12:00 ` peng.fan
-1 siblings, 0 replies; 22+ messages in thread
From: peng.fan @ 2020-12-29 12:00 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam, robh+dt
Cc: kernel, linux-imx, linux-arm-kernel, linux-kernel, devicetree,
krzk, Peng Fan
From: Peng Fan <peng.fan@nxp.com>
According to RM, there is a spba bus inside aips3 and aips1, add it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362 +++++++++++-----------
1 file changed, 189 insertions(+), 173 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index c824f2615fe8..91f85b8cee9a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -269,117 +269,125 @@ aips1: bus@30000000 {
#size-cells = <1>;
ranges = <0x30000000 0x30000000 0x400000>;
- sai1: sai@30010000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
- reg = <0x30010000 0x10000>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
- <&clk IMX8MM_CLK_SAI1_ROOT>,
- <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ bus@30000000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30000000 0x100000>;
+ ranges;
+
+ sai1: sai@30010000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+ reg = <0x30010000 0x10000>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
+ <&clk IMX8MM_CLK_SAI1_ROOT>,
+ <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai2: sai@30020000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
- reg = <0x30020000 0x10000>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
- <&clk IMX8MM_CLK_SAI2_ROOT>,
- <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai2: sai@30020000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+ reg = <0x30020000 0x10000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
+ <&clk IMX8MM_CLK_SAI2_ROOT>,
+ <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai3: sai@30030000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
- reg = <0x30030000 0x10000>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
- <&clk IMX8MM_CLK_SAI3_ROOT>,
- <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai3: sai@30030000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+ reg = <0x30030000 0x10000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
+ <&clk IMX8MM_CLK_SAI3_ROOT>,
+ <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai5: sai@30050000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
- reg = <0x30050000 0x10000>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
- <&clk IMX8MM_CLK_SAI5_ROOT>,
- <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai5: sai@30050000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+ reg = <0x30050000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
+ <&clk IMX8MM_CLK_SAI5_ROOT>,
+ <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai6: sai@30060000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
- reg = <0x30060000 0x10000>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
- <&clk IMX8MM_CLK_SAI6_ROOT>,
- <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai6: sai@30060000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+ reg = <0x30060000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
+ <&clk IMX8MM_CLK_SAI6_ROOT>,
+ <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- micfil: audio-controller@30080000 {
- compatible = "fsl,imx8mm-micfil";
- reg = <0x30080000 0x10000>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_PDM_IPG>,
- <&clk IMX8MM_CLK_PDM_ROOT>,
- <&clk IMX8MM_AUDIO_PLL1_OUT>,
- <&clk IMX8MM_AUDIO_PLL2_OUT>,
- <&clk IMX8MM_CLK_EXT3>;
- clock-names = "ipg_clk", "ipg_clk_app",
- "pll8k", "pll11k", "clkext3";
- dmas = <&sdma2 24 25 0x80000000>;
- dma-names = "rx";
- status = "disabled";
- };
+ micfil: audio-controller@30080000 {
+ compatible = "fsl,imx8mm-micfil";
+ reg = <0x30080000 0x10000>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_PDM_IPG>,
+ <&clk IMX8MM_CLK_PDM_ROOT>,
+ <&clk IMX8MM_AUDIO_PLL1_OUT>,
+ <&clk IMX8MM_AUDIO_PLL2_OUT>,
+ <&clk IMX8MM_CLK_EXT3>;
+ clock-names = "ipg_clk", "ipg_clk_app",
+ "pll8k", "pll11k", "clkext3";
+ dmas = <&sdma2 24 25 0x80000000>;
+ dma-names = "rx";
+ status = "disabled";
+ };
- spdif1: spdif@30090000 {
- compatible = "fsl,imx35-spdif";
- reg = <0x30090000 0x10000>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */
- <&clk IMX8MM_CLK_24M>, /* rxtx0 */
- <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */
- <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */
- <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */
- <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */
- <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */
- <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */
- <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */
- <&clk IMX8MM_CLK_DUMMY>; /* spba */
- clock-names = "core", "rxtx0",
- "rxtx1", "rxtx2",
- "rxtx3", "rxtx4",
- "rxtx5", "rxtx6",
- "rxtx7", "spba";
- dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
- dma-names = "rx", "tx";
- status = "disabled";
+ spdif1: spdif@30090000 {
+ compatible = "fsl,imx35-spdif";
+ reg = <0x30090000 0x10000>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */
+ <&clk IMX8MM_CLK_24M>, /* rxtx0 */
+ <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */
+ <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */
+ <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */
+ <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */
+ <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */
+ <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */
+ <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */
+ <&clk IMX8MM_CLK_DUMMY>; /* spba */
+ clock-names = "core", "rxtx0",
+ "rxtx1", "rxtx2",
+ "rxtx3", "rxtx4",
+ "rxtx5", "rxtx6",
+ "rxtx7", "spba";
+ dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
};
gpio1: gpio@30200000 {
@@ -660,80 +668,88 @@ aips3: bus@30800000 {
ranges = <0x30800000 0x30800000 0x400000>,
<0x8000000 0x8000000 0x10000000>;
- ecspi1: spi@30820000 {
- compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
+ bus@30800000 {
+ compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30820000 0x10000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>,
- <&clk IMX8MM_CLK_ECSPI1_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ #size-cells = <1>;
+ reg = <0x30800000 0x100000>;
+ ranges;
+
+ ecspi1: spi@30820000 {
+ compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30820000 0x10000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>,
+ <&clk IMX8MM_CLK_ECSPI1_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- ecspi2: spi@30830000 {
- compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30830000 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>,
- <&clk IMX8MM_CLK_ECSPI2_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ ecspi2: spi@30830000 {
+ compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30830000 0x10000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>,
+ <&clk IMX8MM_CLK_ECSPI2_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- ecspi3: spi@30840000 {
- compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30840000 0x10000>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>,
- <&clk IMX8MM_CLK_ECSPI3_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ ecspi3: spi@30840000 {
+ compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30840000 0x10000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>,
+ <&clk IMX8MM_CLK_ECSPI3_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart1: serial@30860000 {
- compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
- reg = <0x30860000 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_UART1_ROOT>,
- <&clk IMX8MM_CLK_UART1_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ uart1: serial@30860000 {
+ compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
+ reg = <0x30860000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_UART1_ROOT>,
+ <&clk IMX8MM_CLK_UART1_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart3: serial@30880000 {
- compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
- reg = <0x30880000 0x10000>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_UART3_ROOT>,
- <&clk IMX8MM_CLK_UART3_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ uart3: serial@30880000 {
+ compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
+ reg = <0x30880000 0x10000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_UART3_ROOT>,
+ <&clk IMX8MM_CLK_UART3_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart2: serial@30890000 {
- compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
- reg = <0x30890000 0x10000>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_UART2_ROOT>,
- <&clk IMX8MM_CLK_UART2_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
+ uart2: serial@30890000 {
+ compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
+ reg = <0x30890000 0x10000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_UART2_ROOT>,
+ <&clk IMX8MM_CLK_UART2_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
};
crypto: crypto@30900000 {
--
2.28.0
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
@ 2020-12-29 12:00 ` peng.fan
0 siblings, 0 replies; 22+ messages in thread
From: peng.fan @ 2020-12-29 12:00 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam, robh+dt
Cc: devicetree, Peng Fan, linux-kernel, krzk, linux-imx, kernel,
linux-arm-kernel
From: Peng Fan <peng.fan@nxp.com>
According to RM, there is a spba bus inside aips3 and aips1, add it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362 +++++++++++-----------
1 file changed, 189 insertions(+), 173 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index c824f2615fe8..91f85b8cee9a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -269,117 +269,125 @@ aips1: bus@30000000 {
#size-cells = <1>;
ranges = <0x30000000 0x30000000 0x400000>;
- sai1: sai@30010000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
- reg = <0x30010000 0x10000>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
- <&clk IMX8MM_CLK_SAI1_ROOT>,
- <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ bus@30000000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30000000 0x100000>;
+ ranges;
+
+ sai1: sai@30010000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+ reg = <0x30010000 0x10000>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
+ <&clk IMX8MM_CLK_SAI1_ROOT>,
+ <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai2: sai@30020000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
- reg = <0x30020000 0x10000>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
- <&clk IMX8MM_CLK_SAI2_ROOT>,
- <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai2: sai@30020000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+ reg = <0x30020000 0x10000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
+ <&clk IMX8MM_CLK_SAI2_ROOT>,
+ <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai3: sai@30030000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
- reg = <0x30030000 0x10000>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
- <&clk IMX8MM_CLK_SAI3_ROOT>,
- <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai3: sai@30030000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+ reg = <0x30030000 0x10000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
+ <&clk IMX8MM_CLK_SAI3_ROOT>,
+ <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai5: sai@30050000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
- reg = <0x30050000 0x10000>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
- <&clk IMX8MM_CLK_SAI5_ROOT>,
- <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai5: sai@30050000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+ reg = <0x30050000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
+ <&clk IMX8MM_CLK_SAI5_ROOT>,
+ <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai6: sai@30060000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
- reg = <0x30060000 0x10000>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
- <&clk IMX8MM_CLK_SAI6_ROOT>,
- <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai6: sai@30060000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+ reg = <0x30060000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
+ <&clk IMX8MM_CLK_SAI6_ROOT>,
+ <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- micfil: audio-controller@30080000 {
- compatible = "fsl,imx8mm-micfil";
- reg = <0x30080000 0x10000>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_PDM_IPG>,
- <&clk IMX8MM_CLK_PDM_ROOT>,
- <&clk IMX8MM_AUDIO_PLL1_OUT>,
- <&clk IMX8MM_AUDIO_PLL2_OUT>,
- <&clk IMX8MM_CLK_EXT3>;
- clock-names = "ipg_clk", "ipg_clk_app",
- "pll8k", "pll11k", "clkext3";
- dmas = <&sdma2 24 25 0x80000000>;
- dma-names = "rx";
- status = "disabled";
- };
+ micfil: audio-controller@30080000 {
+ compatible = "fsl,imx8mm-micfil";
+ reg = <0x30080000 0x10000>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_PDM_IPG>,
+ <&clk IMX8MM_CLK_PDM_ROOT>,
+ <&clk IMX8MM_AUDIO_PLL1_OUT>,
+ <&clk IMX8MM_AUDIO_PLL2_OUT>,
+ <&clk IMX8MM_CLK_EXT3>;
+ clock-names = "ipg_clk", "ipg_clk_app",
+ "pll8k", "pll11k", "clkext3";
+ dmas = <&sdma2 24 25 0x80000000>;
+ dma-names = "rx";
+ status = "disabled";
+ };
- spdif1: spdif@30090000 {
- compatible = "fsl,imx35-spdif";
- reg = <0x30090000 0x10000>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */
- <&clk IMX8MM_CLK_24M>, /* rxtx0 */
- <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */
- <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */
- <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */
- <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */
- <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */
- <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */
- <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */
- <&clk IMX8MM_CLK_DUMMY>; /* spba */
- clock-names = "core", "rxtx0",
- "rxtx1", "rxtx2",
- "rxtx3", "rxtx4",
- "rxtx5", "rxtx6",
- "rxtx7", "spba";
- dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
- dma-names = "rx", "tx";
- status = "disabled";
+ spdif1: spdif@30090000 {
+ compatible = "fsl,imx35-spdif";
+ reg = <0x30090000 0x10000>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */
+ <&clk IMX8MM_CLK_24M>, /* rxtx0 */
+ <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */
+ <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */
+ <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */
+ <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */
+ <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */
+ <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */
+ <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */
+ <&clk IMX8MM_CLK_DUMMY>; /* spba */
+ clock-names = "core", "rxtx0",
+ "rxtx1", "rxtx2",
+ "rxtx3", "rxtx4",
+ "rxtx5", "rxtx6",
+ "rxtx7", "spba";
+ dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
};
gpio1: gpio@30200000 {
@@ -660,80 +668,88 @@ aips3: bus@30800000 {
ranges = <0x30800000 0x30800000 0x400000>,
<0x8000000 0x8000000 0x10000000>;
- ecspi1: spi@30820000 {
- compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
+ bus@30800000 {
+ compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30820000 0x10000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>,
- <&clk IMX8MM_CLK_ECSPI1_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ #size-cells = <1>;
+ reg = <0x30800000 0x100000>;
+ ranges;
+
+ ecspi1: spi@30820000 {
+ compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30820000 0x10000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>,
+ <&clk IMX8MM_CLK_ECSPI1_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- ecspi2: spi@30830000 {
- compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30830000 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>,
- <&clk IMX8MM_CLK_ECSPI2_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ ecspi2: spi@30830000 {
+ compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30830000 0x10000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>,
+ <&clk IMX8MM_CLK_ECSPI2_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- ecspi3: spi@30840000 {
- compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x30840000 0x10000>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>,
- <&clk IMX8MM_CLK_ECSPI3_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ ecspi3: spi@30840000 {
+ compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x30840000 0x10000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>,
+ <&clk IMX8MM_CLK_ECSPI3_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart1: serial@30860000 {
- compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
- reg = <0x30860000 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_UART1_ROOT>,
- <&clk IMX8MM_CLK_UART1_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ uart1: serial@30860000 {
+ compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
+ reg = <0x30860000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_UART1_ROOT>,
+ <&clk IMX8MM_CLK_UART1_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart3: serial@30880000 {
- compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
- reg = <0x30880000 0x10000>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_UART3_ROOT>,
- <&clk IMX8MM_CLK_UART3_ROOT>;
- clock-names = "ipg", "per";
- dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ uart3: serial@30880000 {
+ compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
+ reg = <0x30880000 0x10000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_UART3_ROOT>,
+ <&clk IMX8MM_CLK_UART3_ROOT>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- uart2: serial@30890000 {
- compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
- reg = <0x30890000 0x10000>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MM_CLK_UART2_ROOT>,
- <&clk IMX8MM_CLK_UART2_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
+ uart2: serial@30890000 {
+ compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
+ reg = <0x30890000 0x10000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_UART2_ROOT>,
+ <&clk IMX8MM_CLK_UART2_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
};
crypto: crypto@30900000 {
--
2.28.0
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^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
2020-12-29 12:00 ` peng.fan
@ 2020-12-29 12:26 ` Adam Ford
-1 siblings, 0 replies; 22+ messages in thread
From: Adam Ford @ 2020-12-29 12:26 UTC (permalink / raw)
To: Peng Fan
Cc: Shawn Guo, Sascha Hauer, Fabio Estevam, Rob Herring, devicetree,
Linux Kernel Mailing List, Krzysztof Kozlowski, NXP Linux Team,
Sascha Hauer, arm-soc
On Tue, Dec 29, 2020 at 6:15 AM <peng.fan@nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> According to RM, there is a spba bus inside aips3 and aips1, add it.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362 +++++++++++-----------
> 1 file changed, 189 insertions(+), 173 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index c824f2615fe8..91f85b8cee9a 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -269,117 +269,125 @@ aips1: bus@30000000 {
> #size-cells = <1>;
> ranges = <0x30000000 0x30000000 0x400000>;
>
> - sai1: sai@30010000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30010000 0x10000>;
> - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
> - <&clk IMX8MM_CLK_SAI1_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + bus@30000000 {
There is already a bus@30000000 (aips1), and I think the system
doesn't like it when there are multiple busses with the same name.
There was some discussion on fixing the 8mn [1], but it doesn't look
like it went anywhere.
I am guessing the Mini will need something similar to the nano.
[1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/1607324004-12960-1-git-send-email-shengjiu.wang@nxp.com/
adam
> + compatible = "fsl,spba-bus", "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x30000000 0x100000>;
> + ranges;
> +
> + sai1: sai@30010000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30010000 0x10000>;
> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
> + <&clk IMX8MM_CLK_SAI1_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai2: sai@30020000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30020000 0x10000>;
> - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
> - <&clk IMX8MM_CLK_SAI2_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai2: sai@30020000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30020000 0x10000>;
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
> + <&clk IMX8MM_CLK_SAI2_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai3: sai@30030000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30030000 0x10000>;
> - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
> - <&clk IMX8MM_CLK_SAI3_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai3: sai@30030000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30030000 0x10000>;
> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
> + <&clk IMX8MM_CLK_SAI3_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai5: sai@30050000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30050000 0x10000>;
> - interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
> - <&clk IMX8MM_CLK_SAI5_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai5: sai@30050000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30050000 0x10000>;
> + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
> + <&clk IMX8MM_CLK_SAI5_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai6: sai@30060000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30060000 0x10000>;
> - interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
> - <&clk IMX8MM_CLK_SAI6_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai6: sai@30060000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30060000 0x10000>;
> + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
> + <&clk IMX8MM_CLK_SAI6_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - micfil: audio-controller@30080000 {
> - compatible = "fsl,imx8mm-micfil";
> - reg = <0x30080000 0x10000>;
> - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_PDM_IPG>,
> - <&clk IMX8MM_CLK_PDM_ROOT>,
> - <&clk IMX8MM_AUDIO_PLL1_OUT>,
> - <&clk IMX8MM_AUDIO_PLL2_OUT>,
> - <&clk IMX8MM_CLK_EXT3>;
> - clock-names = "ipg_clk", "ipg_clk_app",
> - "pll8k", "pll11k", "clkext3";
> - dmas = <&sdma2 24 25 0x80000000>;
> - dma-names = "rx";
> - status = "disabled";
> - };
> + micfil: audio-controller@30080000 {
> + compatible = "fsl,imx8mm-micfil";
> + reg = <0x30080000 0x10000>;
> + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_PDM_IPG>,
> + <&clk IMX8MM_CLK_PDM_ROOT>,
> + <&clk IMX8MM_AUDIO_PLL1_OUT>,
> + <&clk IMX8MM_AUDIO_PLL2_OUT>,
> + <&clk IMX8MM_CLK_EXT3>;
> + clock-names = "ipg_clk", "ipg_clk_app",
> + "pll8k", "pll11k", "clkext3";
> + dmas = <&sdma2 24 25 0x80000000>;
> + dma-names = "rx";
> + status = "disabled";
> + };
>
> - spdif1: spdif@30090000 {
> - compatible = "fsl,imx35-spdif";
> - reg = <0x30090000 0x10000>;
> - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */
> - <&clk IMX8MM_CLK_24M>, /* rxtx0 */
> - <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */
> - <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */
> - <&clk IMX8MM_CLK_DUMMY>; /* spba */
> - clock-names = "core", "rxtx0",
> - "rxtx1", "rxtx2",
> - "rxtx3", "rxtx4",
> - "rxtx5", "rxtx6",
> - "rxtx7", "spba";
> - dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> + spdif1: spdif@30090000 {
> + compatible = "fsl,imx35-spdif";
> + reg = <0x30090000 0x10000>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */
> + <&clk IMX8MM_CLK_24M>, /* rxtx0 */
> + <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */
> + <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */
> + <&clk IMX8MM_CLK_DUMMY>; /* spba */
> + clock-names = "core", "rxtx0",
> + "rxtx1", "rxtx2",
> + "rxtx3", "rxtx4",
> + "rxtx5", "rxtx6",
> + "rxtx7", "spba";
> + dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
> };
>
> gpio1: gpio@30200000 {
> @@ -660,80 +668,88 @@ aips3: bus@30800000 {
> ranges = <0x30800000 0x30800000 0x400000>,
> <0x8000000 0x8000000 0x10000000>;
>
> - ecspi1: spi@30820000 {
> - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + bus@30800000 {
> + compatible = "fsl,spba-bus", "simple-bus";
> #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x30820000 0x10000>;
> - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>,
> - <&clk IMX8MM_CLK_ECSPI1_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + #size-cells = <1>;
> + reg = <0x30800000 0x100000>;
> + ranges;
> +
> + ecspi1: spi@30820000 {
> + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x30820000 0x10000>;
> + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>,
> + <&clk IMX8MM_CLK_ECSPI1_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - ecspi2: spi@30830000 {
> - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x30830000 0x10000>;
> - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>,
> - <&clk IMX8MM_CLK_ECSPI2_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + ecspi2: spi@30830000 {
> + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x30830000 0x10000>;
> + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>,
> + <&clk IMX8MM_CLK_ECSPI2_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - ecspi3: spi@30840000 {
> - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x30840000 0x10000>;
> - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>,
> - <&clk IMX8MM_CLK_ECSPI3_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + ecspi3: spi@30840000 {
> + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x30840000 0x10000>;
> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>,
> + <&clk IMX8MM_CLK_ECSPI3_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - uart1: serial@30860000 {
> - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> - reg = <0x30860000 0x10000>;
> - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_UART1_ROOT>,
> - <&clk IMX8MM_CLK_UART1_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + uart1: serial@30860000 {
> + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> + reg = <0x30860000 0x10000>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_UART1_ROOT>,
> + <&clk IMX8MM_CLK_UART1_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - uart3: serial@30880000 {
> - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> - reg = <0x30880000 0x10000>;
> - interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_UART3_ROOT>,
> - <&clk IMX8MM_CLK_UART3_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + uart3: serial@30880000 {
> + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> + reg = <0x30880000 0x10000>;
> + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_UART3_ROOT>,
> + <&clk IMX8MM_CLK_UART3_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - uart2: serial@30890000 {
> - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> - reg = <0x30890000 0x10000>;
> - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_UART2_ROOT>,
> - <&clk IMX8MM_CLK_UART2_ROOT>;
> - clock-names = "ipg", "per";
> - status = "disabled";
> + uart2: serial@30890000 {
> + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> + reg = <0x30890000 0x10000>;
> + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_UART2_ROOT>,
> + <&clk IMX8MM_CLK_UART2_ROOT>;
> + clock-names = "ipg", "per";
> + status = "disabled";
> + };
> };
>
> crypto: crypto@30900000 {
> --
> 2.28.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
@ 2020-12-29 12:26 ` Adam Ford
0 siblings, 0 replies; 22+ messages in thread
From: Adam Ford @ 2020-12-29 12:26 UTC (permalink / raw)
To: Peng Fan
Cc: devicetree, Shawn Guo, Sascha Hauer, Linux Kernel Mailing List,
Krzysztof Kozlowski, Rob Herring, NXP Linux Team, Sascha Hauer,
Fabio Estevam, arm-soc
On Tue, Dec 29, 2020 at 6:15 AM <peng.fan@nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> According to RM, there is a spba bus inside aips3 and aips1, add it.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362 +++++++++++-----------
> 1 file changed, 189 insertions(+), 173 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index c824f2615fe8..91f85b8cee9a 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -269,117 +269,125 @@ aips1: bus@30000000 {
> #size-cells = <1>;
> ranges = <0x30000000 0x30000000 0x400000>;
>
> - sai1: sai@30010000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30010000 0x10000>;
> - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
> - <&clk IMX8MM_CLK_SAI1_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + bus@30000000 {
There is already a bus@30000000 (aips1), and I think the system
doesn't like it when there are multiple busses with the same name.
There was some discussion on fixing the 8mn [1], but it doesn't look
like it went anywhere.
I am guessing the Mini will need something similar to the nano.
[1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/1607324004-12960-1-git-send-email-shengjiu.wang@nxp.com/
adam
> + compatible = "fsl,spba-bus", "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x30000000 0x100000>;
> + ranges;
> +
> + sai1: sai@30010000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30010000 0x10000>;
> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
> + <&clk IMX8MM_CLK_SAI1_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai2: sai@30020000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30020000 0x10000>;
> - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
> - <&clk IMX8MM_CLK_SAI2_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai2: sai@30020000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30020000 0x10000>;
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
> + <&clk IMX8MM_CLK_SAI2_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai3: sai@30030000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30030000 0x10000>;
> - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
> - <&clk IMX8MM_CLK_SAI3_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai3: sai@30030000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30030000 0x10000>;
> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
> + <&clk IMX8MM_CLK_SAI3_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai5: sai@30050000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30050000 0x10000>;
> - interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
> - <&clk IMX8MM_CLK_SAI5_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai5: sai@30050000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30050000 0x10000>;
> + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
> + <&clk IMX8MM_CLK_SAI5_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai6: sai@30060000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30060000 0x10000>;
> - interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
> - <&clk IMX8MM_CLK_SAI6_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai6: sai@30060000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30060000 0x10000>;
> + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
> + <&clk IMX8MM_CLK_SAI6_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - micfil: audio-controller@30080000 {
> - compatible = "fsl,imx8mm-micfil";
> - reg = <0x30080000 0x10000>;
> - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_PDM_IPG>,
> - <&clk IMX8MM_CLK_PDM_ROOT>,
> - <&clk IMX8MM_AUDIO_PLL1_OUT>,
> - <&clk IMX8MM_AUDIO_PLL2_OUT>,
> - <&clk IMX8MM_CLK_EXT3>;
> - clock-names = "ipg_clk", "ipg_clk_app",
> - "pll8k", "pll11k", "clkext3";
> - dmas = <&sdma2 24 25 0x80000000>;
> - dma-names = "rx";
> - status = "disabled";
> - };
> + micfil: audio-controller@30080000 {
> + compatible = "fsl,imx8mm-micfil";
> + reg = <0x30080000 0x10000>;
> + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_PDM_IPG>,
> + <&clk IMX8MM_CLK_PDM_ROOT>,
> + <&clk IMX8MM_AUDIO_PLL1_OUT>,
> + <&clk IMX8MM_AUDIO_PLL2_OUT>,
> + <&clk IMX8MM_CLK_EXT3>;
> + clock-names = "ipg_clk", "ipg_clk_app",
> + "pll8k", "pll11k", "clkext3";
> + dmas = <&sdma2 24 25 0x80000000>;
> + dma-names = "rx";
> + status = "disabled";
> + };
>
> - spdif1: spdif@30090000 {
> - compatible = "fsl,imx35-spdif";
> - reg = <0x30090000 0x10000>;
> - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */
> - <&clk IMX8MM_CLK_24M>, /* rxtx0 */
> - <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */
> - <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */
> - <&clk IMX8MM_CLK_DUMMY>; /* spba */
> - clock-names = "core", "rxtx0",
> - "rxtx1", "rxtx2",
> - "rxtx3", "rxtx4",
> - "rxtx5", "rxtx6",
> - "rxtx7", "spba";
> - dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> + spdif1: spdif@30090000 {
> + compatible = "fsl,imx35-spdif";
> + reg = <0x30090000 0x10000>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */
> + <&clk IMX8MM_CLK_24M>, /* rxtx0 */
> + <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */
> + <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */
> + <&clk IMX8MM_CLK_DUMMY>; /* spba */
> + clock-names = "core", "rxtx0",
> + "rxtx1", "rxtx2",
> + "rxtx3", "rxtx4",
> + "rxtx5", "rxtx6",
> + "rxtx7", "spba";
> + dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
> };
>
> gpio1: gpio@30200000 {
> @@ -660,80 +668,88 @@ aips3: bus@30800000 {
> ranges = <0x30800000 0x30800000 0x400000>,
> <0x8000000 0x8000000 0x10000000>;
>
> - ecspi1: spi@30820000 {
> - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + bus@30800000 {
> + compatible = "fsl,spba-bus", "simple-bus";
> #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x30820000 0x10000>;
> - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>,
> - <&clk IMX8MM_CLK_ECSPI1_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + #size-cells = <1>;
> + reg = <0x30800000 0x100000>;
> + ranges;
> +
> + ecspi1: spi@30820000 {
> + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x30820000 0x10000>;
> + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>,
> + <&clk IMX8MM_CLK_ECSPI1_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - ecspi2: spi@30830000 {
> - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x30830000 0x10000>;
> - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>,
> - <&clk IMX8MM_CLK_ECSPI2_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + ecspi2: spi@30830000 {
> + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x30830000 0x10000>;
> + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>,
> + <&clk IMX8MM_CLK_ECSPI2_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - ecspi3: spi@30840000 {
> - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x30840000 0x10000>;
> - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>,
> - <&clk IMX8MM_CLK_ECSPI3_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + ecspi3: spi@30840000 {
> + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x30840000 0x10000>;
> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>,
> + <&clk IMX8MM_CLK_ECSPI3_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - uart1: serial@30860000 {
> - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> - reg = <0x30860000 0x10000>;
> - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_UART1_ROOT>,
> - <&clk IMX8MM_CLK_UART1_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + uart1: serial@30860000 {
> + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> + reg = <0x30860000 0x10000>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_UART1_ROOT>,
> + <&clk IMX8MM_CLK_UART1_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - uart3: serial@30880000 {
> - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> - reg = <0x30880000 0x10000>;
> - interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_UART3_ROOT>,
> - <&clk IMX8MM_CLK_UART3_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + uart3: serial@30880000 {
> + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> + reg = <0x30880000 0x10000>;
> + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_UART3_ROOT>,
> + <&clk IMX8MM_CLK_UART3_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - uart2: serial@30890000 {
> - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> - reg = <0x30890000 0x10000>;
> - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_UART2_ROOT>,
> - <&clk IMX8MM_CLK_UART2_ROOT>;
> - clock-names = "ipg", "per";
> - status = "disabled";
> + uart2: serial@30890000 {
> + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> + reg = <0x30890000 0x10000>;
> + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_UART2_ROOT>,
> + <&clk IMX8MM_CLK_UART2_ROOT>;
> + clock-names = "ipg", "per";
> + status = "disabled";
> + };
> };
>
> crypto: crypto@30900000 {
> --
> 2.28.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
2020-12-29 12:26 ` Adam Ford
@ 2020-12-29 16:12 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 22+ messages in thread
From: Krzysztof Kozlowski @ 2020-12-29 16:12 UTC (permalink / raw)
To: Adam Ford
Cc: Peng Fan, Shawn Guo, Sascha Hauer, Fabio Estevam, Rob Herring,
devicetree, Linux Kernel Mailing List, NXP Linux Team,
Sascha Hauer, arm-soc
On Tue, Dec 29, 2020 at 06:26:41AM -0600, Adam Ford wrote:
> On Tue, Dec 29, 2020 at 6:15 AM <peng.fan@nxp.com> wrote:
> >
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > According to RM, there is a spba bus inside aips3 and aips1, add it.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362 +++++++++++-----------
> > 1 file changed, 189 insertions(+), 173 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index c824f2615fe8..91f85b8cee9a 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -269,117 +269,125 @@ aips1: bus@30000000 {
> > #size-cells = <1>;
> > ranges = <0x30000000 0x30000000 0x400000>;
> >
> > - sai1: sai@30010000 {
> > - #sound-dai-cells = <0>;
> > - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> > - reg = <0x30010000 0x10000>;
> > - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
> > - <&clk IMX8MM_CLK_SAI1_ROOT>,
> > - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> > - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> > - dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
> > - dma-names = "rx", "tx";
> > - status = "disabled";
> > - };
> > + bus@30000000 {
>
> There is already a bus@30000000 (aips1), and I think the system
> doesn't like it when there are multiple busses with the same name.
>
> There was some discussion on fixing the 8mn [1], but it doesn't look
> like it went anywhere.
>
> I am guessing the Mini will need something similar to the nano.
>
> [1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/1607324004-12960-1-git-send-email-shengjiu.wang@nxp.com/
Several replies from S.j. Wang are missing from LKML (and maybe
patchwork?) but we reached a conclusion:
https://lore.kernel.org/linux-arm-kernel/20201208090601.GA8347@kozik-lap/
Either you do some remapping of address space or just rename the "bus"
nodes (e.g. generic bus-1 or a specific spba-bus).
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
@ 2020-12-29 16:12 ` Krzysztof Kozlowski
0 siblings, 0 replies; 22+ messages in thread
From: Krzysztof Kozlowski @ 2020-12-29 16:12 UTC (permalink / raw)
To: Adam Ford
Cc: devicetree, Peng Fan, Shawn Guo, Sascha Hauer,
Linux Kernel Mailing List, Rob Herring, NXP Linux Team,
Sascha Hauer, Fabio Estevam, arm-soc
On Tue, Dec 29, 2020 at 06:26:41AM -0600, Adam Ford wrote:
> On Tue, Dec 29, 2020 at 6:15 AM <peng.fan@nxp.com> wrote:
> >
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > According to RM, there is a spba bus inside aips3 and aips1, add it.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362 +++++++++++-----------
> > 1 file changed, 189 insertions(+), 173 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index c824f2615fe8..91f85b8cee9a 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -269,117 +269,125 @@ aips1: bus@30000000 {
> > #size-cells = <1>;
> > ranges = <0x30000000 0x30000000 0x400000>;
> >
> > - sai1: sai@30010000 {
> > - #sound-dai-cells = <0>;
> > - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> > - reg = <0x30010000 0x10000>;
> > - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
> > - <&clk IMX8MM_CLK_SAI1_ROOT>,
> > - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> > - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> > - dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
> > - dma-names = "rx", "tx";
> > - status = "disabled";
> > - };
> > + bus@30000000 {
>
> There is already a bus@30000000 (aips1), and I think the system
> doesn't like it when there are multiple busses with the same name.
>
> There was some discussion on fixing the 8mn [1], but it doesn't look
> like it went anywhere.
>
> I am guessing the Mini will need something similar to the nano.
>
> [1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/1607324004-12960-1-git-send-email-shengjiu.wang@nxp.com/
Several replies from S.j. Wang are missing from LKML (and maybe
patchwork?) but we reached a conclusion:
https://lore.kernel.org/linux-arm-kernel/20201208090601.GA8347@kozik-lap/
Either you do some remapping of address space or just rename the "bus"
nodes (e.g. generic bus-1 or a specific spba-bus).
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread* RE: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
2020-12-29 16:12 ` Krzysztof Kozlowski
@ 2020-12-30 2:34 ` Peng Fan
-1 siblings, 0 replies; 22+ messages in thread
From: Peng Fan @ 2020-12-30 2:34 UTC (permalink / raw)
To: Krzysztof Kozlowski, Adam Ford, S.j. Wang
Cc: Shawn Guo, Sascha Hauer, Fabio Estevam, Rob Herring, devicetree,
Linux Kernel Mailing List, dl-linux-imx, Sascha Hauer, arm-soc
> Subject: Re: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
>
> On Tue, Dec 29, 2020 at 06:26:41AM -0600, Adam Ford wrote:
> > On Tue, Dec 29, 2020 at 6:15 AM <peng.fan@nxp.com> wrote:
> > >
> > > From: Peng Fan <peng.fan@nxp.com>
> > >
> > > According to RM, there is a spba bus inside aips3 and aips1, add it.
> > >
> > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > ---
> > > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362
> > > +++++++++++-----------
> > > 1 file changed, 189 insertions(+), 173 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > index c824f2615fe8..91f85b8cee9a 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > @@ -269,117 +269,125 @@ aips1: bus@30000000 {
> > > #size-cells = <1>;
> > > ranges = <0x30000000 0x30000000
> 0x400000>;
> > >
> > > - sai1: sai@30010000 {
> > > - #sound-dai-cells = <0>;
> > > - compatible = "fsl,imx8mm-sai",
> "fsl,imx8mq-sai";
> > > - reg = <0x30010000 0x10000>;
> > > - interrupts = <GIC_SPI 95
> IRQ_TYPE_LEVEL_HIGH>;
> > > - clocks = <&clk
> IMX8MM_CLK_SAI1_IPG>,
> > > - <&clk
> IMX8MM_CLK_SAI1_ROOT>,
> > > - <&clk
> IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> > > - clock-names = "bus", "mclk1",
> "mclk2", "mclk3";
> > > - dmas = <&sdma2 0 2 0>, <&sdma2
> 1 2 0>;
> > > - dma-names = "rx", "tx";
> > > - status = "disabled";
> > > - };
> > > + bus@30000000 {
> >
> > There is already a bus@30000000 (aips1), and I think the system
> > doesn't like it when there are multiple busses with the same name.
> >
> > There was some discussion on fixing the 8mn [1], but it doesn't look
> > like it went anywhere.
> >
> > I am guessing the Mini will need something similar to the nano.
> >
> > [1] -
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
> hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F1607324004-1
> 29
> >
> 60-1-git-send-email-shengjiu.wang%40nxp.com%2F&data=04%7C01%7
> Cpeng
> > .fan%40nxp.com%7C970d320f3ef7413296ed08d8ac1486f9%7C686ea1d3bc
> 2b4c6fa9
> >
> 2cd99c5c301635%7C0%7C0%7C637448551481206715%7CUnknown%7CTW
> FpbGZsb3d8ey
> >
> JWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D
> %7C200
> >
> 0&sdata=xKgYHCDyitbUyTPKVuwQV%2FCoJvepCbdBJ1MD9vP%2B6MY
> %3D&res
> > erved=0
>
> Several replies from S.j. Wang are missing from LKML (and maybe
> patchwork?) but we reached a conclusion:
Thanks for the pointing, I'll give a look. If S.J take it, I'll leave it to S.J.
Thanks,
Peng.
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.ke
> rnel.org%2Flinux-arm-kernel%2F20201208090601.GA8347%40kozik-lap%2F&
> amp;data=04%7C01%7Cpeng.fan%40nxp.com%7C970d320f3ef7413296ed08
> d8ac1486f9%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63744
> 8551481206715%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiL
> CJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C2000&sdata=nk
> t0J5RtzA%2B29nK4aPnd434FNQV8MUZ%2F8Aq64o6hl6I%3D&reserved
> =0
>
> Either you do some remapping of address space or just rename the "bus"
> nodes (e.g. generic bus-1 or a specific spba-bus).
>
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 22+ messages in thread* RE: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
@ 2020-12-30 2:34 ` Peng Fan
0 siblings, 0 replies; 22+ messages in thread
From: Peng Fan @ 2020-12-30 2:34 UTC (permalink / raw)
To: Krzysztof Kozlowski, Adam Ford, S.j. Wang
Cc: devicetree, Shawn Guo, Sascha Hauer, Linux Kernel Mailing List,
Rob Herring, dl-linux-imx, Sascha Hauer, Fabio Estevam, arm-soc
> Subject: Re: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
>
> On Tue, Dec 29, 2020 at 06:26:41AM -0600, Adam Ford wrote:
> > On Tue, Dec 29, 2020 at 6:15 AM <peng.fan@nxp.com> wrote:
> > >
> > > From: Peng Fan <peng.fan@nxp.com>
> > >
> > > According to RM, there is a spba bus inside aips3 and aips1, add it.
> > >
> > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > ---
> > > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362
> > > +++++++++++-----------
> > > 1 file changed, 189 insertions(+), 173 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > index c824f2615fe8..91f85b8cee9a 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > @@ -269,117 +269,125 @@ aips1: bus@30000000 {
> > > #size-cells = <1>;
> > > ranges = <0x30000000 0x30000000
> 0x400000>;
> > >
> > > - sai1: sai@30010000 {
> > > - #sound-dai-cells = <0>;
> > > - compatible = "fsl,imx8mm-sai",
> "fsl,imx8mq-sai";
> > > - reg = <0x30010000 0x10000>;
> > > - interrupts = <GIC_SPI 95
> IRQ_TYPE_LEVEL_HIGH>;
> > > - clocks = <&clk
> IMX8MM_CLK_SAI1_IPG>,
> > > - <&clk
> IMX8MM_CLK_SAI1_ROOT>,
> > > - <&clk
> IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> > > - clock-names = "bus", "mclk1",
> "mclk2", "mclk3";
> > > - dmas = <&sdma2 0 2 0>, <&sdma2
> 1 2 0>;
> > > - dma-names = "rx", "tx";
> > > - status = "disabled";
> > > - };
> > > + bus@30000000 {
> >
> > There is already a bus@30000000 (aips1), and I think the system
> > doesn't like it when there are multiple busses with the same name.
> >
> > There was some discussion on fixing the 8mn [1], but it doesn't look
> > like it went anywhere.
> >
> > I am guessing the Mini will need something similar to the nano.
> >
> > [1] -
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
> hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F1607324004-1
> 29
> >
> 60-1-git-send-email-shengjiu.wang%40nxp.com%2F&data=04%7C01%7
> Cpeng
> > .fan%40nxp.com%7C970d320f3ef7413296ed08d8ac1486f9%7C686ea1d3bc
> 2b4c6fa9
> >
> 2cd99c5c301635%7C0%7C0%7C637448551481206715%7CUnknown%7CTW
> FpbGZsb3d8ey
> >
> JWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D
> %7C200
> >
> 0&sdata=xKgYHCDyitbUyTPKVuwQV%2FCoJvepCbdBJ1MD9vP%2B6MY
> %3D&res
> > erved=0
>
> Several replies from S.j. Wang are missing from LKML (and maybe
> patchwork?) but we reached a conclusion:
Thanks for the pointing, I'll give a look. If S.J take it, I'll leave it to S.J.
Thanks,
Peng.
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.ke
> rnel.org%2Flinux-arm-kernel%2F20201208090601.GA8347%40kozik-lap%2F&
> amp;data=04%7C01%7Cpeng.fan%40nxp.com%7C970d320f3ef7413296ed08
> d8ac1486f9%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63744
> 8551481206715%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiL
> CJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C2000&sdata=nk
> t0J5RtzA%2B29nK4aPnd434FNQV8MUZ%2F8Aq64o6hl6I%3D&reserved
> =0
>
> Either you do some remapping of address space or just rename the "bus"
> nodes (e.g. generic bus-1 or a specific spba-bus).
>
> Best regards,
> Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
2020-12-30 2:34 ` Peng Fan
@ 2021-03-31 18:23 ` Adam Ford
-1 siblings, 0 replies; 22+ messages in thread
From: Adam Ford @ 2021-03-31 18:23 UTC (permalink / raw)
To: Peng Fan
Cc: Krzysztof Kozlowski, S.j. Wang, Shawn Guo, Sascha Hauer,
Fabio Estevam, Rob Herring, devicetree,
Linux Kernel Mailing List, dl-linux-imx, Sascha Hauer, arm-soc
On Tue, Dec 29, 2020 at 8:34 PM Peng Fan <peng.fan@nxp.com> wrote:
>
> > Subject: Re: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
> >
> > On Tue, Dec 29, 2020 at 06:26:41AM -0600, Adam Ford wrote:
> > > On Tue, Dec 29, 2020 at 6:15 AM <peng.fan@nxp.com> wrote:
> > > >
> > > > From: Peng Fan <peng.fan@nxp.com>
> > > >
> > > > According to RM, there is a spba bus inside aips3 and aips1, add it.
> > > >
> > > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > > ---
> > > > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362
> > > > +++++++++++-----------
> > > > 1 file changed, 189 insertions(+), 173 deletions(-)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > index c824f2615fe8..91f85b8cee9a 100644
> > > > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > @@ -269,117 +269,125 @@ aips1: bus@30000000 {
> > > > #size-cells = <1>;
> > > > ranges = <0x30000000 0x30000000
> > 0x400000>;
> > > >
> > > > - sai1: sai@30010000 {
> > > > - #sound-dai-cells = <0>;
> > > > - compatible = "fsl,imx8mm-sai",
> > "fsl,imx8mq-sai";
> > > > - reg = <0x30010000 0x10000>;
> > > > - interrupts = <GIC_SPI 95
> > IRQ_TYPE_LEVEL_HIGH>;
> > > > - clocks = <&clk
> > IMX8MM_CLK_SAI1_IPG>,
> > > > - <&clk
> > IMX8MM_CLK_SAI1_ROOT>,
> > > > - <&clk
> > IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> > > > - clock-names = "bus", "mclk1",
> > "mclk2", "mclk3";
> > > > - dmas = <&sdma2 0 2 0>, <&sdma2
> > 1 2 0>;
> > > > - dma-names = "rx", "tx";
> > > > - status = "disabled";
> > > > - };
> > > > + bus@30000000 {
> > >
> > > There is already a bus@30000000 (aips1), and I think the system
> > > doesn't like it when there are multiple busses with the same name.
> > >
> > > There was some discussion on fixing the 8mn [1], but it doesn't look
> > > like it went anywhere.
> > >
> > > I am guessing the Mini will need something similar to the nano.
> > >
> > > [1] -
> > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> > >
> > hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F1607324004-1
> > 29
> > >
> > 60-1-git-send-email-shengjiu.wang%40nxp.com%2F&data=04%7C01%7
> > Cpeng
> > > .fan%40nxp.com%7C970d320f3ef7413296ed08d8ac1486f9%7C686ea1d3bc
> > 2b4c6fa9
> > >
> > 2cd99c5c301635%7C0%7C0%7C637448551481206715%7CUnknown%7CTW
> > FpbGZsb3d8ey
> > >
> > JWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D
> > %7C200
> > >
> > 0&sdata=xKgYHCDyitbUyTPKVuwQV%2FCoJvepCbdBJ1MD9vP%2B6MY
> > %3D&res
> > > erved=0
> >
> > Several replies from S.j. Wang are missing from LKML (and maybe
> > patchwork?) but we reached a conclusion:
>
> Thanks for the pointing, I'll give a look. If S.J take it, I'll leave it to S.J.
Peng or S.J,
I don't see this was ever finished. On the Nano, there is an spba-bus
under the aips1 bus, but I am not seeing anything on aips3 yet. It
appears to have been abandoned. The NXP kernel doesn't show either
spba-bus on the imx8m Mini either, but the documentation for the Mini
makes it look like it should work. Do you want me to submit a patch
for any of this?
adam
>
> Thanks,
> Peng.
>
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.ke
> > rnel.org%2Flinux-arm-kernel%2F20201208090601.GA8347%40kozik-lap%2F&
> > amp;data=04%7C01%7Cpeng.fan%40nxp.com%7C970d320f3ef7413296ed08
> > d8ac1486f9%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63744
> > 8551481206715%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiL
> > CJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C2000&sdata=nk
> > t0J5RtzA%2B29nK4aPnd434FNQV8MUZ%2F8Aq64o6hl6I%3D&reserved
> > =0
> >
> > Either you do some remapping of address space or just rename the "bus"
> > nodes (e.g. generic bus-1 or a specific spba-bus).
> >
> > Best regards,
> > Krzysztof
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
@ 2021-03-31 18:23 ` Adam Ford
0 siblings, 0 replies; 22+ messages in thread
From: Adam Ford @ 2021-03-31 18:23 UTC (permalink / raw)
To: Peng Fan
Cc: Krzysztof Kozlowski, S.j. Wang, Shawn Guo, Sascha Hauer,
Fabio Estevam, Rob Herring, devicetree,
Linux Kernel Mailing List, dl-linux-imx, Sascha Hauer, arm-soc
On Tue, Dec 29, 2020 at 8:34 PM Peng Fan <peng.fan@nxp.com> wrote:
>
> > Subject: Re: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
> >
> > On Tue, Dec 29, 2020 at 06:26:41AM -0600, Adam Ford wrote:
> > > On Tue, Dec 29, 2020 at 6:15 AM <peng.fan@nxp.com> wrote:
> > > >
> > > > From: Peng Fan <peng.fan@nxp.com>
> > > >
> > > > According to RM, there is a spba bus inside aips3 and aips1, add it.
> > > >
> > > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > > ---
> > > > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362
> > > > +++++++++++-----------
> > > > 1 file changed, 189 insertions(+), 173 deletions(-)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > index c824f2615fe8..91f85b8cee9a 100644
> > > > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > @@ -269,117 +269,125 @@ aips1: bus@30000000 {
> > > > #size-cells = <1>;
> > > > ranges = <0x30000000 0x30000000
> > 0x400000>;
> > > >
> > > > - sai1: sai@30010000 {
> > > > - #sound-dai-cells = <0>;
> > > > - compatible = "fsl,imx8mm-sai",
> > "fsl,imx8mq-sai";
> > > > - reg = <0x30010000 0x10000>;
> > > > - interrupts = <GIC_SPI 95
> > IRQ_TYPE_LEVEL_HIGH>;
> > > > - clocks = <&clk
> > IMX8MM_CLK_SAI1_IPG>,
> > > > - <&clk
> > IMX8MM_CLK_SAI1_ROOT>,
> > > > - <&clk
> > IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> > > > - clock-names = "bus", "mclk1",
> > "mclk2", "mclk3";
> > > > - dmas = <&sdma2 0 2 0>, <&sdma2
> > 1 2 0>;
> > > > - dma-names = "rx", "tx";
> > > > - status = "disabled";
> > > > - };
> > > > + bus@30000000 {
> > >
> > > There is already a bus@30000000 (aips1), and I think the system
> > > doesn't like it when there are multiple busses with the same name.
> > >
> > > There was some discussion on fixing the 8mn [1], but it doesn't look
> > > like it went anywhere.
> > >
> > > I am guessing the Mini will need something similar to the nano.
> > >
> > > [1] -
> > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> > >
> > hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F1607324004-1
> > 29
> > >
> > 60-1-git-send-email-shengjiu.wang%40nxp.com%2F&data=04%7C01%7
> > Cpeng
> > > .fan%40nxp.com%7C970d320f3ef7413296ed08d8ac1486f9%7C686ea1d3bc
> > 2b4c6fa9
> > >
> > 2cd99c5c301635%7C0%7C0%7C637448551481206715%7CUnknown%7CTW
> > FpbGZsb3d8ey
> > >
> > JWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D
> > %7C200
> > >
> > 0&sdata=xKgYHCDyitbUyTPKVuwQV%2FCoJvepCbdBJ1MD9vP%2B6MY
> > %3D&res
> > > erved=0
> >
> > Several replies from S.j. Wang are missing from LKML (and maybe
> > patchwork?) but we reached a conclusion:
>
> Thanks for the pointing, I'll give a look. If S.J take it, I'll leave it to S.J.
Peng or S.J,
I don't see this was ever finished. On the Nano, there is an spba-bus
under the aips1 bus, but I am not seeing anything on aips3 yet. It
appears to have been abandoned. The NXP kernel doesn't show either
spba-bus on the imx8m Mini either, but the documentation for the Mini
makes it look like it should work. Do you want me to submit a patch
for any of this?
adam
>
> Thanks,
> Peng.
>
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.ke
> > rnel.org%2Flinux-arm-kernel%2F20201208090601.GA8347%40kozik-lap%2F&
> > amp;data=04%7C01%7Cpeng.fan%40nxp.com%7C970d320f3ef7413296ed08
> > d8ac1486f9%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63744
> > 8551481206715%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiL
> > CJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C2000&sdata=nk
> > t0J5RtzA%2B29nK4aPnd434FNQV8MUZ%2F8Aq64o6hl6I%3D&reserved
> > =0
> >
> > Either you do some remapping of address space or just rename the "bus"
> > nodes (e.g. generic bus-1 or a specific spba-bus).
> >
> > Best regards,
> > Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 3/4] arm64: dts: imx8mn: add spba bus node
2020-12-29 12:00 ` peng.fan
@ 2020-12-29 12:00 ` peng.fan
-1 siblings, 0 replies; 22+ messages in thread
From: peng.fan @ 2020-12-29 12:00 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam, robh+dt
Cc: kernel, linux-imx, linux-arm-kernel, linux-kernel, devicetree,
krzk, Peng Fan
From: Peng Fan <peng.fan@nxp.com>
According to RM, there is a spba bus inside aips3 and aips1, add it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 73602832ccaa..033fa90570ff 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -749,7 +749,7 @@ uart2: serial@30890000 {
clock-names = "ipg", "per";
status = "disabled";
};
- }
+ };
crypto: crypto@30900000 {
compatible = "fsl,sec-v4.0";
--
2.28.0
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH 3/4] arm64: dts: imx8mn: add spba bus node
@ 2020-12-29 12:00 ` peng.fan
0 siblings, 0 replies; 22+ messages in thread
From: peng.fan @ 2020-12-29 12:00 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam, robh+dt
Cc: devicetree, Peng Fan, linux-kernel, krzk, linux-imx, kernel,
linux-arm-kernel
From: Peng Fan <peng.fan@nxp.com>
According to RM, there is a spba bus inside aips3 and aips1, add it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 73602832ccaa..033fa90570ff 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -749,7 +749,7 @@ uart2: serial@30890000 {
clock-names = "ipg", "per";
status = "disabled";
};
- }
+ };
crypto: crypto@30900000 {
compatible = "fsl,sec-v4.0";
--
2.28.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH 3/4] arm64: dts: imx8mn: add spba bus node
2020-12-29 12:00 ` peng.fan
@ 2020-12-29 16:13 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 22+ messages in thread
From: Krzysztof Kozlowski @ 2020-12-29 16:13 UTC (permalink / raw)
To: peng.fan
Cc: shawnguo, s.hauer, festevam, robh+dt, kernel, linux-imx,
linux-arm-kernel, linux-kernel, devicetree
On Tue, Dec 29, 2020 at 08:00:44PM +0800, peng.fan@nxp.com wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> According to RM, there is a spba bus inside aips3 and aips1, add it.
This does not look like matching contents of commit.
Best regards,
Krzysztof
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 73602832ccaa..033fa90570ff 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -749,7 +749,7 @@ uart2: serial@30890000 {
> clock-names = "ipg", "per";
> status = "disabled";
> };
> - }
> + };
>
> crypto: crypto@30900000 {
> compatible = "fsl,sec-v4.0";
> --
> 2.28.0
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 3/4] arm64: dts: imx8mn: add spba bus node
@ 2020-12-29 16:13 ` Krzysztof Kozlowski
0 siblings, 0 replies; 22+ messages in thread
From: Krzysztof Kozlowski @ 2020-12-29 16:13 UTC (permalink / raw)
To: peng.fan
Cc: devicetree, shawnguo, s.hauer, linux-kernel, robh+dt, linux-imx,
kernel, festevam, linux-arm-kernel
On Tue, Dec 29, 2020 at 08:00:44PM +0800, peng.fan@nxp.com wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> According to RM, there is a spba bus inside aips3 and aips1, add it.
This does not look like matching contents of commit.
Best regards,
Krzysztof
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 73602832ccaa..033fa90570ff 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -749,7 +749,7 @@ uart2: serial@30890000 {
> clock-names = "ipg", "per";
> status = "disabled";
> };
> - }
> + };
>
> crypto: crypto@30900000 {
> compatible = "fsl,sec-v4.0";
> --
> 2.28.0
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread* RE: [PATCH 3/4] arm64: dts: imx8mn: add spba bus node
2020-12-29 16:13 ` Krzysztof Kozlowski
@ 2020-12-30 2:32 ` Peng Fan
-1 siblings, 0 replies; 22+ messages in thread
From: Peng Fan @ 2020-12-30 2:32 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: shawnguo, s.hauer, festevam, robh+dt, kernel, dl-linux-imx,
linux-arm-kernel, linux-kernel, devicetree
> Subject: Re: [PATCH 3/4] arm64: dts: imx8mn: add spba bus node
>
> On Tue, Dec 29, 2020 at 08:00:44PM +0800, peng.fan@nxp.com wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > According to RM, there is a spba bus inside aips3 and aips1, add it.
>
> This does not look like matching contents of commit.
Posted in a rush. Forgot to squash commits.
Thanks,
Peng.
>
> Best regards,
> Krzysztof
>
>
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > index 73602832ccaa..033fa90570ff 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > @@ -749,7 +749,7 @@ uart2: serial@30890000 {
> > clock-names = "ipg", "per";
> > status = "disabled";
> > };
> > - }
> > + };
> >
> > crypto: crypto@30900000 {
> > compatible = "fsl,sec-v4.0";
> > --
> > 2.28.0
> >
^ permalink raw reply [flat|nested] 22+ messages in thread* RE: [PATCH 3/4] arm64: dts: imx8mn: add spba bus node
@ 2020-12-30 2:32 ` Peng Fan
0 siblings, 0 replies; 22+ messages in thread
From: Peng Fan @ 2020-12-30 2:32 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: devicetree, shawnguo, s.hauer, linux-kernel, robh+dt,
dl-linux-imx, kernel, festevam, linux-arm-kernel
> Subject: Re: [PATCH 3/4] arm64: dts: imx8mn: add spba bus node
>
> On Tue, Dec 29, 2020 at 08:00:44PM +0800, peng.fan@nxp.com wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > According to RM, there is a spba bus inside aips3 and aips1, add it.
>
> This does not look like matching contents of commit.
Posted in a rush. Forgot to squash commits.
Thanks,
Peng.
>
> Best regards,
> Krzysztof
>
>
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > index 73602832ccaa..033fa90570ff 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > @@ -749,7 +749,7 @@ uart2: serial@30890000 {
> > clock-names = "ipg", "per";
> > status = "disabled";
> > };
> > - }
> > + };
> >
> > crypto: crypto@30900000 {
> > compatible = "fsl,sec-v4.0";
> > --
> > 2.28.0
> >
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 4/4] arm64: dts: imx8mq: add spba bus node
2020-12-29 12:00 ` peng.fan
@ 2020-12-29 12:00 ` peng.fan
-1 siblings, 0 replies; 22+ messages in thread
From: peng.fan @ 2020-12-29 12:00 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam, robh+dt
Cc: kernel, linux-imx, linux-arm-kernel, linux-kernel, devicetree,
krzk, Peng Fan
From: Peng Fan <peng.fan@nxp.com>
According to RM, there is a spba bus inside aips3 and aips1, add it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 386 +++++++++++-----------
1 file changed, 201 insertions(+), 185 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index a841a023e8e0..d043d8474314 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -299,60 +299,68 @@ bus@30000000 { /* AIPS1 */
#size-cells = <1>;
ranges = <0x30000000 0x30000000 0x400000>;
- sai1: sai@30010000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x30010000 0x10000>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI1_IPG>,
- <&clk IMX8MQ_CLK_SAI1_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 8 24 0>, <&sdma1 9 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ bus@30000000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30000000 0x100000>;
+ ranges;
+
+ sai1: sai@30010000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x30010000 0x10000>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI1_IPG>,
+ <&clk IMX8MQ_CLK_SAI1_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 8 24 0>, <&sdma1 9 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai6: sai@30030000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x30030000 0x10000>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI6_IPG>,
- <&clk IMX8MQ_CLK_SAI6_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 4 24 0>, <&sdma2 5 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai6: sai@30030000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x30030000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI6_IPG>,
+ <&clk IMX8MQ_CLK_SAI6_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 4 24 0>, <&sdma2 5 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai5: sai@30040000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x30040000 0x10000>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI5_IPG>,
- <&clk IMX8MQ_CLK_SAI5_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 2 24 0>, <&sdma2 3 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai5: sai@30040000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x30040000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI5_IPG>,
+ <&clk IMX8MQ_CLK_SAI5_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 2 24 0>, <&sdma2 3 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai4: sai@30050000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x30050000 0x10000>;
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI4_IPG>,
- <&clk IMX8MQ_CLK_SAI4_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 0 24 0>, <&sdma2 1 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
+ sai4: sai@30050000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x30050000 0x10000>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI4_IPG>,
+ <&clk IMX8MQ_CLK_SAI4_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 0 24 0>, <&sdma2 1 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
};
gpio1: gpio@30200000 {
@@ -793,149 +801,157 @@ bus@30800000 { /* AIPS3 */
ranges = <0x30800000 0x30800000 0x400000>,
<0x08000000 0x08000000 0x10000000>;
- spdif1: spdif@30810000 {
- compatible = "fsl,imx35-spdif";
- reg = <0x30810000 0x10000>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
- <&clk IMX8MQ_CLK_25M>, /* rxtx0 */
- <&clk IMX8MQ_CLK_SPDIF1>, /* rxtx1 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
- <&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
- <&clk IMX8MQ_CLK_DUMMY>; /* spba */
- clock-names = "core", "rxtx0",
- "rxtx1", "rxtx2",
- "rxtx3", "rxtx4",
- "rxtx5", "rxtx6",
- "rxtx7", "spba";
- dmas = <&sdma1 8 18 0>, <&sdma1 9 18 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- ecspi1: spi@30820000 {
+ bus@30800000 {
+ compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
- reg = <0x30820000 0x10000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,
- <&clk IMX8MQ_CLK_ECSPI1_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ #size-cells = <1>;
+ reg = <0x30800000 0x100000>;
+ ranges;
+
+ spdif1: spdif@30810000 {
+ compatible = "fsl,imx35-spdif";
+ reg = <0x30810000 0x10000>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
+ <&clk IMX8MQ_CLK_25M>, /* rxtx0 */
+ <&clk IMX8MQ_CLK_SPDIF1>, /* rxtx1 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
+ <&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
+ <&clk IMX8MQ_CLK_DUMMY>; /* spba */
+ clock-names = "core", "rxtx0",
+ "rxtx1", "rxtx2",
+ "rxtx3", "rxtx4",
+ "rxtx5", "rxtx6",
+ "rxtx7", "spba";
+ dmas = <&sdma1 8 18 0>, <&sdma1 9 18 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- ecspi2: spi@30830000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
- reg = <0x30830000 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,
- <&clk IMX8MQ_CLK_ECSPI2_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ ecspi1: spi@30820000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30820000 0x10000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI1_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- ecspi3: spi@30840000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
- reg = <0x30840000 0x10000>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,
- <&clk IMX8MQ_CLK_ECSPI3_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ ecspi2: spi@30830000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30830000 0x10000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI2_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- uart1: serial@30860000 {
- compatible = "fsl,imx8mq-uart",
- "fsl,imx6q-uart";
- reg = <0x30860000 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_UART1_ROOT>,
- <&clk IMX8MQ_CLK_UART1_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ ecspi3: spi@30840000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30840000 0x10000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI3_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- uart3: serial@30880000 {
- compatible = "fsl,imx8mq-uart",
- "fsl,imx6q-uart";
- reg = <0x30880000 0x10000>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
- <&clk IMX8MQ_CLK_UART3_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ uart1: serial@30860000 {
+ compatible = "fsl,imx8mq-uart",
+ "fsl,imx6q-uart";
+ reg = <0x30860000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_UART1_ROOT>,
+ <&clk IMX8MQ_CLK_UART1_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- uart2: serial@30890000 {
- compatible = "fsl,imx8mq-uart",
- "fsl,imx6q-uart";
- reg = <0x30890000 0x10000>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
- <&clk IMX8MQ_CLK_UART2_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ uart3: serial@30880000 {
+ compatible = "fsl,imx8mq-uart",
+ "fsl,imx6q-uart";
+ reg = <0x30880000 0x10000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
+ <&clk IMX8MQ_CLK_UART3_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- spdif2: spdif@308a0000 {
- compatible = "fsl,imx35-spdif";
- reg = <0x308a0000 0x10000>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
- <&clk IMX8MQ_CLK_25M>, /* rxtx0 */
- <&clk IMX8MQ_CLK_SPDIF2>, /* rxtx1 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
- <&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
- <&clk IMX8MQ_CLK_DUMMY>; /* spba */
- clock-names = "core", "rxtx0",
- "rxtx1", "rxtx2",
- "rxtx3", "rxtx4",
- "rxtx5", "rxtx6",
- "rxtx7", "spba";
- dmas = <&sdma1 16 18 0>, <&sdma1 17 18 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ uart2: serial@30890000 {
+ compatible = "fsl,imx8mq-uart",
+ "fsl,imx6q-uart";
+ reg = <0x30890000 0x10000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
+ <&clk IMX8MQ_CLK_UART2_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- sai2: sai@308b0000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x308b0000 0x10000>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI2_IPG>,
- <&clk IMX8MQ_CLK_SAI2_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma1 10 24 0>, <&sdma1 11 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ spdif2: spdif@308a0000 {
+ compatible = "fsl,imx35-spdif";
+ reg = <0x308a0000 0x10000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
+ <&clk IMX8MQ_CLK_25M>, /* rxtx0 */
+ <&clk IMX8MQ_CLK_SPDIF2>, /* rxtx1 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
+ <&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
+ <&clk IMX8MQ_CLK_DUMMY>; /* spba */
+ clock-names = "core", "rxtx0",
+ "rxtx1", "rxtx2",
+ "rxtx3", "rxtx4",
+ "rxtx5", "rxtx6",
+ "rxtx7", "spba";
+ dmas = <&sdma1 16 18 0>, <&sdma1 17 18 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai3: sai@308c0000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x308c0000 0x10000>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI3_IPG>,
- <&clk IMX8MQ_CLK_SAI3_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma1 12 24 0>, <&sdma1 13 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
+ sai2: sai@308b0000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x308b0000 0x10000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI2_IPG>,
+ <&clk IMX8MQ_CLK_SAI2_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma1 10 24 0>, <&sdma1 11 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai3: sai@308c0000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x308c0000 0x10000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI3_IPG>,
+ <&clk IMX8MQ_CLK_SAI3_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma1 12 24 0>, <&sdma1 13 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
};
crypto: crypto@30900000 {
--
2.28.0
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH 4/4] arm64: dts: imx8mq: add spba bus node
@ 2020-12-29 12:00 ` peng.fan
0 siblings, 0 replies; 22+ messages in thread
From: peng.fan @ 2020-12-29 12:00 UTC (permalink / raw)
To: shawnguo, s.hauer, festevam, robh+dt
Cc: devicetree, Peng Fan, linux-kernel, krzk, linux-imx, kernel,
linux-arm-kernel
From: Peng Fan <peng.fan@nxp.com>
According to RM, there is a spba bus inside aips3 and aips1, add it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 386 +++++++++++-----------
1 file changed, 201 insertions(+), 185 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index a841a023e8e0..d043d8474314 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -299,60 +299,68 @@ bus@30000000 { /* AIPS1 */
#size-cells = <1>;
ranges = <0x30000000 0x30000000 0x400000>;
- sai1: sai@30010000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x30010000 0x10000>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI1_IPG>,
- <&clk IMX8MQ_CLK_SAI1_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 8 24 0>, <&sdma1 9 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ bus@30000000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30000000 0x100000>;
+ ranges;
+
+ sai1: sai@30010000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x30010000 0x10000>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI1_IPG>,
+ <&clk IMX8MQ_CLK_SAI1_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 8 24 0>, <&sdma1 9 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai6: sai@30030000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x30030000 0x10000>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI6_IPG>,
- <&clk IMX8MQ_CLK_SAI6_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 4 24 0>, <&sdma2 5 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai6: sai@30030000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x30030000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI6_IPG>,
+ <&clk IMX8MQ_CLK_SAI6_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 4 24 0>, <&sdma2 5 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai5: sai@30040000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x30040000 0x10000>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI5_IPG>,
- <&clk IMX8MQ_CLK_SAI5_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 2 24 0>, <&sdma2 3 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ sai5: sai@30040000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x30040000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI5_IPG>,
+ <&clk IMX8MQ_CLK_SAI5_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 2 24 0>, <&sdma2 3 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai4: sai@30050000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x30050000 0x10000>;
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI4_IPG>,
- <&clk IMX8MQ_CLK_SAI4_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma2 0 24 0>, <&sdma2 1 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
+ sai4: sai@30050000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x30050000 0x10000>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI4_IPG>,
+ <&clk IMX8MQ_CLK_SAI4_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 0 24 0>, <&sdma2 1 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
};
gpio1: gpio@30200000 {
@@ -793,149 +801,157 @@ bus@30800000 { /* AIPS3 */
ranges = <0x30800000 0x30800000 0x400000>,
<0x08000000 0x08000000 0x10000000>;
- spdif1: spdif@30810000 {
- compatible = "fsl,imx35-spdif";
- reg = <0x30810000 0x10000>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
- <&clk IMX8MQ_CLK_25M>, /* rxtx0 */
- <&clk IMX8MQ_CLK_SPDIF1>, /* rxtx1 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
- <&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
- <&clk IMX8MQ_CLK_DUMMY>; /* spba */
- clock-names = "core", "rxtx0",
- "rxtx1", "rxtx2",
- "rxtx3", "rxtx4",
- "rxtx5", "rxtx6",
- "rxtx7", "spba";
- dmas = <&sdma1 8 18 0>, <&sdma1 9 18 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- ecspi1: spi@30820000 {
+ bus@30800000 {
+ compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
- reg = <0x30820000 0x10000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,
- <&clk IMX8MQ_CLK_ECSPI1_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ #size-cells = <1>;
+ reg = <0x30800000 0x100000>;
+ ranges;
+
+ spdif1: spdif@30810000 {
+ compatible = "fsl,imx35-spdif";
+ reg = <0x30810000 0x10000>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
+ <&clk IMX8MQ_CLK_25M>, /* rxtx0 */
+ <&clk IMX8MQ_CLK_SPDIF1>, /* rxtx1 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
+ <&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
+ <&clk IMX8MQ_CLK_DUMMY>; /* spba */
+ clock-names = "core", "rxtx0",
+ "rxtx1", "rxtx2",
+ "rxtx3", "rxtx4",
+ "rxtx5", "rxtx6",
+ "rxtx7", "spba";
+ dmas = <&sdma1 8 18 0>, <&sdma1 9 18 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- ecspi2: spi@30830000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
- reg = <0x30830000 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,
- <&clk IMX8MQ_CLK_ECSPI2_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ ecspi1: spi@30820000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30820000 0x10000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI1_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- ecspi3: spi@30840000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
- reg = <0x30840000 0x10000>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,
- <&clk IMX8MQ_CLK_ECSPI3_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ ecspi2: spi@30830000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30830000 0x10000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI2_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- uart1: serial@30860000 {
- compatible = "fsl,imx8mq-uart",
- "fsl,imx6q-uart";
- reg = <0x30860000 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_UART1_ROOT>,
- <&clk IMX8MQ_CLK_UART1_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ ecspi3: spi@30840000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30840000 0x10000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI3_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- uart3: serial@30880000 {
- compatible = "fsl,imx8mq-uart",
- "fsl,imx6q-uart";
- reg = <0x30880000 0x10000>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
- <&clk IMX8MQ_CLK_UART3_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ uart1: serial@30860000 {
+ compatible = "fsl,imx8mq-uart",
+ "fsl,imx6q-uart";
+ reg = <0x30860000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_UART1_ROOT>,
+ <&clk IMX8MQ_CLK_UART1_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- uart2: serial@30890000 {
- compatible = "fsl,imx8mq-uart",
- "fsl,imx6q-uart";
- reg = <0x30890000 0x10000>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
- <&clk IMX8MQ_CLK_UART2_ROOT>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ uart3: serial@30880000 {
+ compatible = "fsl,imx8mq-uart",
+ "fsl,imx6q-uart";
+ reg = <0x30880000 0x10000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
+ <&clk IMX8MQ_CLK_UART3_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- spdif2: spdif@308a0000 {
- compatible = "fsl,imx35-spdif";
- reg = <0x308a0000 0x10000>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
- <&clk IMX8MQ_CLK_25M>, /* rxtx0 */
- <&clk IMX8MQ_CLK_SPDIF2>, /* rxtx1 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
- <&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
- <&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
- <&clk IMX8MQ_CLK_DUMMY>; /* spba */
- clock-names = "core", "rxtx0",
- "rxtx1", "rxtx2",
- "rxtx3", "rxtx4",
- "rxtx5", "rxtx6",
- "rxtx7", "spba";
- dmas = <&sdma1 16 18 0>, <&sdma1 17 18 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ uart2: serial@30890000 {
+ compatible = "fsl,imx8mq-uart",
+ "fsl,imx6q-uart";
+ reg = <0x30890000 0x10000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
+ <&clk IMX8MQ_CLK_UART2_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- sai2: sai@308b0000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x308b0000 0x10000>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI2_IPG>,
- <&clk IMX8MQ_CLK_SAI2_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma1 10 24 0>, <&sdma1 11 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
+ spdif2: spdif@308a0000 {
+ compatible = "fsl,imx35-spdif";
+ reg = <0x308a0000 0x10000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
+ <&clk IMX8MQ_CLK_25M>, /* rxtx0 */
+ <&clk IMX8MQ_CLK_SPDIF2>, /* rxtx1 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
+ <&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
+ <&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
+ <&clk IMX8MQ_CLK_DUMMY>; /* spba */
+ clock-names = "core", "rxtx0",
+ "rxtx1", "rxtx2",
+ "rxtx3", "rxtx4",
+ "rxtx5", "rxtx6",
+ "rxtx7", "spba";
+ dmas = <&sdma1 16 18 0>, <&sdma1 17 18 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
- sai3: sai@308c0000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx8mq-sai";
- reg = <0x308c0000 0x10000>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX8MQ_CLK_SAI3_IPG>,
- <&clk IMX8MQ_CLK_SAI3_ROOT>,
- <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dmas = <&sdma1 12 24 0>, <&sdma1 13 24 0>;
- dma-names = "rx", "tx";
- status = "disabled";
+ sai2: sai@308b0000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x308b0000 0x10000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI2_IPG>,
+ <&clk IMX8MQ_CLK_SAI2_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma1 10 24 0>, <&sdma1 11 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai3: sai@308c0000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx8mq-sai";
+ reg = <0x308c0000 0x10000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SAI3_IPG>,
+ <&clk IMX8MQ_CLK_SAI3_ROOT>,
+ <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma1 12 24 0>, <&sdma1 13 24 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
};
crypto: crypto@30900000 {
--
2.28.0
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