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From: <Thomas.Kopp@microchip.com>
To: <mkl@pengutronix.de>
Cc: <linux-can@vger.kernel.org>, <kernel@pengutronix.de>,
	<manivannan.sadhasivam@linaro.org>
Subject: RE: can-next 2022-03-13: mcp251xfd: add
Date: Thu, 24 Mar 2022 12:28:10 +0000	[thread overview]
Message-ID: <DM4PR11MB53902541ACA7F003887D7915FB199@DM4PR11MB5390.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20220323192858.pixhyf2jzah7eqiv@pengutronix.de>

> > Yes, will do. For the record, the difference was really marginal. On
> > 20k frames I had 39182 vs. 39139 SPI interrupts.
> 
> I assume in some case the RX processing took so long that there was
> another RX CAN frame ready in the same IRQ handler run.

Hrm, good point. Now with frequency scaling set to performance I don't see the difference anymore and see a consistent 2 SPI interrupts per CAN-FD message. So at least in performance mode this seems to be the same. Would be interesting to see the effects on a weaker system than the Pi4.

In CAN-FD mode I can't get the driver to allocate less than 1 Fifo with a depth of 16 to RX. Is that intended? I.e. I try to use ethtool -G can0 rx 8 tx 8 and it still leads to the following setup:
FIFO setup: TEF:         0x400:  8*12 bytes =   96 bytes
FIFO setup: RX-0: FIFO 1/0x418: 16*76 bytes = 1216 bytes
FIFO setup: TX:   FIFO 2/0x8d8:  8*72 bytes =  576 bytes
FIFO setup: free:                              160 bytes

Best Regards,
Thomas 

  reply	other threads:[~2022-03-24 12:28 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-13  8:36 can-next 2022-03-13: mcp251xfd: add Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 01/12] can: mcp251xfd: mcp251xfd_ring_init(): use %d to print free RAM Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 02/12] can: mcp251xfd: ram: add helper function for runtime ring size calculation Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 03/12] can: mcp251xfd: ram: coalescing support Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 04/12] can: mcp251xfd: ethtool: add support Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 05/12] can: mcp251xfd: ring: prepare support for runtime configurable RX/TX ring parameters Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 06/12] can: mcp251xfd: update macros describing ring, FIFO and RAM layout Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 07/12] can: mcp251xfd: ring: add support for runtime configurable RX/TX ring parameters Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 08/12] can: mcp251xfd: add RX IRQ coalescing support Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 09/12] can: mcp251xfd: add RX IRQ coalescing ethtool support Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 10/12] can: mcp251xfd: add TX IRQ coalesce support Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 11/12] can: mcp251xfd: add TX IRQ coalesce ethtool support Marc Kleine-Budde
2022-03-13  8:36 ` [can-next-rfc 12/12] can: mcp251xfd: ring: increase number of RX-FIFOs to 3 and increase max TX-FIFO depth to 16 Marc Kleine-Budde
2022-03-23 13:28 ` can-next 2022-03-13: mcp251xfd: add Thomas.Kopp
2022-03-23 14:03   ` Marc Kleine-Budde
2022-03-23 15:00     ` Thomas.Kopp
2022-03-23 19:28       ` Marc Kleine-Budde
2022-03-24 12:28         ` Thomas.Kopp [this message]
2022-03-24 13:45           ` can-next 2022-03-13: mcp251xfd: add coalescing support Marc Kleine-Budde
2022-03-29  9:08 ` can-next 2022-03-13: mcp251xfd: add Thomas.Kopp

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