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From: Anup Patel <Anup.Patel@wdc.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Atish Patra <Atish.Patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Anup Patel <anup@brainfault.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 3/4] irqchip/sifive-plic: Separate irq_chip for muiltiple PLIC instances
Date: Mon, 18 May 2020 09:00:51 +0000	[thread overview]
Message-ID: <DM6PR04MB62010CC19FEAEE738F2BC00E8DB80@DM6PR04MB6201.namprd04.prod.outlook.com> (raw)
In-Reply-To: <5bc4010161af7bef8e3c30e08888ec82@kernel.org>



> -----Original Message-----
> From: Marc Zyngier <maz@kernel.org>
> Sent: 18 May 2020 13:45
> To: Anup Patel <Anup.Patel@wdc.com>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>; Paul Walmsley
> <paul.walmsley@sifive.com>; Thomas Gleixner <tglx@linutronix.de>; Jason
> Cooper <jason@lakedaemon.net>; Atish Patra <Atish.Patra@wdc.com>; Alistair
> Francis <Alistair.Francis@wdc.com>; Anup Patel <anup@brainfault.org>; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 3/4] irqchip/sifive-plic: Separate irq_chip for muiltiple PLIC
> instances
> 
> On 2020-05-16 17:38, Anup Patel wrote:
> >> -----Original Message-----
> >> From: Marc Zyngier <maz@kernel.org>
> 
> [...]
> 
> >> I *have* given you a way to implement that in a better way. But
> >> again, I'd rather you *don't* do it for the reason I have outlined
> >> above.
> >
> > I explored kernel/irq/proc.c and we can achieve what this patch does
> > by implementing irq_print_chip() callback of "struct irq_chip" so we
> > certainly don't need separate "struct irq_chip" for each PLIC instance.
> >
> > I will implement irq_print_chip() callback in v2 series.
> 
> You still haven't explained *why* you need to have this change.
> As it stands, I'm not prepared to take it.
> 

This is only for differentiating interrupts of multiple PLIC instance
In /proc/interrupts.

I will drop this patch since (like you mentioned) contents of
/proc/interrupts is considered an ABI and this patch breaks it.

For now, we can infer the PLIC instance for interrupt X based
on contents of /proc/irq/X/node (i.e. interrupt NUMA node id).

Thanks,
Anup

WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <Anup.Patel@wdc.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>,
	Anup Patel <anup@brainfault.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Atish Patra <Atish.Patra@wdc.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>
Subject: RE: [PATCH 3/4] irqchip/sifive-plic: Separate irq_chip for muiltiple PLIC instances
Date: Mon, 18 May 2020 09:00:51 +0000	[thread overview]
Message-ID: <DM6PR04MB62010CC19FEAEE738F2BC00E8DB80@DM6PR04MB6201.namprd04.prod.outlook.com> (raw)
In-Reply-To: <5bc4010161af7bef8e3c30e08888ec82@kernel.org>



> -----Original Message-----
> From: Marc Zyngier <maz@kernel.org>
> Sent: 18 May 2020 13:45
> To: Anup Patel <Anup.Patel@wdc.com>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>; Paul Walmsley
> <paul.walmsley@sifive.com>; Thomas Gleixner <tglx@linutronix.de>; Jason
> Cooper <jason@lakedaemon.net>; Atish Patra <Atish.Patra@wdc.com>; Alistair
> Francis <Alistair.Francis@wdc.com>; Anup Patel <anup@brainfault.org>; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 3/4] irqchip/sifive-plic: Separate irq_chip for muiltiple PLIC
> instances
> 
> On 2020-05-16 17:38, Anup Patel wrote:
> >> -----Original Message-----
> >> From: Marc Zyngier <maz@kernel.org>
> 
> [...]
> 
> >> I *have* given you a way to implement that in a better way. But
> >> again, I'd rather you *don't* do it for the reason I have outlined
> >> above.
> >
> > I explored kernel/irq/proc.c and we can achieve what this patch does
> > by implementing irq_print_chip() callback of "struct irq_chip" so we
> > certainly don't need separate "struct irq_chip" for each PLIC instance.
> >
> > I will implement irq_print_chip() callback in v2 series.
> 
> You still haven't explained *why* you need to have this change.
> As it stands, I'm not prepared to take it.
> 

This is only for differentiating interrupts of multiple PLIC instance
In /proc/interrupts.

I will drop this patch since (like you mentioned) contents of
/proc/interrupts is considered an ABI and this patch breaks it.

For now, we can infer the PLIC instance for interrupt X based
on contents of /proc/irq/X/node (i.e. interrupt NUMA node id).

Thanks,
Anup


  reply	other threads:[~2020-05-18  9:00 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-16  6:38 [PATCH 0/4] More improvements for multiple PLICs Anup Patel
2020-05-16  6:38 ` Anup Patel
2020-05-16  6:38 ` [PATCH 1/4] irqchip/sifive-plic: Setup cpuhp once after current handler is present Anup Patel
2020-05-16  6:38   ` Anup Patel
2020-05-16 12:11   ` Marc Zyngier
2020-05-16 12:11     ` Marc Zyngier
2020-05-16 12:52     ` Anup Patel
2020-05-16 12:52       ` Anup Patel
2020-05-16 13:30       ` Marc Zyngier
2020-05-16 13:30         ` Marc Zyngier
2020-05-16 16:28         ` Anup Patel
2020-05-16 16:28           ` Anup Patel
2020-05-17  8:02           ` Anup Patel
2020-05-17  8:02             ` Anup Patel
2020-05-16  6:38 ` [PATCH 2/4] irqchip/sifive-plic: Improve boot prints for multiple PLIC instances Anup Patel
2020-05-16  6:38   ` Anup Patel
2020-05-16 12:20   ` Marc Zyngier
2020-05-16 12:20     ` Marc Zyngier
2020-05-16 12:53     ` Anup Patel
2020-05-16 12:53       ` Anup Patel
2020-05-16  6:39 ` [PATCH 3/4] irqchip/sifive-plic: Separate irq_chip for muiltiple " Anup Patel
2020-05-16  6:39   ` Anup Patel
2020-05-16 12:29   ` Marc Zyngier
2020-05-16 12:29     ` Marc Zyngier
2020-05-16 13:01     ` Anup Patel
2020-05-16 13:01       ` Anup Patel
2020-05-16 13:16       ` Marc Zyngier
2020-05-16 13:16         ` Marc Zyngier
2020-05-16 16:38         ` Anup Patel
2020-05-16 16:38           ` Anup Patel
2020-05-18  8:14           ` Marc Zyngier
2020-05-18  8:14             ` Marc Zyngier
2020-05-18  9:00             ` Anup Patel [this message]
2020-05-18  9:00               ` Anup Patel
2020-05-16  6:39 ` [PATCH 4/4] irqchip/sifive-plic: Set default irq affinity in plic_irqdomain_map() Anup Patel
2020-05-16  6:39   ` Anup Patel
2020-05-16 12:30   ` Marc Zyngier
2020-05-16 12:30     ` Marc Zyngier
2020-05-16 12:53     ` Anup Patel
2020-05-16 12:53       ` Anup Patel

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