* [PATCH v3 0/2] Add PCIE device IDs for Intel DFL cards @ 2022-07-07 15:05 matthew.gerlach 2022-07-07 15:05 ` [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation matthew.gerlach 2022-07-07 15:05 ` [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards matthew.gerlach 0 siblings, 2 replies; 12+ messages in thread From: matthew.gerlach @ 2022-07-07 15:05 UTC (permalink / raw) To: hao.wu, yilun.xu, russell.h.weight, basheer.ahmed.muddebihal, trix, mdf, corbet, linux-fpga, linux-doc, linux-kernel, tianfei.zhang Cc: Matthew Gerlach From: Matthew Gerlach <matthew.gerlach@linux.intel.com> This patch set adds the PCIE device IDs for Intel cards with Device Feature Lists (DFL) to the pci_dev_table for the dfl-pci driver. This patch set was separated for clarity from a larger patch set submitted by tianfei.zhang@intel.com. Patch 1 adds documentation about identifying PCIE FPGA cards with Device Feature Lists (DFL). Patch 2 adds the device ids to the pci_dev_table for the dfl-pci driver. Matthew Gerlach (2): Documentation: fpga: dfl: add PCI Identification documentation fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++ drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++ 2 files changed, 40 insertions(+) -- 2.25.1 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation 2022-07-07 15:05 [PATCH v3 0/2] Add PCIE device IDs for Intel DFL cards matthew.gerlach @ 2022-07-07 15:05 ` matthew.gerlach 2022-07-12 17:14 ` Marco Pagani ` (2 more replies) 2022-07-07 15:05 ` [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards matthew.gerlach 1 sibling, 3 replies; 12+ messages in thread From: matthew.gerlach @ 2022-07-07 15:05 UTC (permalink / raw) To: hao.wu, yilun.xu, russell.h.weight, basheer.ahmed.muddebihal, trix, mdf, corbet, linux-fpga, linux-doc, linux-kernel, tianfei.zhang Cc: Matthew Gerlach From: Matthew Gerlach <matthew.gerlach@linux.intel.com> Add documentation on identifying FPGA based PCI cards prompted by discussion on the linux-fpga@vger.kernel.org mailing list. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> --- v3: Add url to page tracking PCI ID information for DFL based cards. v2: Introduced in v2. --- Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst index 15b670926084..5144775b860a 100644 --- a/Documentation/fpga/dfl.rst +++ b/Documentation/fpga/dfl.rst @@ -507,6 +507,27 @@ ids application. https://github.com/OPAE/dfl-feature-id +PCI Device Identification +================================ +Since FPGA based PCI cards can be reconfigured to a perform a completely +new function at runtime, properly identifying such cards and binding the +correct driver can be challenging. In many use cases, deployed FPGA based +PCI cards are essentially static and the PCI Product ID and Vendor ID pair +is sufficient to identify the card. The DFL framework helps with the +dynamic case of deployed FPGA cards changing at run time by providing +more detailed information about card discoverable at runtime. + +At one level, the DFL on a PCI card describes the function of the card. +However, the same DFL could be instantiated on different physical cards. +Conversely, different DFLs could be instantiated on the same physical card. +Practical management of a cloud containing a heterogeneous set of such cards +requires a PCI level of card identification. While the PCI Product ID and +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci-ids.rst. + + Location of DFLs on a PCI Device ================================ The original method for finding a DFL on a PCI device assumed the start of the -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation 2022-07-07 15:05 ` [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation matthew.gerlach @ 2022-07-12 17:14 ` Marco Pagani 2022-07-13 22:07 ` Tom Rix 2022-07-18 4:43 ` Wu, Hao 2 siblings, 0 replies; 12+ messages in thread From: Marco Pagani @ 2022-07-12 17:14 UTC (permalink / raw) To: matthew.gerlach Cc: basheer.ahmed.muddebihal, corbet, hao.wu, linux-doc, linux-fpga, linux-kernel, mdf, russell.h.weight, tianfei.zhang, trix, yilun.xu On 2022-07-07 17:05, matthew.gerlach@linux.intel.com wrote: > From: Matthew Gerlach <matthew.gerlach@linux.intel.com> > > Add documentation on identifying FPGA based PCI cards prompted > by discussion on the linux-fpga@vger.kernel.org mailing list. > > Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> > --- > v3: Add url to page tracking PCI ID information for DFL based cards. > > v2: Introduced in v2. > --- > Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst > index 15b670926084..5144775b860a 100644 > --- a/Documentation/fpga/dfl.rst > +++ b/Documentation/fpga/dfl.rst > @@ -507,6 +507,27 @@ ids application. > https://github.com/OPAE/dfl-feature-id > > > +PCI Device Identification > +================================ > +Since FPGA based PCI cards can be reconfigured to a perform a completely There's a small typo: "to a perform" --> "to perform" > +new function at runtime, properly identifying such cards and binding the > +correct driver can be challenging. In many use cases, deployed FPGA based > +PCI cards are essentially static and the PCI Product ID and Vendor ID pair > +is sufficient to identify the card. The DFL framework helps with the > +dynamic case of deployed FPGA cards changing at run time by providing > +more detailed information about card discoverable at runtime. > + > +At one level, the DFL on a PCI card describes the function of the card. > +However, the same DFL could be instantiated on different physical cards. > +Conversely, different DFLs could be instantiated on the same physical card. > +Practical management of a cloud containing a heterogeneous set of such cards > +requires a PCI level of card identification. While the PCI Product ID and > +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected > +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem > +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking > +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci-ids.rst. > + > + > Location of DFLs on a PCI Device > ================================ > The original method for finding a DFL on a PCI device assumed the start of the Marco ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation 2022-07-07 15:05 ` [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation matthew.gerlach 2022-07-12 17:14 ` Marco Pagani @ 2022-07-13 22:07 ` Tom Rix 2022-07-18 4:43 ` Wu, Hao 2 siblings, 0 replies; 12+ messages in thread From: Tom Rix @ 2022-07-13 22:07 UTC (permalink / raw) To: matthew.gerlach, hao.wu, yilun.xu, russell.h.weight, basheer.ahmed.muddebihal, mdf, corbet, linux-fpga, linux-doc, linux-kernel, tianfei.zhang On 7/7/22 8:05 AM, matthew.gerlach@linux.intel.com wrote: > From: Matthew Gerlach <matthew.gerlach@linux.intel.com> > > Add documentation on identifying FPGA based PCI cards prompted > by discussion on the linux-fpga@vger.kernel.org mailing list. > > Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> > --- > v3: Add url to page tracking PCI ID information for DFL based cards. > > v2: Introduced in v2. > --- > Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst > index 15b670926084..5144775b860a 100644 > --- a/Documentation/fpga/dfl.rst > +++ b/Documentation/fpga/dfl.rst > @@ -507,6 +507,27 @@ ids application. > https://github.com/OPAE/dfl-feature-id > > > +PCI Device Identification > +================================ > +Since FPGA based PCI cards can be reconfigured to a perform a completely > +new function at runtime, properly identifying such cards and binding the > +correct driver can be challenging. In many use cases, deployed FPGA based > +PCI cards are essentially static and the PCI Product ID and Vendor ID pair > +is sufficient to identify the card. The DFL framework helps with the > +dynamic case of deployed FPGA cards changing at run time by providing > +more detailed information about card discoverable at runtime. > + > +At one level, the DFL on a PCI card describes the function of the card. > +However, the same DFL could be instantiated on different physical cards. > +Conversely, different DFLs could be instantiated on the same physical card. > +Practical management of a cloud containing a heterogeneous set of such cards > +requires a PCI level of card identification. While the PCI Product ID and > +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected > +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem > +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking > +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci-ids.rst. This link looks good. It may be good to be explicit and say which device(s) needs to be specified by the quadruple. Reviewed-by: Tom Rix <trix@redhat.com> > + > + > Location of DFLs on a PCI Device > ================================ > The original method for finding a DFL on a PCI device assumed the start of the ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation 2022-07-07 15:05 ` [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation matthew.gerlach 2022-07-12 17:14 ` Marco Pagani 2022-07-13 22:07 ` Tom Rix @ 2022-07-18 4:43 ` Wu, Hao 2022-07-18 19:30 ` matthew.gerlach 2 siblings, 1 reply; 12+ messages in thread From: Wu, Hao @ 2022-07-18 4:43 UTC (permalink / raw) To: matthew.gerlach, Xu, Yilun, Weight, Russell H, Muddebihal, Basheer Ahmed, trix, mdf, corbet, linux-fpga, linux-doc, linux-kernel, Zhang, Tianfei > -----Original Message----- > From: matthew.gerlach@linux.intel.com <matthew.gerlach@linux.intel.com> > Sent: Thursday, July 7, 2022 11:06 PM > To: Wu, Hao <hao.wu@intel.com>; Xu, Yilun <yilun.xu@intel.com>; Weight, > Russell H <russell.h.weight@intel.com>; Muddebihal, Basheer Ahmed > <basheer.ahmed.muddebihal@intel.com>; trix@redhat.com; > mdf@kernel.org; corbet@lwn.net; linux-fpga@vger.kernel.org; linux- > doc@vger.kernel.org; linux-kernel@vger.kernel.org; Zhang, Tianfei > <tianfei.zhang@intel.com> > Cc: Matthew Gerlach <matthew.gerlach@linux.intel.com> > Subject: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification > documentation > > From: Matthew Gerlach <matthew.gerlach@linux.intel.com> > > Add documentation on identifying FPGA based PCI cards prompted > by discussion on the linux-fpga@vger.kernel.org mailing list. > > Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> > --- > v3: Add url to page tracking PCI ID information for DFL based cards. > > v2: Introduced in v2. > --- > Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst > index 15b670926084..5144775b860a 100644 > --- a/Documentation/fpga/dfl.rst > +++ b/Documentation/fpga/dfl.rst > @@ -507,6 +507,27 @@ ids application. > https://github.com/OPAE/dfl-feature-id > > > +PCI Device Identification > +================================ > +Since FPGA based PCI cards can be reconfigured to a perform a completely > +new function at runtime, properly identifying such cards and binding the > +correct driver can be challenging. In many use cases, deployed FPGA based > +PCI cards are essentially static and the PCI Product ID and Vendor ID pair > +is sufficient to identify the card. The DFL framework helps with the > +dynamic case of deployed FPGA cards changing at run time by providing > +more detailed information about card discoverable at runtime. > + > +At one level, the DFL on a PCI card describes the function of the card. > +However, the same DFL could be instantiated on different physical cards. > +Conversely, different DFLs could be instantiated on the same physical card. > +Practical management of a cloud containing a heterogeneous set of such > cards > +requires a PCI level of card identification. While the PCI Product ID and > +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected > +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem > +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking > +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci- > ids.rst. I feel that we may not really need this in fpga-dfl doc, as this is not describing any new method provided by DFL, but just something from PCI standard, right? Thanks Hao ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation 2022-07-18 4:43 ` Wu, Hao @ 2022-07-18 19:30 ` matthew.gerlach 0 siblings, 0 replies; 12+ messages in thread From: matthew.gerlach @ 2022-07-18 19:30 UTC (permalink / raw) To: Wu, Hao Cc: Xu, Yilun, Weight, Russell H, Muddebihal, Basheer Ahmed, trix, mdf, corbet, linux-fpga, linux-doc, linux-kernel, Zhang, Tianfei On Mon, 18 Jul 2022, Wu, Hao wrote: >> -----Original Message----- >> From: matthew.gerlach@linux.intel.com <matthew.gerlach@linux.intel.com> >> Sent: Thursday, July 7, 2022 11:06 PM >> To: Wu, Hao <hao.wu@intel.com>; Xu, Yilun <yilun.xu@intel.com>; Weight, >> Russell H <russell.h.weight@intel.com>; Muddebihal, Basheer Ahmed >> <basheer.ahmed.muddebihal@intel.com>; trix@redhat.com; >> mdf@kernel.org; corbet@lwn.net; linux-fpga@vger.kernel.org; linux- >> doc@vger.kernel.org; linux-kernel@vger.kernel.org; Zhang, Tianfei >> <tianfei.zhang@intel.com> >> Cc: Matthew Gerlach <matthew.gerlach@linux.intel.com> >> Subject: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification >> documentation >> >> From: Matthew Gerlach <matthew.gerlach@linux.intel.com> >> >> Add documentation on identifying FPGA based PCI cards prompted >> by discussion on the linux-fpga@vger.kernel.org mailing list. >> >> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> >> --- >> v3: Add url to page tracking PCI ID information for DFL based cards. >> >> v2: Introduced in v2. >> --- >> Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++ >> 1 file changed, 21 insertions(+) >> >> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst >> index 15b670926084..5144775b860a 100644 >> --- a/Documentation/fpga/dfl.rst >> +++ b/Documentation/fpga/dfl.rst >> @@ -507,6 +507,27 @@ ids application. >> https://github.com/OPAE/dfl-feature-id >> >> >> +PCI Device Identification >> +================================ >> +Since FPGA based PCI cards can be reconfigured to a perform a completely >> +new function at runtime, properly identifying such cards and binding the >> +correct driver can be challenging. In many use cases, deployed FPGA based >> +PCI cards are essentially static and the PCI Product ID and Vendor ID pair >> +is sufficient to identify the card. The DFL framework helps with the >> +dynamic case of deployed FPGA cards changing at run time by providing >> +more detailed information about card discoverable at runtime. >> + >> +At one level, the DFL on a PCI card describes the function of the card. >> +However, the same DFL could be instantiated on different physical cards. >> +Conversely, different DFLs could be instantiated on the same physical card. >> +Practical management of a cloud containing a heterogeneous set of such >> cards >> +requires a PCI level of card identification. While the PCI Product ID and >> +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected >> +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem >> +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking >> +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci- >> ids.rst. > > I feel that we may not really need this in fpga-dfl doc, as this is not describing > any new method provided by DFL, but just something from PCI standard, right? I think you are correct that this documentation change is not necessary. It was useful as a mechanism for discussion, but it is really just something from the PCI standard. I will not include it in the v4 patch set. > > Thanks > Hao > ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards 2022-07-07 15:05 [PATCH v3 0/2] Add PCIE device IDs for Intel DFL cards matthew.gerlach 2022-07-07 15:05 ` [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation matthew.gerlach @ 2022-07-07 15:05 ` matthew.gerlach 2022-07-12 15:05 ` Marco Pagani ` (2 more replies) 1 sibling, 3 replies; 12+ messages in thread From: matthew.gerlach @ 2022-07-07 15:05 UTC (permalink / raw) To: hao.wu, yilun.xu, russell.h.weight, basheer.ahmed.muddebihal, trix, mdf, corbet, linux-fpga, linux-doc, linux-kernel, tianfei.zhang Cc: Matthew Gerlach From: Matthew Gerlach <matthew.gerlach@linux.intel.com> Add pci_dev_table entries supporting the Intel N6000, N6001 and C6100 cards to the dfl-pci driver. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> --- v3: added necessary subdevice ids removed 'drivers: ' from title v2: changed names from INTEL_OFS to INTEL_DFL --- drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c index fd1fa55c9113..94eabdf1d2f7 100644 --- a/drivers/fpga/dfl-pci.c +++ b/drivers/fpga/dfl-pci.c @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev) #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000 #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001 +#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce /* VF Device */ #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1 #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5 #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C +#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf + +/* PCI Subdevice ID */ +#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770 +#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771 +#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4 static struct pci_device_id cci_pcie_id_tbl[] = { {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),}, @@ -96,6 +103,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = { {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),}, {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),}, {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),}, + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),}, + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),}, + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),}, + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),}, + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),}, + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),}, {0,} }; MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl); -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards 2022-07-07 15:05 ` [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards matthew.gerlach @ 2022-07-12 15:05 ` Marco Pagani 2022-07-12 19:37 ` matthew.gerlach 2022-07-13 21:59 ` Tom Rix 2022-07-18 4:27 ` Wu, Hao 2 siblings, 1 reply; 12+ messages in thread From: Marco Pagani @ 2022-07-12 15:05 UTC (permalink / raw) To: matthew.gerlach Cc: basheer.ahmed.muddebihal, corbet, hao.wu, linux-doc, linux-fpga, linux-kernel, mdf, russell.h.weight, tianfei.zhang, trix, yilun.xu On 2022-07-07 17:05, matthew.gerlach@linux.intel.com wrote: > From: Matthew Gerlach <matthew.gerlach@linux.intel.com> > > Add pci_dev_table entries supporting the Intel N6000, N6001 > and C6100 cards to the dfl-pci driver. > > Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> > Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> Tested-by: Marco Pagani <marpagan@redhat.com> > --- > v3: added necessary subdevice ids > removed 'drivers: ' from title > > v2: changed names from INTEL_OFS to INTEL_DFL > --- > drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c > index fd1fa55c9113..94eabdf1d2f7 100644 > --- a/drivers/fpga/dfl-pci.c > +++ b/drivers/fpga/dfl-pci.c > @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev) > #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B > #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000 > #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001 > +#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce > > /* VF Device */ > #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF > #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1 > #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5 > #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C > +#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf > + > +/* PCI Subdevice ID */ > +#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770 > +#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771 > +#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4 > > static struct pci_device_id cci_pcie_id_tbl[] = { > {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),}, > @@ -96,6 +103,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = { > {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),}, > {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),}, > {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),}, > {0,} > }; > MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl); ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards 2022-07-12 15:05 ` Marco Pagani @ 2022-07-12 19:37 ` matthew.gerlach 0 siblings, 0 replies; 12+ messages in thread From: matthew.gerlach @ 2022-07-12 19:37 UTC (permalink / raw) To: Marco Pagani Cc: basheer.ahmed.muddebihal, corbet, hao.wu, linux-doc, linux-fpga, linux-kernel, mdf, russell.h.weight, tianfei.zhang, trix, yilun.xu On Tue, 12 Jul 2022, Marco Pagani wrote: > On 2022-07-07 17:05, matthew.gerlach@linux.intel.com wrote: >> From: Matthew Gerlach <matthew.gerlach@linux.intel.com> >> >> Add pci_dev_table entries supporting the Intel N6000, N6001 >> and C6100 cards to the dfl-pci driver. >> >> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> >> Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> > > Tested-by: Marco Pagani <marpagan@redhat.com> Thanks for testing. Matthew > >> --- >> v3: added necessary subdevice ids >> removed 'drivers: ' from title >> >> v2: changed names from INTEL_OFS to INTEL_DFL >> --- >> drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++ >> 1 file changed, 19 insertions(+) >> >> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c >> index fd1fa55c9113..94eabdf1d2f7 100644 >> --- a/drivers/fpga/dfl-pci.c >> +++ b/drivers/fpga/dfl-pci.c >> @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev) >> #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B >> #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000 >> #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001 >> +#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce >> >> /* VF Device */ >> #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF >> #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1 >> #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5 >> #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C >> +#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf >> + >> +/* PCI Subdevice ID */ >> +#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770 >> +#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771 >> +#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4 >> >> static struct pci_device_id cci_pcie_id_tbl[] = { >> {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),}, >> @@ -96,6 +103,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = { >> {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),}, >> {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),}, >> {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),}, >> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, >> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),}, >> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, >> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),}, >> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, >> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),}, >> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, >> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),}, >> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, >> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),}, >> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, >> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),}, >> {0,} >> }; >> MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl); > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards 2022-07-07 15:05 ` [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards matthew.gerlach 2022-07-12 15:05 ` Marco Pagani @ 2022-07-13 21:59 ` Tom Rix 2022-07-18 4:27 ` Wu, Hao 2 siblings, 0 replies; 12+ messages in thread From: Tom Rix @ 2022-07-13 21:59 UTC (permalink / raw) To: matthew.gerlach, hao.wu, yilun.xu, russell.h.weight, basheer.ahmed.muddebihal, mdf, corbet, linux-fpga, linux-doc, linux-kernel, tianfei.zhang On 7/7/22 8:05 AM, matthew.gerlach@linux.intel.com wrote: > From: Matthew Gerlach <matthew.gerlach@linux.intel.com> > > Add pci_dev_table entries supporting the Intel N6000, N6001 > and C6100 cards to the dfl-pci driver. > > Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> > Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> > --- > v3: added necessary subdevice ids > removed 'drivers: ' from title > > v2: changed names from INTEL_OFS to INTEL_DFL > --- > drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c > index fd1fa55c9113..94eabdf1d2f7 100644 > --- a/drivers/fpga/dfl-pci.c > +++ b/drivers/fpga/dfl-pci.c > @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev) > #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B > #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000 > #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001 > +#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce > > /* VF Device */ > #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF > #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1 > #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5 > #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C > +#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf > + > +/* PCI Subdevice ID */ > +#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770 > +#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771 > +#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4 > > static struct pci_device_id cci_pcie_id_tbl[] = { > {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),}, > @@ -96,6 +103,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = { > {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),}, > {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),}, > {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),}, > + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, > + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),}, Matt, Thanks for making this change, this addresses my concerns with the earlier patch. Reviewed-by: Tom Rix <trix@redhat.com> > {0,} > }; > MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl); ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards 2022-07-07 15:05 ` [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards matthew.gerlach 2022-07-12 15:05 ` Marco Pagani 2022-07-13 21:59 ` Tom Rix @ 2022-07-18 4:27 ` Wu, Hao 2022-07-18 19:27 ` matthew.gerlach 2 siblings, 1 reply; 12+ messages in thread From: Wu, Hao @ 2022-07-18 4:27 UTC (permalink / raw) To: matthew.gerlach, Xu, Yilun, Weight, Russell H, Muddebihal, Basheer Ahmed, trix, mdf, corbet, linux-fpga, linux-doc, linux-kernel, Zhang, Tianfei > -----Original Message----- > From: matthew.gerlach@linux.intel.com <matthew.gerlach@linux.intel.com> > Sent: Thursday, July 7, 2022 11:06 PM > To: Wu, Hao <hao.wu@intel.com>; Xu, Yilun <yilun.xu@intel.com>; Weight, > Russell H <russell.h.weight@intel.com>; Muddebihal, Basheer Ahmed > <basheer.ahmed.muddebihal@intel.com>; trix@redhat.com; > mdf@kernel.org; corbet@lwn.net; linux-fpga@vger.kernel.org; linux- > doc@vger.kernel.org; linux-kernel@vger.kernel.org; Zhang, Tianfei > <tianfei.zhang@intel.com> > Cc: Matthew Gerlach <matthew.gerlach@linux.intel.com> > Subject: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and > C6100 cards > > From: Matthew Gerlach <matthew.gerlach@linux.intel.com> > > Add pci_dev_table entries supporting the Intel N6000, N6001 > and C6100 cards to the dfl-pci driver. > > Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> > Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> > --- > v3: added necessary subdevice ids > removed 'drivers: ' from title > > v2: changed names from INTEL_OFS to INTEL_DFL > --- > drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c > index fd1fa55c9113..94eabdf1d2f7 100644 > --- a/drivers/fpga/dfl-pci.c > +++ b/drivers/fpga/dfl-pci.c > @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev) > #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B > #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000 > #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001 > +#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce > > /* VF Device */ > #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF > #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1 > #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5 > #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C > +#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf > + > +/* PCI Subdevice ID */ > +#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770 > +#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771 > +#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4 Please move SUBDEVICE_ID above together with DEVICE_ID. If we add new SUBDEVICE to some other device like this, it will be hard to distinguish them. With above change. Acked-by: Wu Hao <hao.wu@intel.com> Thanks Hao ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards 2022-07-18 4:27 ` Wu, Hao @ 2022-07-18 19:27 ` matthew.gerlach 0 siblings, 0 replies; 12+ messages in thread From: matthew.gerlach @ 2022-07-18 19:27 UTC (permalink / raw) To: Wu, Hao Cc: Xu, Yilun, Weight, Russell H, Muddebihal, Basheer Ahmed, trix, mdf, corbet, linux-fpga, linux-doc, linux-kernel, Zhang, Tianfei On Mon, 18 Jul 2022, Wu, Hao wrote: >> -----Original Message----- >> From: matthew.gerlach@linux.intel.com <matthew.gerlach@linux.intel.com> >> Sent: Thursday, July 7, 2022 11:06 PM >> To: Wu, Hao <hao.wu@intel.com>; Xu, Yilun <yilun.xu@intel.com>; Weight, >> Russell H <russell.h.weight@intel.com>; Muddebihal, Basheer Ahmed >> <basheer.ahmed.muddebihal@intel.com>; trix@redhat.com; >> mdf@kernel.org; corbet@lwn.net; linux-fpga@vger.kernel.org; linux- >> doc@vger.kernel.org; linux-kernel@vger.kernel.org; Zhang, Tianfei >> <tianfei.zhang@intel.com> >> Cc: Matthew Gerlach <matthew.gerlach@linux.intel.com> >> Subject: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and >> C6100 cards >> >> From: Matthew Gerlach <matthew.gerlach@linux.intel.com> >> >> Add pci_dev_table entries supporting the Intel N6000, N6001 >> and C6100 cards to the dfl-pci driver. >> >> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> >> Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> >> --- >> v3: added necessary subdevice ids >> removed 'drivers: ' from title >> >> v2: changed names from INTEL_OFS to INTEL_DFL >> --- >> drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++ >> 1 file changed, 19 insertions(+) >> >> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c >> index fd1fa55c9113..94eabdf1d2f7 100644 >> --- a/drivers/fpga/dfl-pci.c >> +++ b/drivers/fpga/dfl-pci.c >> @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev) >> #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B >> #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000 >> #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001 >> +#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce >> >> /* VF Device */ >> #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF >> #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1 >> #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5 >> #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C >> +#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf >> + >> +/* PCI Subdevice ID */ >> +#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770 >> +#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771 >> +#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4 > > Please move SUBDEVICE_ID above together with DEVICE_ID. > If we add new SUBDEVICE to some other device like this, it will > be hard to distinguish them. This is a very good suggestion. I will resubmit with your suggestion. Thanks for the review. Matthew > > With above change. > Acked-by: Wu Hao <hao.wu@intel.com> > > Thanks > Hao > > ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2022-07-18 19:33 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-07-07 15:05 [PATCH v3 0/2] Add PCIE device IDs for Intel DFL cards matthew.gerlach 2022-07-07 15:05 ` [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation matthew.gerlach 2022-07-12 17:14 ` Marco Pagani 2022-07-13 22:07 ` Tom Rix 2022-07-18 4:43 ` Wu, Hao 2022-07-18 19:30 ` matthew.gerlach 2022-07-07 15:05 ` [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards matthew.gerlach 2022-07-12 15:05 ` Marco Pagani 2022-07-12 19:37 ` matthew.gerlach 2022-07-13 21:59 ` Tom Rix 2022-07-18 4:27 ` Wu, Hao 2022-07-18 19:27 ` matthew.gerlach
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.