[PATCH] drm/amdgpu: enable xgmi support for sienna cichlid

[PATCH] drm/amdgpu: enable xgmi support for sienna cichlid

[Clements, John]

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[AMD Public Use]

Submitting patch to enable XGMI support for Sienna Cichlid

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From 4a30c975851ab22f34b2c135394f8f12477535d0 Mon Sep 17 00:00:00 2001
From: John Clements <john.clements@amd.com>
Date: Fri, 17 Jul 2020 10:58:14 +0800
Subject: [PATCH] drm/amdgpu: enable xgmi support for sienna cichlid

set xgmi support flag suring nv ip init sequence

Signed-off-by: John Clements <john.clements@amd.com>
Change-Id: I4935a07807efe76979ff0c94a97e5065a801492f
---
 drivers/gpu/drm/amd/amdgpu/nv.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 479991b71295..ea69ae76773e 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -446,6 +446,9 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
 	adev->nbio.funcs = &nbio_v2_3_funcs;
 	adev->nbio.hdp_flush_reg = &nbio_v2_3_hdp_flush_reg;
 
+	if (adev->asic_type == CHIP_SIENNA_CICHLID)
+		adev->gmc.xgmi.supported = true;
+
 	/* Set IP register base before any HW register access */
 	r = nv_reg_base_init(adev);
 	if (r)
-- 
2.17.1


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RE: [PATCH] drm/amdgpu: enable xgmi support for sienna cichlid

[Zhang, Hawking]

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[AMD Public Use]

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>

Regards,
Hawking
From: Clements, John <John.Clements@amd.com>
Sent: Friday, July 17, 2020 11:05
To: amd-gfx list <amd-gfx@lists.freedesktop.org>; Zhang, Hawking <Hawking.Zhang@amd.com>
Subject: [PATCH] drm/amdgpu: enable xgmi support for sienna cichlid


[AMD Public Use]

Submitting patch to enable XGMI support for Sienna Cichlid

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