* [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish @ 2021-10-11 8:31 Lang Yu 2021-10-11 8:33 ` Huang, Ray 2021-10-11 8:53 ` Lazar, Lijo 0 siblings, 2 replies; 6+ messages in thread From: Lang Yu @ 2021-10-11 8:31 UTC (permalink / raw) To: amd-gfx; +Cc: Alex Deucher, Huang Rui, Lang Yu Query default sclk instead of hard code. Signed-off-by: Lang Yu <lang.yu@amd.com> --- .../gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c index 3d4c65bc29dc..d98fd06a2574 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c @@ -47,7 +47,6 @@ /* unit: MHz */ #define CYAN_SKILLFISH_SCLK_MIN 1000 #define CYAN_SKILLFISH_SCLK_MAX 2000 -#define CYAN_SKILLFISH_SCLK_DEFAULT 1800 /* unit: mV */ #define CYAN_SKILLFISH_VDDC_MIN 700 @@ -59,6 +58,8 @@ static struct gfx_user_settings { uint32_t vddc; } cyan_skillfish_user_settings; +static uint32_t cyan_skillfish_sclk_default; + #define FEATURE_MASK(feature) (1ULL << feature) #define SMC_DPM_FEATURE ( \ FEATURE_MASK(FEATURE_FCLK_DPM_BIT) | \ @@ -365,13 +366,18 @@ static bool cyan_skillfish_is_dpm_running(struct smu_context *smu) return false; ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2); - if (ret) return false; feature_enabled = (uint64_t)feature_mask[0] | ((uint64_t)feature_mask[1] << 32); + /* + * cyan_skillfish specific, query default sclk inseted of hard code. + */ + cyan_skillfish_get_smu_metrics_data(smu, METRICS_CURR_GFXCLK, + &cyan_skillfish_sclk_default); + return !!(feature_enabled & SMC_DPM_FEATURE); } @@ -468,7 +474,7 @@ static int cyan_skillfish_od_edit_dpm_table(struct smu_context *smu, return -EINVAL; } - cyan_skillfish_user_settings.sclk = CYAN_SKILLFISH_SCLK_DEFAULT; + cyan_skillfish_user_settings.sclk = cyan_skillfish_sclk_default; cyan_skillfish_user_settings.vddc = CYAN_SKILLFISH_VDDC_MAGIC; break; -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* RE: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish 2021-10-11 8:31 [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish Lang Yu @ 2021-10-11 8:33 ` Huang, Ray 2021-10-11 8:53 ` Lazar, Lijo 1 sibling, 0 replies; 6+ messages in thread From: Huang, Ray @ 2021-10-11 8:33 UTC (permalink / raw) To: Yu, Lang, amd-gfx; +Cc: Deucher, Alexander, Yu, Lang [AMD Official Use Only] Acked-by: Huang Rui <ray.huang@amd.com> -----Original Message----- From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Lang Yu Sent: Monday, October 11, 2021 4:32 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Huang, Ray <Ray.Huang@amd.com>; Yu, Lang <Lang.Yu@amd.com> Subject: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish Query default sclk instead of hard code. Signed-off-by: Lang Yu <lang.yu@amd.com> --- .../gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c index 3d4c65bc29dc..d98fd06a2574 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c @@ -47,7 +47,6 @@ /* unit: MHz */ #define CYAN_SKILLFISH_SCLK_MIN 1000 #define CYAN_SKILLFISH_SCLK_MAX 2000 -#define CYAN_SKILLFISH_SCLK_DEFAULT 1800 /* unit: mV */ #define CYAN_SKILLFISH_VDDC_MIN 700 @@ -59,6 +58,8 @@ static struct gfx_user_settings { uint32_t vddc; } cyan_skillfish_user_settings; +static uint32_t cyan_skillfish_sclk_default; + #define FEATURE_MASK(feature) (1ULL << feature) #define SMC_DPM_FEATURE ( \ FEATURE_MASK(FEATURE_FCLK_DPM_BIT) | \ @@ -365,13 +366,18 @@ static bool cyan_skillfish_is_dpm_running(struct smu_context *smu) return false; ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2); - if (ret) return false; feature_enabled = (uint64_t)feature_mask[0] | ((uint64_t)feature_mask[1] << 32); + /* + * cyan_skillfish specific, query default sclk inseted of hard code. + */ + cyan_skillfish_get_smu_metrics_data(smu, METRICS_CURR_GFXCLK, + &cyan_skillfish_sclk_default); + return !!(feature_enabled & SMC_DPM_FEATURE); } @@ -468,7 +474,7 @@ static int cyan_skillfish_od_edit_dpm_table(struct smu_context *smu, return -EINVAL; } - cyan_skillfish_user_settings.sclk = CYAN_SKILLFISH_SCLK_DEFAULT; + cyan_skillfish_user_settings.sclk = cyan_skillfish_sclk_default; cyan_skillfish_user_settings.vddc = CYAN_SKILLFISH_VDDC_MAGIC; break; -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish 2021-10-11 8:31 [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish Lang Yu 2021-10-11 8:33 ` Huang, Ray @ 2021-10-11 8:53 ` Lazar, Lijo 2021-10-11 9:10 ` Yu, Lang 2021-10-11 14:27 ` Chen, Guchun 1 sibling, 2 replies; 6+ messages in thread From: Lazar, Lijo @ 2021-10-11 8:53 UTC (permalink / raw) To: Lang Yu, amd-gfx; +Cc: Alex Deucher, Huang Rui On 10/11/2021 2:01 PM, Lang Yu wrote: > Query default sclk instead of hard code. > > Signed-off-by: Lang Yu <lang.yu@amd.com> > --- > .../gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c > index 3d4c65bc29dc..d98fd06a2574 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c > @@ -47,7 +47,6 @@ > /* unit: MHz */ > #define CYAN_SKILLFISH_SCLK_MIN 1000 > #define CYAN_SKILLFISH_SCLK_MAX 2000 > -#define CYAN_SKILLFISH_SCLK_DEFAULT 1800 > > /* unit: mV */ > #define CYAN_SKILLFISH_VDDC_MIN 700 > @@ -59,6 +58,8 @@ static struct gfx_user_settings { > uint32_t vddc; > } cyan_skillfish_user_settings; > > +static uint32_t cyan_skillfish_sclk_default; > + > #define FEATURE_MASK(feature) (1ULL << feature) > #define SMC_DPM_FEATURE ( \ > FEATURE_MASK(FEATURE_FCLK_DPM_BIT) | \ > @@ -365,13 +366,18 @@ static bool cyan_skillfish_is_dpm_running(struct smu_context *smu) > return false; > > ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2); > - > if (ret) > return false; > > feature_enabled = (uint64_t)feature_mask[0] | > ((uint64_t)feature_mask[1] << 32); > > + /* > + * cyan_skillfish specific, query default sclk inseted of hard code. > + */ > + cyan_skillfish_get_smu_metrics_data(smu, METRICS_CURR_GFXCLK, > + &cyan_skillfish_sclk_default); > + Maybe add if (!cyan_skillfish_sclk_default) so that it's read only once during driver load and not on every suspend/resume. Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Thanks, Lijo > return !!(feature_enabled & SMC_DPM_FEATURE); > } > > @@ -468,7 +474,7 @@ static int cyan_skillfish_od_edit_dpm_table(struct smu_context *smu, > return -EINVAL; > } > > - cyan_skillfish_user_settings.sclk = CYAN_SKILLFISH_SCLK_DEFAULT; > + cyan_skillfish_user_settings.sclk = cyan_skillfish_sclk_default; > cyan_skillfish_user_settings.vddc = CYAN_SKILLFISH_VDDC_MAGIC; > > break; > ^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish 2021-10-11 8:53 ` Lazar, Lijo @ 2021-10-11 9:10 ` Yu, Lang 2021-10-11 14:27 ` Chen, Guchun 1 sibling, 0 replies; 6+ messages in thread From: Yu, Lang @ 2021-10-11 9:10 UTC (permalink / raw) To: Lazar, Lijo, amd-gfx; +Cc: Deucher, Alexander, Huang, Ray [AMD Official Use Only] >-----Original Message----- >From: Lazar, Lijo <Lijo.Lazar@amd.com> >Sent: Monday, October 11, 2021 4:54 PM >To: Yu, Lang <Lang.Yu@amd.com>; amd-gfx@lists.freedesktop.org >Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Huang, Ray ><Ray.Huang@amd.com> >Subject: Re: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish > > > >On 10/11/2021 2:01 PM, Lang Yu wrote: >> Query default sclk instead of hard code. >> >> Signed-off-by: Lang Yu <lang.yu@amd.com> >> --- >> .../gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 12 +++++++++--- >> 1 file changed, 9 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c >> b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c >> index 3d4c65bc29dc..d98fd06a2574 100644 >> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c >> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c >> @@ -47,7 +47,6 @@ >> /* unit: MHz */ >> #define CYAN_SKILLFISH_SCLK_MIN 1000 >> #define CYAN_SKILLFISH_SCLK_MAX 2000 >> -#define CYAN_SKILLFISH_SCLK_DEFAULT 1800 >> >> /* unit: mV */ >> #define CYAN_SKILLFISH_VDDC_MIN 700 >> @@ -59,6 +58,8 @@ static struct gfx_user_settings { >> uint32_t vddc; >> } cyan_skillfish_user_settings; >> >> +static uint32_t cyan_skillfish_sclk_default; >> + >> #define FEATURE_MASK(feature) (1ULL << feature) >> #define SMC_DPM_FEATURE ( \ >> FEATURE_MASK(FEATURE_FCLK_DPM_BIT) | \ >> @@ -365,13 +366,18 @@ static bool cyan_skillfish_is_dpm_running(struct >smu_context *smu) >> return false; >> >> ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2); >> - >> if (ret) >> return false; >> >> feature_enabled = (uint64_t)feature_mask[0] | >> ((uint64_t)feature_mask[1] << 32); >> >> + /* >> + * cyan_skillfish specific, query default sclk inseted of hard code. >> + */ >> + cyan_skillfish_get_smu_metrics_data(smu, METRICS_CURR_GFXCLK, >> + &cyan_skillfish_sclk_default); >> + > >Maybe add if (!cyan_skillfish_sclk_default) so that it's read only once during driver >load and not on every suspend/resume. Good idea! Thanks, Lang >Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> > >Thanks, >Lijo > >> return !!(feature_enabled & SMC_DPM_FEATURE); >> } >> >> @@ -468,7 +474,7 @@ static int cyan_skillfish_od_edit_dpm_table(struct >smu_context *smu, >> return -EINVAL; >> } >> >> - cyan_skillfish_user_settings.sclk = >CYAN_SKILLFISH_SCLK_DEFAULT; >> + cyan_skillfish_user_settings.sclk = cyan_skillfish_sclk_default; >> cyan_skillfish_user_settings.vddc = >CYAN_SKILLFISH_VDDC_MAGIC; >> >> break; >> ^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish 2021-10-11 8:53 ` Lazar, Lijo 2021-10-11 9:10 ` Yu, Lang @ 2021-10-11 14:27 ` Chen, Guchun 2021-10-12 2:22 ` Yu, Lang 1 sibling, 1 reply; 6+ messages in thread From: Chen, Guchun @ 2021-10-11 14:27 UTC (permalink / raw) To: Lazar, Lijo, Yu, Lang, amd-gfx; +Cc: Deucher, Alexander, Huang, Ray [Public] Global variable to carry the sclk value looks a bit over-killed. Is it possible that move all into cyan_skillfish_od_edit_dpm_table, like querying sclk first and setting it to cyan_skillfish_user_settings.sclk? Regards, Guchun -----Original Message----- From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Lazar, Lijo Sent: Monday, October 11, 2021 4:54 PM To: Yu, Lang <Lang.Yu@amd.com>; amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Huang, Ray <Ray.Huang@amd.com> Subject: Re: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish On 10/11/2021 2:01 PM, Lang Yu wrote: > Query default sclk instead of hard code. > > Signed-off-by: Lang Yu <lang.yu@amd.com> > --- > .../gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c > b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c > index 3d4c65bc29dc..d98fd06a2574 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c > @@ -47,7 +47,6 @@ > /* unit: MHz */ > #define CYAN_SKILLFISH_SCLK_MIN 1000 > #define CYAN_SKILLFISH_SCLK_MAX 2000 > -#define CYAN_SKILLFISH_SCLK_DEFAULT 1800 > > /* unit: mV */ > #define CYAN_SKILLFISH_VDDC_MIN 700 > @@ -59,6 +58,8 @@ static struct gfx_user_settings { > uint32_t vddc; > } cyan_skillfish_user_settings; > > +static uint32_t cyan_skillfish_sclk_default; > + > #define FEATURE_MASK(feature) (1ULL << feature) > #define SMC_DPM_FEATURE ( \ > FEATURE_MASK(FEATURE_FCLK_DPM_BIT) | \ > @@ -365,13 +366,18 @@ static bool cyan_skillfish_is_dpm_running(struct smu_context *smu) > return false; > > ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2); > - > if (ret) > return false; > > feature_enabled = (uint64_t)feature_mask[0] | > ((uint64_t)feature_mask[1] << 32); > > + /* > + * cyan_skillfish specific, query default sclk inseted of hard code. > + */ > + cyan_skillfish_get_smu_metrics_data(smu, METRICS_CURR_GFXCLK, > + &cyan_skillfish_sclk_default); > + Maybe add if (!cyan_skillfish_sclk_default) so that it's read only once during driver load and not on every suspend/resume. Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Thanks, Lijo > return !!(feature_enabled & SMC_DPM_FEATURE); > } > > @@ -468,7 +474,7 @@ static int cyan_skillfish_od_edit_dpm_table(struct smu_context *smu, > return -EINVAL; > } > > - cyan_skillfish_user_settings.sclk = CYAN_SKILLFISH_SCLK_DEFAULT; > + cyan_skillfish_user_settings.sclk = cyan_skillfish_sclk_default; > cyan_skillfish_user_settings.vddc = CYAN_SKILLFISH_VDDC_MAGIC; > > break; > ^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish 2021-10-11 14:27 ` Chen, Guchun @ 2021-10-12 2:22 ` Yu, Lang 0 siblings, 0 replies; 6+ messages in thread From: Yu, Lang @ 2021-10-12 2:22 UTC (permalink / raw) To: Chen, Guchun, Lazar, Lijo, amd-gfx; +Cc: Deucher, Alexander, Huang, Ray [Public] >-----Original Message----- >From: Chen, Guchun <Guchun.Chen@amd.com> >Sent: Monday, October 11, 2021 10:27 PM >To: Lazar, Lijo <Lijo.Lazar@amd.com>; Yu, Lang <Lang.Yu@amd.com>; amd- >gfx@lists.freedesktop.org >Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Huang, Ray ><Ray.Huang@amd.com> >Subject: RE: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish > >[Public] > >Global variable to carry the sclk value looks a bit over-killed. Is it possible that >move all into cyan_skillfish_od_edit_dpm_table, like querying sclk first and >setting it to cyan_skillfish_user_settings.sclk? 1, We need to query default sclk in smu init phase and use it in od_edit_dpm_table, so global variable is needed. 2, To maintain "set then commit" command rule of pp_od_clk_voltage, global variable is also needed. Regards, Lang We need some global variables to store user settings and > >Regards, >Guchun > >-----Original Message----- >From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Lazar, >Lijo >Sent: Monday, October 11, 2021 4:54 PM >To: Yu, Lang <Lang.Yu@amd.com>; amd-gfx@lists.freedesktop.org >Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Huang, Ray ><Ray.Huang@amd.com> >Subject: Re: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish > > > >On 10/11/2021 2:01 PM, Lang Yu wrote: >> Query default sclk instead of hard code. >> >> Signed-off-by: Lang Yu <lang.yu@amd.com> >> --- >> .../gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 12 +++++++++--- >> 1 file changed, 9 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c >> b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c >> index 3d4c65bc29dc..d98fd06a2574 100644 >> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c >> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c >> @@ -47,7 +47,6 @@ >> /* unit: MHz */ >> #define CYAN_SKILLFISH_SCLK_MIN 1000 >> #define CYAN_SKILLFISH_SCLK_MAX 2000 >> -#define CYAN_SKILLFISH_SCLK_DEFAULT 1800 >> >> /* unit: mV */ >> #define CYAN_SKILLFISH_VDDC_MIN 700 >> @@ -59,6 +58,8 @@ static struct gfx_user_settings { >> uint32_t vddc; >> } cyan_skillfish_user_settings; >> >> +static uint32_t cyan_skillfish_sclk_default; >> + >> #define FEATURE_MASK(feature) (1ULL << feature) >> #define SMC_DPM_FEATURE ( \ >> FEATURE_MASK(FEATURE_FCLK_DPM_BIT) | \ >> @@ -365,13 +366,18 @@ static bool cyan_skillfish_is_dpm_running(struct >smu_context *smu) >> return false; >> >> ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2); >> - >> if (ret) >> return false; >> >> feature_enabled = (uint64_t)feature_mask[0] | >> ((uint64_t)feature_mask[1] << 32); >> >> + /* >> + * cyan_skillfish specific, query default sclk inseted of hard code. >> + */ >> + cyan_skillfish_get_smu_metrics_data(smu, METRICS_CURR_GFXCLK, >> + &cyan_skillfish_sclk_default); >> + > >Maybe add if (!cyan_skillfish_sclk_default) so that it's read only once during driver >load and not on every suspend/resume. > >Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> > >Thanks, >Lijo > >> return !!(feature_enabled & SMC_DPM_FEATURE); >> } >> >> @@ -468,7 +474,7 @@ static int cyan_skillfish_od_edit_dpm_table(struct >smu_context *smu, >> return -EINVAL; >> } >> >> - cyan_skillfish_user_settings.sclk = >CYAN_SKILLFISH_SCLK_DEFAULT; >> + cyan_skillfish_user_settings.sclk = cyan_skillfish_sclk_default; >> cyan_skillfish_user_settings.vddc = >CYAN_SKILLFISH_VDDC_MAGIC; >> >> break; >> ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-10-12 2:22 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-10-11 8:31 [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish Lang Yu 2021-10-11 8:33 ` Huang, Ray 2021-10-11 8:53 ` Lazar, Lijo 2021-10-11 9:10 ` Yu, Lang 2021-10-11 14:27 ` Chen, Guchun 2021-10-12 2:22 ` Yu, Lang
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