* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-02-27 19:27 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-02-27 19:27 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/02/27 19:27:51
Modified files:
target-mips : op.c translate.c
Log message:
Fix mips FPU emulation, 32 bit data types are allowed to use odd registers.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.23&r2=1.24
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.33&r2=1.34
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-05-23 8:18 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-05-23 8:18 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/05/23 08:18:27
Modified files:
target-mips : op.c translate.c
Log message:
The previous patch to make breakpoints work was a performance
disaster, use a similiar hack as ARM does instead.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.60&r2=1.61
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.85&r2=1.86
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-05-19 17:45 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-05-19 17:45 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/05/19 17:45:43
Modified files:
target-mips : op.c translate.c
Log message:
Fix slti/sltiu for MIPS64, by Aurelien Jarno.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.57&r2=1.58
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.81&r2=1.82
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] qemu/target-mips op.c translate.c
2007-05-18 19:50 ` Thiemo Seufer
2007-05-18 20:27 ` Paul Brook
@ 2007-05-19 10:47 ` Stefan Weil
1 sibling, 0 replies; 22+ messages in thread
From: Stefan Weil @ 2007-05-19 10:47 UTC (permalink / raw)
To: QEMU Developers
Here is an analysis of the FPU problem:
1. Linux FPU emulation writes code on user stack
2. this code raises address error exception (caused by lw zero,1(zero))
more operations follow ...
3. Syscall 4119 (sigreturn) is written on user stack (same location as
above)
4. this code should raise syscall exception, but raises address error
exception
Step 4 is wrong: QEMU logs the correct code, but executes code from step 2.
See extract from qemu.log below. It was modified to log tlb_flush_page, too.
Stefan
tlb_flush_page: 7fab0590
tlb_flush_page: 80110154
cpu_mips_handle_mmu_fault pc 7fab0598 ad 7fab0598 rw 2 is_user 1 smmu 1
cpu_mips_handle_mmu_fault address=7fab0598 ret 0 physical 0fb42598 prot 3
------------------------------------------------
pc=0x7fab0598 HI=0x00000000 LO=0x00000038 ds 0001 8012f5d4 1
GPR00: r0 00000000 at 7fab07c0 v0 00770000 v1 00d38fd4
GPR04: a0 00882a98 a1 00000001 a2 00000000 a3 00000000
GPR08: t0 008648e0 t1 008648c8 t2 0088194c t3 00882a98
GPR12: t4 00000001 t5 00000001 t6 ffffffff t7 008648c8
GPR16: s0 0087bc20 s1 0087bc20 s2 0087bcc4 s3 7fab0868
GPR20: s4 0086cdf0 s5 00750000 s6 0087d018 s7 0087bc9c
GPR24: t8 00000000 t9 005cbe44 k0 7fab05a8 k1 8da0bfe0
GPR28: gp 00839740 sp 7fab05a8 s8 00000050 ra 00642ef8
CP0 Status 0x0000a411 Cause 0x1080002c EPC 0x7fab0598
Config0 0x80008481 Config1 0x9e190c8a LLAddr 0x00000001
IN:
0x7fab0598: addiu s4,sp,132
0x7fab059c: lw zero,1(zero)
0x7fab05a0: tne zero,zero,0x2f4
0x7fab05a4: 0x5cc048
OP:
0x0000: load_gpr_T0_gpr29
0x0001: set_T1 0x84
0x0002: add
0x0003: store_T0_gpr_gpr20
0x0004: set_T0 0x1
0x0005: lw_user
0x0006: save_pc 0x7fab05a4
0x0007: raise_exception 0x12
0x0008: interrupt_restart
0x0009: reset_T0
0x000a: exit_tb
0x000b: end
---------------- 3 00000001
search pc 1
------------------------------------------------
pc=0x7fab0598 HI=0x00000000 LO=0x00000038 ds 0001 8012f5d4 1
GPR00: r0 00000000 at 7fab07c0 v0 00770000 v1 00d38fd4
GPR04: a0 00882a98 a1 00000001 a2 00000000 a3 00000000
GPR08: t0 008648e0 t1 008648c8 t2 0088194c t3 00882a98
GPR12: t4 00000001 t5 00000001 t6 ffffffff t7 008648c8
GPR16: s0 0087bc20 s1 0087bc20 s2 0087bcc4 s3 7fab0868
GPR20: s4 7fab062c s5 00750000 s6 0087d018 s7 0087bc9c
GPR24: t8 00000000 t9 005cbe44 k0 7fab05a8 k1 8da0bfe0
GPR28: gp 00839740 sp 7fab05a8 s8 00000050 ra 00642ef8
CP0 Status 0x0000a411 Cause 0x1080002c EPC 0x7fab0598
Config0 0x80008481 Config1 0x9e190c8a LLAddr 0x00000001
IN:
0x7fab0598: addiu s4,sp,132
0x7fab059c: lw zero,1(zero)
0x7fab05a0: tne zero,zero,0x2f4
0x7fab05a4: 0x5cc048
OP:
0x0000: load_gpr_T0_gpr29
0x0001: set_T1 0x84
0x0002: add
0x0003: store_T0_gpr_gpr20
0x0004: set_T0 0x1
0x0005: lw_user
0x0006: save_pc 0x7fab05a4
0x0007: raise_exception 0x12
0x0008: interrupt_restart
0x0009: reset_T0
0x000a: exit_tb
0x000b: end
---------------- 3 00000001
do_raise_exception_err: 10 0
do_interrupt enter: PC 7fab059c EPC 7fab0598 cause -1 excp 10
do_interrupt: PC 80000180 EPC 7fab059c cause 4 excp 10
...
tlb_flush_page: 7fab0590
tlb_flush_page: 80110154
cpu_mips_handle_mmu_fault pc 80106e68 ad 7fab05a8 rw 1 is_user 0 smmu 1
cpu_mips_handle_mmu_fault address=7fab05a8 ret 0 physical 0fb425a8 prot 3
dump_sc 00000001 at 8fe90d44 (8fe90d44)
dump_sc 00000200 at 8da0a008 (8da0a008)
dump_sc 00000000 at 8da0a008 (8da0a008)
cpu_mips_handle_mmu_fault pc 80102000 ad 80102000 rw 2 is_user 0 smmu 1
cpu_mips_handle_mmu_fault address=80102000 ret 0 physical 00102000 prot 1
cpu_mips_handle_mmu_fault pc 2ad0f2c4 ad 7fab0584 rw 1 is_user 1 smmu 1
cpu_mips_handle_mmu_fault address=7fab0584 ret 0 physical 0fb42584 prot 3
search pc 1
------------------------------------------------
pc=0x7fab0598 HI=0x0000007f LO=0x003e5651 ds 0001 80177030 1
GPR00: r0 00000000 at 7fab07f8 v0 2ad59060 v1 2ad59ec8
GPR04: a0 00000000 a1 7fab0568 a2 7fab05a0 a3 00000001
GPR08: t0 fffffff8 t1 00000000 t2 6f727461 t3 fffffff4
GPR12: t4 00000000 t5 fffffffe t6 00000001 t7 0083e47c
GPR16: s0 7fab0838 s1 2ad59054 s2 2ad59060 s3 ffffffff
GPR20: s4 7fab060c s5 2ad59050 s6 00905690 s7 0071ab98
GPR24: t8 00000000 t9 2ad0f2c4 k0 7fab0820 k1 8da0bfe0
GPR28: gp 2ad61b50 sp 7fab0588 s8 0071e3bc ra 7fab0598
CP0 Status 0x0000a411 Cause 0x10800020 EPC 0x2ad0f2c4
Config0 0x80008481 Config1 0x9e190c8a LLAddr 0x00000001
IN:
0x7fab0598: li v0,4119
0x7fab059c: syscall
OP:
0x0000: reset_T0
0x0001: set_T1 0x1017
0x0002: add
0x0003: store_T0_gpr_gpr2
0x0004: save_pc 0x7fab059c
0x0005: raise_exception 0xf
0x0006: interrupt_restart
0x0007: reset_T0
0x0008: exit_tb
0x0009: end
---------------- 3 00000001
do_raise_exception_err: 10 0
do_interrupt enter: PC 7fab059c EPC 2ad0f2c4 cause -1 excp 10
do_interrupt: PC 80000180 EPC 7fab059c cause 4 excp 10
S 0000a413 C 10800010 A 00000001 D 00000000
Thiemo Seufer schrieb:
> Stefan Weil wrote:
>> This change still does not fix the problems with
>> self-modifying code in Linux FPU emulation.
>>
>> Linux FPU emulation calls mips_dsemul which calls flush_cache_sigtramp
>> which is local_r4k_flush_cache_sigtramp for MIPS 4KEc. So I had expected
>> that the new code would fix the problems with FPU emulation.
>>
>> But programs like aptitude crash (caused by FPU emulation)
>> even with latest QEMU CVS.
>
> Indeed, it fixes gdb breakpoints, though. (Which means I believe by
> now Paul was right with his analysis of the FPU problem.)
>
>
> Thiemo
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] qemu/target-mips op.c translate.c
2007-05-18 19:50 ` Thiemo Seufer
@ 2007-05-18 20:27 ` Paul Brook
2007-05-19 10:47 ` Stefan Weil
1 sibling, 0 replies; 22+ messages in thread
From: Paul Brook @ 2007-05-18 20:27 UTC (permalink / raw)
To: qemu-devel
On Friday 18 May 2007, Thiemo Seufer wrote:
> Stefan Weil wrote:
> > This change still does not fix the problems with
> > self-modifying code in Linux FPU emulation.
> >
> > Linux FPU emulation calls mips_dsemul which calls flush_cache_sigtramp
> > which is local_r4k_flush_cache_sigtramp for MIPS 4KEc. So I had expected
> > that the new code would fix the problems with FPU emulation.
> >
> > But programs like aptitude crash (caused by FPU emulation)
> > even with latest QEMU CVS.
>
> Indeed, it fixes gdb breakpoints, though. (Which means I believe by
> now Paul was right with his analysis of the FPU problem.)
I think Daniel also mentioned how to fix breakpoints properly.
Paul
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] qemu/target-mips op.c translate.c
2007-05-18 18:08 ` Stefan Weil
@ 2007-05-18 19:50 ` Thiemo Seufer
2007-05-18 20:27 ` Paul Brook
2007-05-19 10:47 ` Stefan Weil
0 siblings, 2 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-05-18 19:50 UTC (permalink / raw)
To: Stefan Weil; +Cc: qemu-devel
Stefan Weil wrote:
> This change still does not fix the problems with
> self-modifying code in Linux FPU emulation.
>
> Linux FPU emulation calls mips_dsemul which calls flush_cache_sigtramp
> which is local_r4k_flush_cache_sigtramp for MIPS 4KEc. So I had expected
> that the new code would fix the problems with FPU emulation.
>
> But programs like aptitude crash (caused by FPU emulation)
> even with latest QEMU CVS.
Indeed, it fixes gdb breakpoints, though. (Which means I believe by
now Paul was right with his analysis of the FPU problem.)
Thiemo
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] qemu/target-mips op.c translate.c
2007-05-18 1:13 Thiemo Seufer
@ 2007-05-18 18:08 ` Stefan Weil
2007-05-18 19:50 ` Thiemo Seufer
0 siblings, 1 reply; 22+ messages in thread
From: Stefan Weil @ 2007-05-18 18:08 UTC (permalink / raw)
To: qemu-devel
This change still does not fix the problems with
self-modifying code in Linux FPU emulation.
Linux FPU emulation calls mips_dsemul which calls flush_cache_sigtramp
which is local_r4k_flush_cache_sigtramp for MIPS 4KEc. So I had expected
that the new code would fix the problems with FPU emulation.
But programs like aptitude crash (caused by FPU emulation)
even with latest QEMU CVS.
Stefan
Thiemo Seufer schrieb:
> CVSROOT: /sources/qemu
> Module name: qemu
> Changes by: Thiemo Seufer <ths> 07/05/18 01:13:09
>
> Modified files:
> target-mips : op.c translate.c
>
> Log message:
> Work around the lack of proper handling for self-modifying code.
>
> CVSWeb URLs:
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.55&r2=1.56
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.78&r2=1.79
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-05-18 1:13 Thiemo Seufer
2007-05-18 18:08 ` Stefan Weil
0 siblings, 1 reply; 22+ messages in thread
From: Thiemo Seufer @ 2007-05-18 1:13 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/05/18 01:13:09
Modified files:
target-mips : op.c translate.c
Log message:
Work around the lack of proper handling for self-modifying code.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.55&r2=1.56
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.78&r2=1.79
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-05-13 18:39 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-05-13 18:39 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/05/13 18:39:10
Modified files:
target-mips : op.c translate.c
Log message:
Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.52&r2=1.53
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.77&r2=1.78
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-05-11 17:08 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-05-11 17:08 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/05/11 17:08:26
Modified files:
target-mips : op.c translate.c
Log message:
Implemented cabs FP instructions, and improve exception handling for
trunc/floor/ceil/round.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.48&r2=1.49
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.74&r2=1.75
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-05-11 9:59 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-05-11 9:59 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/05/11 09:59:10
Modified files:
target-mips : op.c translate.c
Log message:
Implement FP madd/msub, wire up bc1any[24][ft].
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.47&r2=1.48
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.72&r2=1.73
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-05-09 9:33 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-05-09 9:33 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/05/09 09:33:33
Modified files:
target-mips : op.c translate.c
Log message:
Fix MIPS64 address computation specialcase, by Aurelien Jarno.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.46&r2=1.47
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.69&r2=1.70
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-04-15 21:26 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-04-15 21:26 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/04/15 21:26:37
Modified files:
target-mips : op.c translate.c
Log message:
Don't use T2 for INS, it conflicts with branch delay slot handling.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.42&r2=1.43
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.63&r2=1.64
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-04-14 12:56 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-04-14 12:56 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/04/14 12:56:47
Modified files:
target-mips : op.c translate.c
Log message:
Restart interrupts after an exception.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.40&r2=1.41
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.61&r2=1.62
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-04-11 2:13 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-04-11 2:13 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/04/11 02:13:00
Modified files:
target-mips : op.c translate.c
Log message:
More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may
end up empty for 32bit mips, which dyngen trips over.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.38&r2=1.39
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.57&r2=1.58
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-04-09 14:17 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-04-09 14:17 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/04/09 14:17:31
Modified files:
target-mips : op.c translate.c
Log message:
Fix CP0_IntCtl handling.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.37&r2=1.38
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.56&r2=1.57
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-04-09 14:15 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-04-09 14:15 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/04/09 14:15:41
Modified files:
target-mips : op.c translate.c
Log message:
Mark watchpoint features as unimplemented.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.35&r2=1.36
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.55&r2=1.56
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-04-09 14:13 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-04-09 14:13 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/04/09 14:13:40
Modified files:
target-mips : op.c translate.c
Log message:
Fix exception handling cornercase for rdhwr.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.34&r2=1.35
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.53&r2=1.54
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2007-04-05 23:16 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2007-04-05 23:16 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 07/04/05 23:16:25
Modified files:
target-mips : op.c translate.c
Log message:
Fix RDHWR handling. Code formatting. Don't use *_direct versions to raise
exceptions.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.30&r2=1.31
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.45&r2=1.46
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2006-12-07 20:07 Thiemo Seufer
0 siblings, 0 replies; 22+ messages in thread
From: Thiemo Seufer @ 2006-12-07 20:07 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 06/12/07 20:07:37
Modified files:
target-mips : op.c translate.c
Log message:
Fix build of MIPS target without FPU support.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.15&r2=1.16
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.25&r2=1.26
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2006-11-12 23:54 Paul Brook
0 siblings, 0 replies; 22+ messages in thread
From: Paul Brook @ 2006-11-12 23:54 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Paul Brook <pbrook> 06/11/12 23:54:39
Modified files:
target-mips : op.c translate.c
Log message:
MIPS FPU fixes (Daniel Jacobowitz).
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.11&r2=1.12
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.16&r2=1.17
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] qemu/target-mips op.c translate.c
@ 2006-10-23 21:25 Fabrice Bellard
0 siblings, 0 replies; 22+ messages in thread
From: Fabrice Bellard @ 2006-10-23 21:25 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Fabrice Bellard <bellard> 06/10/23 21:25:11
Modified files:
target-mips : op.c translate.c
Log message:
add support for cvt.s.d and cvt.d.s (Aurelien Jarno)
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.9&r2=1.10
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.15&r2=1.16
^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2007-05-23 8:21 UTC | newest]
Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2007-02-27 19:27 [Qemu-devel] qemu/target-mips op.c translate.c Thiemo Seufer
-- strict thread matches above, loose matches on Subject: below --
2007-05-23 8:18 Thiemo Seufer
2007-05-19 17:45 Thiemo Seufer
2007-05-18 1:13 Thiemo Seufer
2007-05-18 18:08 ` Stefan Weil
2007-05-18 19:50 ` Thiemo Seufer
2007-05-18 20:27 ` Paul Brook
2007-05-19 10:47 ` Stefan Weil
2007-05-13 18:39 Thiemo Seufer
2007-05-11 17:08 Thiemo Seufer
2007-05-11 9:59 Thiemo Seufer
2007-05-09 9:33 Thiemo Seufer
2007-04-15 21:26 Thiemo Seufer
2007-04-14 12:56 Thiemo Seufer
2007-04-11 2:13 Thiemo Seufer
2007-04-09 14:17 Thiemo Seufer
2007-04-09 14:15 Thiemo Seufer
2007-04-09 14:13 Thiemo Seufer
2007-04-05 23:16 Thiemo Seufer
2006-12-07 20:07 Thiemo Seufer
2006-11-12 23:54 Paul Brook
2006-10-23 21:25 Fabrice Bellard
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