[U-Boot] [PATCH 1/2] rockchip: phycore: Add ID page of M24C32-D EEPROM

[U-Boot] [PATCH 1/2] rockchip: phycore: Add ID page of M24C32-D EEPROM

[Wadim Egorov]

The Identification Page (32 byte) is an additional page which can be written
and (later) permanently locked in Read-only mode.

phyCORE-RK3288 SoMs are using this page to describe the module variant.
This page also contains a MAC.

Our boards can be equipped with a different amount of EEPROMs. To make
this more transparent let's add an alias for the eeprom which stores the
module variant.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
---
 arch/arm/dts/rk3288-phycore-som.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi b/arch/arm/dts/rk3288-phycore-som.dtsi
index fd463f4..02d1196 100644
--- a/arch/arm/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/dts/rk3288-phycore-som.dtsi
@@ -61,6 +61,7 @@
 	aliases {
 		rtc0 = &i2c_rtc;
 		rtc1 = &rk818;
+		eeprom0 = &i2c_eeprom_id;
 	};
 
 	ext_gmac: external-gmac-clock {
@@ -383,6 +384,13 @@
 		pagesize = <32>;
 	};
 
+	/* M24C32-D Identification page */
+	i2c_eeprom_id: eeprom at 58 {
+		compatible = "atmel,24c32";
+		reg = <0x58>;
+		pagesize = <32>;
+	};
+
 	vdd_cpu: regulator at 60 {
 		compatible = "fcs,fan53555";
 		reg = <0x60>;
-- 
1.9.1

[U-Boot] [PATCH 2/2] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init

[Wadim Egorov]

Read SoM information from EEPROM and set ethaddr in late init.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
---
 board/phytec/phycore_rk3288/phycore-rk3288.c | 60 ++++++++++++++++++++++++++++
 board/phytec/phycore_rk3288/som.h            | 21 ++++++++++
 configs/phycore-rk3288_defconfig             |  2 +
 3 files changed, 83 insertions(+)
 create mode 100644 board/phytec/phycore_rk3288/som.h

diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
index 20696f6..e8b2e07 100644
--- a/board/phytec/phycore_rk3288/phycore-rk3288.c
+++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
@@ -5,4 +5,64 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <asm/io.h>
 #include <common.h>
+#include <dm.h>
+#include <i2c.h>
+#include <i2c_eeprom.h>
+#include <netdev.h>
+#include "som.h"
+
+static int valid_rk3288_som(struct rk3288_som *som)
+{
+	unsigned char *p = (unsigned char *)som;
+	unsigned char *e = p + sizeof(struct rk3288_som) - 1;
+	int hw = 0;
+
+	while (p < e) {
+		hw += hweight8(*p);
+		p++;
+	}
+
+	return hw == som->bs;
+}
+
+int rk_board_late_init(void)
+{
+	int ret;
+	struct udevice *dev;
+	struct rk3288_som opt;
+	int off;
+
+	/* Get the identificatioin page of M24C32-D EEPROM */
+	off = fdt_path_offset(gd->fdt_blob, "eeprom0");
+	if (!off)
+		return off;
+
+	ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev);
+	if (ret) {
+		printf("%s: Could not find EEPROM\n", __func__);
+		return ret;
+	}
+
+	ret = i2c_set_chip_offset_len(dev, 2);
+	if (ret)
+		return ret;
+
+	ret = i2c_eeprom_read(dev, 0, (uint8_t *)&opt,
+				sizeof(struct rk3288_som));
+	if (ret) {
+		printf("%s: Could not read EEPROM\n", __func__);
+		return ret;
+	}
+
+	if (opt.api_version != 0 || !valid_rk3288_som(&opt)) {
+		printf("Invalid data or wrong EEPROM layout version.\n");
+		/* Proceed anyway, since there is no fallback option */
+	}
+
+	if (is_valid_ethaddr(opt.mac))
+		eth_setenv_enetaddr("ethaddr", opt.mac);
+
+	return 0;
+}
diff --git a/board/phytec/phycore_rk3288/som.h b/board/phytec/phycore_rk3288/som.h
new file mode 100644
index 0000000..1b7f9a1
--- /dev/null
+++ b/board/phytec/phycore_rk3288/som.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/*
+ * rk3288_som struct represents the eeprom layout for PHYTEC RK3288 based SoMs
+ */
+struct rk3288_som {
+	unsigned char api_version;	/* EEPROM layout API version */
+	unsigned char mod_version;	/* PCM/PFL/PCA */
+	unsigned char option[12];	/* coding for variants */
+	unsigned char som_rev;		/* SOM revision */
+	unsigned char mac[6];
+	unsigned char ksp;		/* 1: KSP, 2: KSM */
+	unsigned char kspno;		/* Number for KSP/KSM module */
+	unsigned char reserved[8];	/* not used */
+	unsigned char bs;		/* Bits set in previous bytes */
+} __attribute__ ((__packed__));
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 823db06..bd31e4e 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -42,6 +42,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y
-- 
1.9.1

[U-Boot] [U-Boot, 1/2] rockchip: phycore: Add ID page of M24C32-D EEPROM

[Philipp Tomsich]

> The Identification Page (32 byte) is an additional page which can be written
> and (later) permanently locked in Read-only mode.
> 
> phyCORE-RK3288 SoMs are using this page to describe the module variant.
> This page also contains a MAC.
> 
> Our boards can be equipped with a different amount of EEPROMs. To make
> this more transparent let's add an alias for the eeprom which stores the
> module variant.
> 
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> ---
>  arch/arm/dts/rk3288-phycore-som.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 

Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

[U-Boot] [U-Boot, 2/2] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init

[Philipp Tomsich]

> Read SoM information from EEPROM and set ethaddr in late init.
> 
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> ---
>  board/phytec/phycore_rk3288/phycore-rk3288.c | 60 ++++++++++++++++++++++++++++
>  board/phytec/phycore_rk3288/som.h            | 21 ++++++++++
>  configs/phycore-rk3288_defconfig             |  2 +
>  3 files changed, 83 insertions(+)
>  create mode 100644 board/phytec/phycore_rk3288/som.h
> 

Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

[U-Boot] [U-Boot, 2/2] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init

[Philipp Tomsich]

On Tue, 18 Jul 2017, Wadim Egorov wrote:

> Read SoM information from EEPROM and set ethaddr in late init.
>
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
> board/phytec/phycore_rk3288/phycore-rk3288.c | 60 ++++++++++++++++++++++++++++
> board/phytec/phycore_rk3288/som.h            | 21 ++++++++++
> configs/phycore-rk3288_defconfig             |  2 +
> 3 files changed, 83 insertions(+)
> create mode 100644 board/phytec/phycore_rk3288/som.h
>
> diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
> index 20696f6..e8b2e07 100644
> --- a/board/phytec/phycore_rk3288/phycore-rk3288.c
> +++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
> @@ -5,4 +5,64 @@
>  * SPDX-License-Identifier:     GPL-2.0+
>  */
>
> +#include <asm/io.h>
> #include <common.h>
> +#include <dm.h>
> +#include <i2c.h>
> +#include <i2c_eeprom.h>
> +#include <netdev.h>
> +#include "som.h"
> +
> +static int valid_rk3288_som(struct rk3288_som *som)
> +{
> +	unsigned char *p = (unsigned char *)som;
> +	unsigned char *e = p + sizeof(struct rk3288_som) - 1;
> +	int hw = 0;
> +
> +	while (p < e) {
> +		hw += hweight8(*p);
> +		p++;
> +	}
> +
> +	return hw == som->bs;
> +}
> +
> +int rk_board_late_init(void)
> +{
> +	int ret;
> +	struct udevice *dev;
> +	struct rk3288_som opt;
> +	int off;
> +
> +	/* Get the identificatioin page of M24C32-D EEPROM */
> +	off = fdt_path_offset(gd->fdt_blob, "eeprom0");
> +	if (!off)
> +		return off;

This seems wrong:
Error returns from fdt_path_offset will be < 0 (e.g. -FDT_ERR_NOTFOUND).
Also: this would return 0, which (from what I see below) seems to indicate 
success.

> +
> +	ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev);
> +	if (ret) {
> +		printf("%s: Could not find EEPROM\n", __func__);
> +		return ret;
> +	}
> +
> +	ret = i2c_set_chip_offset_len(dev, 2);
> +	if (ret)
> +		return ret;
> +
> +	ret = i2c_eeprom_read(dev, 0, (uint8_t *)&opt,
> +				sizeof(struct rk3288_som));
> +	if (ret) {
> +		printf("%s: Could not read EEPROM\n", __func__);
> +		return ret;
> +	}
> +
> +	if (opt.api_version != 0 || !valid_rk3288_som(&opt)) {
> +		printf("Invalid data or wrong EEPROM layout version.\n");
> +		/* Proceed anyway, since there is no fallback option */
> +	}
> +
> +	if (is_valid_ethaddr(opt.mac))
> +		eth_setenv_enetaddr("ethaddr", opt.mac);
> +
> +	return 0;
> +}
> diff --git a/board/phytec/phycore_rk3288/som.h b/board/phytec/phycore_rk3288/som.h
> new file mode 100644
> index 0000000..1b7f9a1
> --- /dev/null
> +++ b/board/phytec/phycore_rk3288/som.h
> @@ -0,0 +1,21 @@
> +/*
> + * Copyright (C) 2017 PHYTEC Messtechnik GmbH
> + * Author: Wadim Egorov <w.egorov@phytec.de>
> + *
> + * SPDX-License-Identifier:     GPL-2.0+
> + */
> +
> +/*
> + * rk3288_som struct represents the eeprom layout for PHYTEC RK3288 based SoMs
> + */
> +struct rk3288_som {
> +	unsigned char api_version;	/* EEPROM layout API version */
> +	unsigned char mod_version;	/* PCM/PFL/PCA */
> +	unsigned char option[12];	/* coding for variants */
> +	unsigned char som_rev;		/* SOM revision */
> +	unsigned char mac[6];
> +	unsigned char ksp;		/* 1: KSP, 2: KSM */
> +	unsigned char kspno;		/* Number for KSP/KSM module */
> +	unsigned char reserved[8];	/* not used */
> +	unsigned char bs;		/* Bits set in previous bytes */
> +} __attribute__ ((__packed__));
> diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
> index 823db06..bd31e4e 100644
> --- a/configs/phycore-rk3288_defconfig
> +++ b/configs/phycore-rk3288_defconfig
> @@ -42,6 +42,8 @@ CONFIG_CLK=y
> CONFIG_SPL_CLK=y
> CONFIG_ROCKCHIP_GPIO=y
> CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_MISC=y
> +CONFIG_I2C_EEPROM=y
> CONFIG_MMC_DW=y
> CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_DM_ETH=y
>

[U-Boot] [U-Boot, 1/2] rockchip: phycore: Add ID page of M24C32-D EEPROM

[Philipp Tomsich]

> The Identification Page (32 byte) is an additional page which can be written
> and (later) permanently locked in Read-only mode.
> 
> phyCORE-RK3288 SoMs are using this page to describe the module variant.
> This page also contains a MAC.
> 
> Our boards can be equipped with a different amount of EEPROMs. To make
> this more transparent let's add an alias for the eeprom which stores the
> module variant.
> 
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
>  arch/arm/dts/rk3288-phycore-som.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

[U-Boot] [U-Boot, 1/2] rockchip: phycore: Add ID page of M24C32-D EEPROM

[Philipp Tomsich]

> The Identification Page (32 byte) is an additional page which can be written
> and (later) permanently locked in Read-only mode.
> 
> phyCORE-RK3288 SoMs are using this page to describe the module variant.
> This page also contains a MAC.
> 
> Our boards can be equipped with a different amount of EEPROMs. To make
> this more transparent let's add an alias for the eeprom which stores the
> module variant.
> 
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
>  arch/arm/dts/rk3288-phycore-som.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 

Applied to u-boot-rockchip, thanks!