* [U-Boot] [PATCH v3] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init
@ 2017-08-21 8:59 Wadim Egorov
2017-08-21 12:01 ` [U-Boot] [U-Boot, " Philipp Tomsich
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Wadim Egorov @ 2017-08-21 8:59 UTC (permalink / raw)
To: u-boot
Read SoM information from EEPROM and set ethaddr in late init.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
---
Changes in v3:
- Rebased to current master. Renamed eth_setenv_enetaddr()
---
board/phytec/phycore_rk3288/phycore-rk3288.c | 62 ++++++++++++++++++++++++++++
board/phytec/phycore_rk3288/som.h | 21 ++++++++++
configs/phycore-rk3288_defconfig | 2 +
3 files changed, 85 insertions(+)
create mode 100644 board/phytec/phycore_rk3288/som.h
diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
index 20696f6..47b069e 100644
--- a/board/phytec/phycore_rk3288/phycore-rk3288.c
+++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
@@ -5,4 +5,66 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <asm/io.h>
#include <common.h>
+#include <dm.h>
+#include <i2c.h>
+#include <i2c_eeprom.h>
+#include <netdev.h>
+#include "som.h"
+
+static int valid_rk3288_som(struct rk3288_som *som)
+{
+ unsigned char *p = (unsigned char *)som;
+ unsigned char *e = p + sizeof(struct rk3288_som) - 1;
+ int hw = 0;
+
+ while (p < e) {
+ hw += hweight8(*p);
+ p++;
+ }
+
+ return hw == som->bs;
+}
+
+int rk_board_late_init(void)
+{
+ int ret;
+ struct udevice *dev;
+ struct rk3288_som opt;
+ int off;
+
+ /* Get the identificatioin page of M24C32-D EEPROM */
+ off = fdt_path_offset(gd->fdt_blob, "eeprom0");
+ if (off < 0) {
+ printf("%s: No eeprom0 path offset\n", __func__);
+ return off;
+ }
+
+ ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev);
+ if (ret) {
+ printf("%s: Could not find EEPROM\n", __func__);
+ return ret;
+ }
+
+ ret = i2c_set_chip_offset_len(dev, 2);
+ if (ret)
+ return ret;
+
+ ret = i2c_eeprom_read(dev, 0, (uint8_t *)&opt,
+ sizeof(struct rk3288_som));
+ if (ret) {
+ printf("%s: Could not read EEPROM\n", __func__);
+ return ret;
+ }
+
+ if (opt.api_version != 0 || !valid_rk3288_som(&opt)) {
+ printf("Invalid data or wrong EEPROM layout version.\n");
+ /* Proceed anyway, since there is no fallback option */
+ }
+
+ if (is_valid_ethaddr(opt.mac))
+ eth_env_set_enetaddr("ethaddr", opt.mac);
+
+ return 0;
+}
diff --git a/board/phytec/phycore_rk3288/som.h b/board/phytec/phycore_rk3288/som.h
new file mode 100644
index 0000000..1b7f9a1
--- /dev/null
+++ b/board/phytec/phycore_rk3288/som.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * rk3288_som struct represents the eeprom layout for PHYTEC RK3288 based SoMs
+ */
+struct rk3288_som {
+ unsigned char api_version; /* EEPROM layout API version */
+ unsigned char mod_version; /* PCM/PFL/PCA */
+ unsigned char option[12]; /* coding for variants */
+ unsigned char som_rev; /* SOM revision */
+ unsigned char mac[6];
+ unsigned char ksp; /* 1: KSP, 2: KSM */
+ unsigned char kspno; /* Number for KSP/KSM module */
+ unsigned char reserved[8]; /* not used */
+ unsigned char bs; /* Bits set in previous bytes */
+} __attribute__ ((__packed__));
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 70dc3f7..6ad70ab 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -43,6 +43,8 @@ CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_DM_ETH=y
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [U-Boot, v3] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init
2017-08-21 8:59 [U-Boot] [PATCH v3] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init Wadim Egorov
@ 2017-08-21 12:01 ` Philipp Tomsich
2017-08-21 12:01 ` Philipp Tomsich
2017-08-21 13:01 ` Philipp Tomsich
2 siblings, 0 replies; 4+ messages in thread
From: Philipp Tomsich @ 2017-08-21 12:01 UTC (permalink / raw)
To: u-boot
> Read SoM information from EEPROM and set ethaddr in late init.
>
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> ---
> Changes in v3:
> - Rebased to current master. Renamed eth_setenv_enetaddr()
> ---
> board/phytec/phycore_rk3288/phycore-rk3288.c | 62 ++++++++++++++++++++++++++++
> board/phytec/phycore_rk3288/som.h | 21 ++++++++++
> configs/phycore-rk3288_defconfig | 2 +
> 3 files changed, 85 insertions(+)
> create mode 100644 board/phytec/phycore_rk3288/som.h
>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [U-Boot, v3] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init
2017-08-21 8:59 [U-Boot] [PATCH v3] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init Wadim Egorov
2017-08-21 12:01 ` [U-Boot] [U-Boot, " Philipp Tomsich
@ 2017-08-21 12:01 ` Philipp Tomsich
2017-08-21 13:01 ` Philipp Tomsich
2 siblings, 0 replies; 4+ messages in thread
From: Philipp Tomsich @ 2017-08-21 12:01 UTC (permalink / raw)
To: u-boot
> Read SoM information from EEPROM and set ethaddr in late init.
>
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> ---
> Changes in v3:
> - Rebased to current master. Renamed eth_setenv_enetaddr()
> ---
> board/phytec/phycore_rk3288/phycore-rk3288.c | 62 ++++++++++++++++++++++++++++
> board/phytec/phycore_rk3288/som.h | 21 ++++++++++
> configs/phycore-rk3288_defconfig | 2 +
> 3 files changed, 85 insertions(+)
> create mode 100644 board/phytec/phycore_rk3288/som.h
>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [U-Boot, v3] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init
2017-08-21 8:59 [U-Boot] [PATCH v3] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init Wadim Egorov
2017-08-21 12:01 ` [U-Boot] [U-Boot, " Philipp Tomsich
2017-08-21 12:01 ` Philipp Tomsich
@ 2017-08-21 13:01 ` Philipp Tomsich
2 siblings, 0 replies; 4+ messages in thread
From: Philipp Tomsich @ 2017-08-21 13:01 UTC (permalink / raw)
To: u-boot
> Read SoM information from EEPROM and set ethaddr in late init.
>
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
> Changes in v3:
> - Rebased to current master. Renamed eth_setenv_enetaddr()
> ---
> board/phytec/phycore_rk3288/phycore-rk3288.c | 62 ++++++++++++++++++++++++++++
> board/phytec/phycore_rk3288/som.h | 21 ++++++++++
> configs/phycore-rk3288_defconfig | 2 +
> 3 files changed, 85 insertions(+)
> create mode 100644 board/phytec/phycore_rk3288/som.h
>
Applied to u-boot-rockchip, thanks!
^ permalink raw reply [flat|nested] 4+ messages in thread
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2017-08-21 8:59 [U-Boot] [PATCH v3] rockchip: phycore: Read configuration EEPROM & set ethaddr in late init Wadim Egorov
2017-08-21 12:01 ` [U-Boot] [U-Boot, " Philipp Tomsich
2017-08-21 12:01 ` Philipp Tomsich
2017-08-21 13:01 ` Philipp Tomsich
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