From: Russell King <rmk+kernel@armlinux.org.uk> To: linux-arm-kernel@lists.infradead.org Cc: Marc Zyngier <marc.zyngier@arm.com>, Florian Fainelli <f.fainelli@gmail.com>, kvmarm@lists.cs.columbia.edu, Christoffer Dall <christoffer.dall@linaro.org> Subject: [PATCH 07/14] ARM: spectre-v2: add Cortex A8 and A15 validation of the IBE bit Date: Wed, 16 May 2018 12:01:13 +0100 [thread overview] Message-ID: <E1fIuBF-0003q0-3d@rmk-PC.armlinux.org.uk> (raw) In-Reply-To: <20180516105949.GJ16141@n2100.armlinux.org.uk> When the branch predictor hardening is enabled, firmware must have set the IBE bit in the auxiliary control register. If this bit has not been set, the Spectre workarounds will not be functional. Add validation that this bit is set, and print a warning at alert level if this is not the case. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> --- arch/arm/mm/Makefile | 2 +- arch/arm/mm/proc-v7-bugs.c | 29 +++++++++++++++++++++++++++++ arch/arm/mm/proc-v7.S | 4 ++-- 3 files changed, 32 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mm/proc-v7-bugs.c diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 9dbb84923e12..a0c40610210c 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile @@ -97,7 +97,7 @@ obj-$(CONFIG_CPU_MOHAWK) += proc-mohawk.o obj-$(CONFIG_CPU_FEROCEON) += proc-feroceon.o obj-$(CONFIG_CPU_V6) += proc-v6.o obj-$(CONFIG_CPU_V6K) += proc-v6.o -obj-$(CONFIG_CPU_V7) += proc-v7.o +obj-$(CONFIG_CPU_V7) += proc-v7.o proc-v7-bugs.o obj-$(CONFIG_CPU_V7M) += proc-v7m.o AFLAGS_proc-v6.o :=-Wa,-march=armv6 diff --git a/arch/arm/mm/proc-v7-bugs.c b/arch/arm/mm/proc-v7-bugs.c new file mode 100644 index 000000000000..a32ce13479d9 --- /dev/null +++ b/arch/arm/mm/proc-v7-bugs.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0 +#include <linux/kernel.h> +#include <linux/smp.h> + +static __maybe_unused void cpu_v7_check_auxcr_set(u32 mask, const char *msg) +{ + u32 aux_cr; + + asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (aux_cr)); + + if ((aux_cr & mask) != mask) + pr_err("CPU%u: %s", smp_processor_id(), msg); +} + +static void check_spectre_auxcr(u32 bit) +{ + if (IS_ENABLED(CONFIG_HARDEN_BRANCH_PREDICTOR)) + cpu_v7_check_auxcr_set(bit, "Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable\n"); +} + +void cpu_v7_ca8_ibe(void) +{ + check_spectre_auxcr(BIT(6)); +} + +void cpu_v7_ca15_ibe(void) +{ + check_spectre_auxcr(BIT(0)); +} diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 9c3d4c24f720..5cfed34fd1af 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -570,7 +570,7 @@ ENDPROC(__v7_setup) globl_equ cpu_ca8_do_suspend, cpu_v7_do_suspend globl_equ cpu_ca8_do_resume, cpu_v7_do_resume #endif - define_processor_functions ca8, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 + define_processor_functions ca8, dabort=v7_early_abort, pabort=v7_pabort, suspend=1, bugs=cpu_v7_ca8_ibe @ Cortex-A9 - needs more registers preserved across suspend/resume @ and bpiall switch_mm for hardening @@ -603,7 +603,7 @@ ENDPROC(__v7_setup) globl_equ cpu_ca15_suspend_size, cpu_v7_suspend_size globl_equ cpu_ca15_do_suspend, cpu_v7_do_suspend globl_equ cpu_ca15_do_resume, cpu_v7_do_resume - define_processor_functions ca15, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 + define_processor_functions ca15, dabort=v7_early_abort, pabort=v7_pabort, suspend=1, bugs=cpu_v7_ca15_ibe #ifdef CONFIG_CPU_PJ4B define_processor_functions pj4b, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 #endif -- 2.7.4
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From: rmk+kernel@armlinux.org.uk (Russell King) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 07/14] ARM: spectre-v2: add Cortex A8 and A15 validation of the IBE bit Date: Wed, 16 May 2018 12:01:13 +0100 [thread overview] Message-ID: <E1fIuBF-0003q0-3d@rmk-PC.armlinux.org.uk> (raw) In-Reply-To: <20180516105949.GJ16141@n2100.armlinux.org.uk> When the branch predictor hardening is enabled, firmware must have set the IBE bit in the auxiliary control register. If this bit has not been set, the Spectre workarounds will not be functional. Add validation that this bit is set, and print a warning at alert level if this is not the case. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> --- arch/arm/mm/Makefile | 2 +- arch/arm/mm/proc-v7-bugs.c | 29 +++++++++++++++++++++++++++++ arch/arm/mm/proc-v7.S | 4 ++-- 3 files changed, 32 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mm/proc-v7-bugs.c diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 9dbb84923e12..a0c40610210c 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile @@ -97,7 +97,7 @@ obj-$(CONFIG_CPU_MOHAWK) += proc-mohawk.o obj-$(CONFIG_CPU_FEROCEON) += proc-feroceon.o obj-$(CONFIG_CPU_V6) += proc-v6.o obj-$(CONFIG_CPU_V6K) += proc-v6.o -obj-$(CONFIG_CPU_V7) += proc-v7.o +obj-$(CONFIG_CPU_V7) += proc-v7.o proc-v7-bugs.o obj-$(CONFIG_CPU_V7M) += proc-v7m.o AFLAGS_proc-v6.o :=-Wa,-march=armv6 diff --git a/arch/arm/mm/proc-v7-bugs.c b/arch/arm/mm/proc-v7-bugs.c new file mode 100644 index 000000000000..a32ce13479d9 --- /dev/null +++ b/arch/arm/mm/proc-v7-bugs.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0 +#include <linux/kernel.h> +#include <linux/smp.h> + +static __maybe_unused void cpu_v7_check_auxcr_set(u32 mask, const char *msg) +{ + u32 aux_cr; + + asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (aux_cr)); + + if ((aux_cr & mask) != mask) + pr_err("CPU%u: %s", smp_processor_id(), msg); +} + +static void check_spectre_auxcr(u32 bit) +{ + if (IS_ENABLED(CONFIG_HARDEN_BRANCH_PREDICTOR)) + cpu_v7_check_auxcr_set(bit, "Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable\n"); +} + +void cpu_v7_ca8_ibe(void) +{ + check_spectre_auxcr(BIT(6)); +} + +void cpu_v7_ca15_ibe(void) +{ + check_spectre_auxcr(BIT(0)); +} diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 9c3d4c24f720..5cfed34fd1af 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -570,7 +570,7 @@ ENDPROC(__v7_setup) globl_equ cpu_ca8_do_suspend, cpu_v7_do_suspend globl_equ cpu_ca8_do_resume, cpu_v7_do_resume #endif - define_processor_functions ca8, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 + define_processor_functions ca8, dabort=v7_early_abort, pabort=v7_pabort, suspend=1, bugs=cpu_v7_ca8_ibe @ Cortex-A9 - needs more registers preserved across suspend/resume @ and bpiall switch_mm for hardening @@ -603,7 +603,7 @@ ENDPROC(__v7_setup) globl_equ cpu_ca15_suspend_size, cpu_v7_suspend_size globl_equ cpu_ca15_do_suspend, cpu_v7_do_suspend globl_equ cpu_ca15_do_resume, cpu_v7_do_resume - define_processor_functions ca15, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 + define_processor_functions ca15, dabort=v7_early_abort, pabort=v7_pabort, suspend=1, bugs=cpu_v7_ca15_ibe #ifdef CONFIG_CPU_PJ4B define_processor_functions pj4b, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 #endif -- 2.7.4
next prev parent reply other threads:[~2018-05-16 10:52 UTC|newest] Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-05-16 10:59 [PATCH 0/14] ARM Spectre variant 2 fixes Russell King - ARM Linux 2018-05-16 10:59 ` Russell King - ARM Linux 2018-05-16 11:00 ` [PATCH 01/14] ARM: add CPU part numbers for Cortex A73, A75 and Brahma B15 Russell King 2018-05-16 11:00 ` Russell King 2018-05-16 16:19 ` Florian Fainelli 2018-05-16 16:19 ` Florian Fainelli 2018-05-16 11:00 ` [PATCH 02/14] ARM: bugs: prepare processor bug infrastructure Russell King 2018-05-16 11:00 ` Russell King 2018-05-16 16:21 ` Florian Fainelli 2018-05-16 16:21 ` Florian Fainelli 2018-05-16 11:00 ` [PATCH 03/14] ARM: bugs: hook processor bug checking into SMP and suspend paths Russell King 2018-05-16 11:00 ` Russell King 2018-05-16 16:23 ` Florian Fainelli 2018-05-16 16:23 ` Florian Fainelli 2018-05-19 10:13 ` Russell King - ARM Linux 2018-05-19 10:13 ` Russell King - ARM Linux 2018-05-16 11:00 ` [PATCH 04/14] ARM: bugs: add support for per-processor bug checking Russell King 2018-05-16 11:00 ` Russell King 2018-05-16 16:23 ` Florian Fainelli 2018-05-16 16:23 ` Florian Fainelli 2018-05-16 11:01 ` [PATCH 05/14] ARM: spectre: add Kconfig symbol for CPUs vulnerable to Spectre Russell King 2018-05-16 11:01 ` Russell King 2018-05-16 16:24 ` Florian Fainelli 2018-05-16 16:24 ` Florian Fainelli 2018-05-16 11:01 ` [PATCH 06/14] ARM: spectre-v2: harden branch predictor on context switches Russell King 2018-05-16 11:01 ` Russell King 2018-05-16 11:33 ` Vladimir Murzin 2018-05-16 11:33 ` Vladimir Murzin 2018-05-16 11:01 ` Russell King [this message] 2018-05-16 11:01 ` [PATCH 07/14] ARM: spectre-v2: add Cortex A8 and A15 validation of the IBE bit Russell King 2018-05-16 16:33 ` Florian Fainelli 2018-05-16 16:33 ` Florian Fainelli 2018-05-16 16:34 ` Florian Fainelli 2018-05-16 16:34 ` Florian Fainelli 2018-05-22 10:38 ` Geert Uytterhoeven 2018-05-22 10:38 ` Geert Uytterhoeven 2018-05-22 10:55 ` Russell King - ARM Linux 2018-05-22 10:55 ` Russell King - ARM Linux 2018-05-16 11:01 ` [PATCH 08/14] ARM: spectre-v2: harden user aborts in kernel space Russell King 2018-05-16 11:01 ` Russell King 2018-05-16 16:35 ` Florian Fainelli 2018-05-16 16:35 ` Florian Fainelli 2018-05-16 11:01 ` [PATCH 09/14] ARM: spectre-v2: add PSCI based hardening Russell King 2018-05-16 11:01 ` Russell King 2018-05-16 17:01 ` Marc Zyngier 2018-05-16 17:01 ` Marc Zyngier 2018-05-16 11:01 ` [PATCH 10/14] ARM: KVM: invalidate BTB on guest exit for Cortex-A12/A17 Russell King 2018-05-16 11:01 ` Russell King 2018-05-16 11:01 ` [PATCH 11/14] ARM: KVM: invalidate icache on guest exit for Cortex-A15 Russell King 2018-05-16 11:01 ` Russell King 2018-05-16 11:01 ` [PATCH 12/14] ARM: spectre-v2: KVM: invalidate icache on guest exit for Brahma B15 Russell King 2018-05-16 11:01 ` Russell King 2018-05-16 16:27 ` Florian Fainelli 2018-05-16 16:27 ` Florian Fainelli 2018-05-16 11:01 ` [PATCH 13/14] ARM: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling Russell King 2018-05-16 11:01 ` Russell King 2018-05-16 11:01 ` [PATCH 14/14] ARM: KVM: report support for SMCCC_ARCH_WORKAROUND_1 Russell King 2018-05-16 11:01 ` Russell King 2018-05-21 11:42 [PATCH v2 00/14] ARM Spectre variant 2 fixes Russell King - ARM Linux 2018-05-21 11:44 ` [PATCH 07/14] ARM: spectre-v2: add Cortex A8 and A15 validation of the IBE bit Russell King 2018-05-21 11:44 ` Russell King 2018-05-22 18:28 ` Tony Lindgren 2018-05-22 18:28 ` Tony Lindgren
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