From: Russell King <rmk+kernel@armlinux.org.uk>
To: Robin Murphy <robin.murphy@arm.com>,
dann frazier <dann.frazier@canonical.com>,
Will Deacon <will.deacon@arm.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
"Y.b. Lu" <yangbo.lu@nxp.com>, Christoph Hellwig <hch@lst.de>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Li Yang <leoyang.li@nxp.com>,
Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] arm64: dts: mark lx2160a esdhc controllers dma coherent
Date: Sun, 22 Sep 2019 11:27:03 +0100 [thread overview]
Message-ID: <E1iBz55-0008Mj-CX@rmk-PC.armlinux.org.uk> (raw)
In-Reply-To: <20190922102341.GO25745@shell.armlinux.org.uk>
The LX2160A esdhc controllers are setup by the driver to be DMA
coherent, but without marking them as such in DT, Linux thinks they
are not. This can lead to random sporadic DMA errors, even to the
extent of preventing boot, such as:
mmc0: ADMA error
mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00002202
mmc0: sdhci: Blk size: 0x00000008 | Blk cnt: 0x00000001
mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000013
mmc0: sdhci: Present: 0x01f50008 | Host ctl: 0x00000038
mmc0: sdhci: Power: 0x00000003 | Blk gap: 0x00000000
mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x000040d8
mmc0: sdhci: Timeout: 0x00000003 | Int stat: 0x00000001
mmc0: sdhci: Int enab: 0x037f108f | Sig enab: 0x037f108b
mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
mmc0: sdhci: Caps: 0x35fa0000 | Caps_1: 0x0000af00
mmc0: sdhci: Cmd: 0x0000333a | Max curr: 0x00000000
mmc0: sdhci: Resp[0]: 0x00000920 | Resp[1]: 0x001d8a33
mmc0: sdhci: Resp[2]: 0x325b5900 | Resp[3]: 0x3f400e00
mmc0: sdhci: Host ctl2: 0x00000000
mmc0: sdhci: ADMA Err: 0x00000009 | ADMA Ptr: 0x000000236d43820c
mmc0: sdhci: ============================================
mmc0: error -5 whilst initialising SD card
These are caused by the device's descriptor fetch hitting speculatively
loaded CPU cache lines that the CPU does not see through the normal,
non-cacheable DMA coherent mapping that it uses for non-coherent
devices.
DT and the device must agree wrt whether the device is DMA coherent or
not.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 36b153e3da47..508af23edef0 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -593,6 +593,7 @@
reg = <0x0 0x2140000 0x0 0x10000>;
interrupts = <0 28 0x4>; /* Level high type */
clocks = <&clockgen 4 1>;
+ dma-coherent;
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
little-endian;
@@ -605,6 +606,7 @@
reg = <0x0 0x2150000 0x0 0x10000>;
interrupts = <0 63 0x4>; /* Level high type */
clocks = <&clockgen 4 1>;
+ dma-coherent;
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
broken-cd;
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Russell King <rmk+kernel@armlinux.org.uk>
To: Robin Murphy <robin.murphy@arm.com>,
dann frazier <dann.frazier@canonical.com>,
Will Deacon <will.deacon@arm.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
"Y.b. Lu" <yangbo.lu@nxp.com>, Christoph Hellwig <hch@lst.de>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Li Yang <leoyang.li@nxp.com>,
Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] arm64: dts: mark lx2160a esdhc controllers dma coherent
Date: Sun, 22 Sep 2019 11:27:03 +0100 [thread overview]
Message-ID: <E1iBz55-0008Mj-CX@rmk-PC.armlinux.org.uk> (raw)
In-Reply-To: <20190922102341.GO25745@shell.armlinux.org.uk>
The LX2160A esdhc controllers are setup by the driver to be DMA
coherent, but without marking them as such in DT, Linux thinks they
are not. This can lead to random sporadic DMA errors, even to the
extent of preventing boot, such as:
mmc0: ADMA error
mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00002202
mmc0: sdhci: Blk size: 0x00000008 | Blk cnt: 0x00000001
mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000013
mmc0: sdhci: Present: 0x01f50008 | Host ctl: 0x00000038
mmc0: sdhci: Power: 0x00000003 | Blk gap: 0x00000000
mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x000040d8
mmc0: sdhci: Timeout: 0x00000003 | Int stat: 0x00000001
mmc0: sdhci: Int enab: 0x037f108f | Sig enab: 0x037f108b
mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
mmc0: sdhci: Caps: 0x35fa0000 | Caps_1: 0x0000af00
mmc0: sdhci: Cmd: 0x0000333a | Max curr: 0x00000000
mmc0: sdhci: Resp[0]: 0x00000920 | Resp[1]: 0x001d8a33
mmc0: sdhci: Resp[2]: 0x325b5900 | Resp[3]: 0x3f400e00
mmc0: sdhci: Host ctl2: 0x00000000
mmc0: sdhci: ADMA Err: 0x00000009 | ADMA Ptr: 0x000000236d43820c
mmc0: sdhci: ============================================
mmc0: error -5 whilst initialising SD card
These are caused by the device's descriptor fetch hitting speculatively
loaded CPU cache lines that the CPU does not see through the normal,
non-cacheable DMA coherent mapping that it uses for non-coherent
devices.
DT and the device must agree wrt whether the device is DMA coherent or
not.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 36b153e3da47..508af23edef0 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -593,6 +593,7 @@
reg = <0x0 0x2140000 0x0 0x10000>;
interrupts = <0 28 0x4>; /* Level high type */
clocks = <&clockgen 4 1>;
+ dma-coherent;
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
little-endian;
@@ -605,6 +606,7 @@
reg = <0x0 0x2150000 0x0 0x10000>;
interrupts = <0 63 0x4>; /* Level high type */
clocks = <&clockgen 4 1>;
+ dma-coherent;
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
broken-cd;
--
2.7.4
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-09-22 10:27 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-22 10:23 [PATCH 0/3] Fix sdhci-of-esdhc DMA coherency Russell King - ARM Linux admin
2019-09-22 10:23 ` Russell King - ARM Linux admin
2019-09-22 10:27 ` Russell King [this message]
2019-09-22 10:27 ` [PATCH 3/3] arm64: dts: mark lx2160a esdhc controllers dma coherent Russell King
2019-09-23 16:00 ` Li Yang
2019-09-23 16:00 ` Li Yang
2019-09-23 21:26 ` Ulf Hansson
2019-09-23 21:26 ` Ulf Hansson
2019-09-24 3:41 ` Leo Li
2019-09-24 3:41 ` Leo Li
2019-09-24 18:04 ` Robin Murphy
2019-09-24 18:04 ` Robin Murphy
2019-09-27 18:35 ` Ulf Hansson
2019-09-27 18:35 ` Ulf Hansson
2019-10-07 12:42 ` Shawn Guo
2019-10-07 12:42 ` Shawn Guo
[not found] ` <E1iBz50-0008Mc-8K@rmk-PC.armlinux.org.uk>
2020-01-20 10:09 ` [PATCH 2/3] mmc: sdhci-of-esdhc: set DMA snooping based on DMA coherence Y.b. Lu
2020-01-20 10:20 ` Russell King - ARM Linux admin
2020-01-20 13:34 ` Robin Murphy
2020-02-05 5:56 ` Y.b. Lu
2020-02-05 7:56 ` Ulf Hansson
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