FW: [patch 0/4]Enable CMCI (Corrected Machine Check Error Interrupt) for Intel CPUs

* FW: [patch 0/4]Enable CMCI (Corrected Machine Check Error Interrupt) for Intel CPUs
@ 2008-12-19  6:09 Ke, Liping
  2008-12-19 14:50 ` Keir Fraser
  0 siblings, 1 reply; 3+ messages in thread
From: Ke, Liping @ 2008-12-19  6:09 UTC (permalink / raw)
  To: Keir Fraser; +Cc: xen-devel

Hi, All

Following 4 patches are for enabling CMCI of Intel CPUs in XEN.
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Patch 1: remove_intel_mce_old.patch is to remove old p4/p6 files. The reason is that machine check architecture for Intel families including p4/p6/latest are similar. We need not keep duplicated codes.
Patch 2: change_stop_machine_run.patch changes stopmachine_run interface so that we can designate the callback function running on the cpu_map instead of single one. We do this change because *cmci owner change* callback (please refer to note 3 below) needs to be executed on each of online cpus when do CPU hotplug.
Patch 3: apic_cmci.patch adds the new CMCI LVT entry.
Patch 4: clean_and_cmci.patch contains the main CMCI support logic including CMCI interrupt handler, CMCI owner judge algorithm and polling mechanism, etc

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About Test 
We wrote CMCI injection tool to test the patch. Also we wrote DOM0 test patches to see whether logs are accepted by DOM0.
We test the patches on both CMCI-support and NO-CMCI-support machine.
We test the patches combined with CPU online/offline ops and S3&S5 ops which cause banks owner changing
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Below notes might be helpful
1) CMCI use another apic_lvt entry (now max_lvt could be 6 in newer Intel platform)

2) CMCI is combined with polling mechanism since some CPUs don't support CMCI. And for supporting CPUs, still some banks don't support CMCI. So we keep polling mechanism.

3) MCA banks shares between cores/threads. For avoiding mis-ops, we need to judge *owner* for each bank. Each bank only has one owner, the owner manages the bank. The owner will be set up when cpu_up. Owners might be changed when doing cpu-hotplug.

4) When one CMCI interrupt is accepted and logged by XEN, XEN will notify DOM0. We don't plan to check in DOM0 code now.

For more info, please refer to latest Intel software development manual, 
Chapter 14.
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Machine check (Uncorrectable Error) support will be sent in later patches, so we keep old machine check handling code. 

Any comment, just let us know. 
Thanks a lot for your help!
Regards,
Criping

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