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From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: "BALATON Zoltan via" <qemu-devel@nongnu.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: Re: [RFC PATCH 3/3] hw/mips: Add MIPS VirtIO board
Date: Fri, 25 Nov 2022 18:06:42 +0000	[thread overview]
Message-ID: <E9983F77-999E-4CAE-B1E1-78D8B892D87D@flygoat.com> (raw)
In-Reply-To: <f1270702-699b-a8c9-95fd-8bf668d6f7e5@linaro.org>



> 2022年11月25日 13:25,Philippe Mathieu-Daudé <philmd@linaro.org> 写道:
> 
> On 24/11/22 22:29, Jiaxun Yang wrote:
>> MIPS VirtIO board is design to utilize existing VirtIO infrastures
>> but also comptitable with MIPS's existing internal simulation tools.
>> It includes virtio-mmio, pcie gpex, flash rom, fw_cfg, goldfish-rtc,
>> and optional goldfish_pic in case MIPS GIC is not present.
>> It should be able to cooperate with any MIPS CPU cores.
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> ---
>>  configs/devices/mips-softmmu/common.mak |    1 +
>>  hw/mips/Kconfig                         |   18 +
>>  hw/mips/meson.build                     |    1 +
>>  hw/mips/virt.c                          | 1039 +++++++++++++++++++++++
>>  4 files changed, 1059 insertions(+)
>>  create mode 100644 hw/mips/virt.c
>> diff --git a/configs/devices/mips-softmmu/common.mak b/configs/devices/mips-softmmu/common.mak
>> index 416161f833..534b7843eb 100644
>> --- a/configs/devices/mips-softmmu/common.mak
>> +++ b/configs/devices/mips-softmmu/common.mak
>> @@ -29,6 +29,7 @@ CONFIG_MC146818RTC=y
>>  CONFIG_EMPTY_SLOT=y
>>  CONFIG_MIPS_CPS=y
>>  CONFIG_MIPS_ITU=y
>> +CONFIG_MIPS_VIRT=y
> 
> Is there any value adding the 32-bit machine, or can we just add it as 64-bit?

Well because it can boot with generic kernel so people can still test it again various
32bit cores like old 4K / 24K / and newer P5600 / Ingenic XBurst / I7200.

There will be some new 32-bit nanoMIPS products,  though they will run highly customised
software instead of Linux stuff :-(

> 
>> +struct MIPSVirtState {
>> +    MachineState parent;
>> +
>> +    Notifier machine_done;
>> +    Clock *cpuclk;
>> +    DeviceState *platform_bus_dev;
>> +    MIPSCPSState *cps;
>> +    DeviceState *pic;
>> +    PFlashCFI01 *flash[2];
> 
> We should be fine with 1 ROM for CODE and 1 flash for VARS,
> see my previous comments on the LoongArch virt machine:
> 
> https://lore.kernel.org/qemu-devel/2f381d06-842f-ac8b-085c-0419675a4872@linaro.org/
> https://lore.kernel.org/qemu-devel/b62401b2-3a12-e89d-6953-b40dd170b4ba@linaro.org/

Will use use this scheme, thanks.
Any recommendation on size of those two regions?

Thanks
- Jiaxun

> 
>> +    FWCfgState *fw_cfg;
>> +
>> +    MIPSVirtPlatType plat_type;
>> +    int fdt_size;
>> +};




      reply	other threads:[~2022-11-25 18:07 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-24 21:29 [RFC PATCH 0/3] MIPS VirtIO Machine Jiaxun Yang
2022-11-24 21:29 ` [RFC PATCH 1/3] hw/intc: Add missing include for goldfish_pic.h Jiaxun Yang
2022-11-25 13:28   ` Philippe Mathieu-Daudé
2022-11-24 21:29 ` [RFC PATCH 2/3] hw/misc: Add MIPS Trickbox device Jiaxun Yang
2022-11-25 12:57   ` BALATON Zoltan
2022-11-24 21:29 ` [RFC PATCH 3/3] hw/mips: Add MIPS VirtIO board Jiaxun Yang
2022-11-25 13:05   ` BALATON Zoltan
2022-11-25 13:25   ` Philippe Mathieu-Daudé
2022-11-25 18:06     ` Jiaxun Yang [this message]

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