* [PATCH] omap: i2c: Add i2c support on omap4 platform
@ 2010-02-19 16:33 Santosh Shilimkar
[not found] ` <1266597180-25139-1-git-send-email-santosh.shilimkar-l0cyMroinI0@public.gmane.org>
2010-03-07 22:18 ` Ben Dooks
0 siblings, 2 replies; 13+ messages in thread
From: Santosh Shilimkar @ 2010-02-19 16:33 UTC (permalink / raw)
To: ben-linux-elnMNo+KYs3YtjvyW6yDsg
Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Santosh Shilimkar,
Syed Rafiuddin, Cory Maccarrone
This patch is rebased version of earlier post to add I2C
driver support to OMAP4 platform. On OMAP4, all
I2C register address offsets are changed from OMAP1/2/3 I2C.
In order to not have #ifdef's at various places in code,
as well as to support multi-OMAP build, an array is created
to hold the register addresses with it's offset.
This patch was submitted, reviewed and acked on mailing list
already. For more details refer below link
http://www.mail-archive.com/linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org/msg02281.html
This updated verion has a depedancy on "Add support for 16-bit registers"
posted on linux-omap. Below is the patch-works link for the same
http://patchwork.kernel.org/patch/72295/
Signed-off-by: Syed Rafiuddin <rafiuddin.syed-l0cyMroinI0@public.gmane.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>
Acked-by: Kevin Hilman <khilman-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org>
Reviewed-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>
Reviewed-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
Cc: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
drivers/i2c/busses/i2c-omap.c | 146 ++++++++++++++++++++++++++++++++---------
1 files changed, 114 insertions(+), 32 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 9c3ce4d..7c15496 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -44,29 +44,37 @@
/* I2C controller revisions present on specific hardware */
#define OMAP_I2C_REV_ON_2430 0x36
#define OMAP_I2C_REV_ON_3430 0x3C
+#define OMAP_I2C_REV_ON_4430 0x40
/* timeout waiting for the controller to respond */
#define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
-#define OMAP_I2C_REV_REG 0x00
-#define OMAP_I2C_IE_REG 0x01
-#define OMAP_I2C_STAT_REG 0x02
-#define OMAP_I2C_IV_REG 0x03
/* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
-#define OMAP_I2C_WE_REG 0x03
-#define OMAP_I2C_SYSS_REG 0x04
-#define OMAP_I2C_BUF_REG 0x05
-#define OMAP_I2C_CNT_REG 0x06
-#define OMAP_I2C_DATA_REG 0x07
-#define OMAP_I2C_SYSC_REG 0x08
-#define OMAP_I2C_CON_REG 0x09
-#define OMAP_I2C_OA_REG 0x0a
-#define OMAP_I2C_SA_REG 0x0b
-#define OMAP_I2C_PSC_REG 0x0c
-#define OMAP_I2C_SCLL_REG 0x0d
-#define OMAP_I2C_SCLH_REG 0x0e
-#define OMAP_I2C_SYSTEST_REG 0x0f
-#define OMAP_I2C_BUFSTAT_REG 0x10
+enum {
+ OMAP_I2C_REV_REG = 0,
+ OMAP_I2C_IE_REG,
+ OMAP_I2C_STAT_REG,
+ OMAP_I2C_IV_REG,
+ OMAP_I2C_WE_REG,
+ OMAP_I2C_SYSS_REG,
+ OMAP_I2C_BUF_REG,
+ OMAP_I2C_CNT_REG,
+ OMAP_I2C_DATA_REG,
+ OMAP_I2C_SYSC_REG,
+ OMAP_I2C_CON_REG,
+ OMAP_I2C_OA_REG,
+ OMAP_I2C_SA_REG,
+ OMAP_I2C_PSC_REG,
+ OMAP_I2C_SCLL_REG,
+ OMAP_I2C_SCLH_REG,
+ OMAP_I2C_SYSTEST_REG,
+ OMAP_I2C_BUFSTAT_REG,
+ OMAP_I2C_REVNB_LO,
+ OMAP_I2C_REVNB_HI,
+ OMAP_I2C_IRQSTATUS_RAW,
+ OMAP_I2C_IRQENABLE_SET,
+ OMAP_I2C_IRQENABLE_CLR,
+};
/* I2C Interrupt Enable Register (OMAP_I2C_IE): */
#define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */
@@ -169,6 +177,7 @@ struct omap_i2c_dev {
u32 speed; /* Speed of bus in Khz */
u16 cmd_err;
u8 *buf;
+ u8 *regs;
size_t buf_len;
struct i2c_adapter adapter;
u8 fifo_size; /* use as flag and value
@@ -187,15 +196,64 @@ struct omap_i2c_dev {
u16 westate;
};
+const static u8 reg_map[] = {
+ [OMAP_I2C_REV_REG] = 0x00,
+ [OMAP_I2C_IE_REG] = 0x01,
+ [OMAP_I2C_STAT_REG] = 0x02,
+ [OMAP_I2C_IV_REG] = 0x03,
+ [OMAP_I2C_WE_REG] = 0x03,
+ [OMAP_I2C_SYSS_REG] = 0x04,
+ [OMAP_I2C_BUF_REG] = 0x05,
+ [OMAP_I2C_CNT_REG] = 0x06,
+ [OMAP_I2C_DATA_REG] = 0x07,
+ [OMAP_I2C_SYSC_REG] = 0x08,
+ [OMAP_I2C_CON_REG] = 0x09,
+ [OMAP_I2C_OA_REG] = 0x0a,
+ [OMAP_I2C_SA_REG] = 0x0b,
+ [OMAP_I2C_PSC_REG] = 0x0c,
+ [OMAP_I2C_SCLL_REG] = 0x0d,
+ [OMAP_I2C_SCLH_REG] = 0x0e,
+ [OMAP_I2C_SYSTEST_REG] = 0x0f,
+ [OMAP_I2C_BUFSTAT_REG] = 0x10,
+};
+
+const static u8 omap4_reg_map[] = {
+ [OMAP_I2C_REV_REG] = 0x04,
+ [OMAP_I2C_IE_REG] = 0x2c,
+ [OMAP_I2C_STAT_REG] = 0x28,
+ [OMAP_I2C_IV_REG] = 0x34,
+ [OMAP_I2C_WE_REG] = 0x34,
+ [OMAP_I2C_SYSS_REG] = 0x90,
+ [OMAP_I2C_BUF_REG] = 0x94,
+ [OMAP_I2C_CNT_REG] = 0x98,
+ [OMAP_I2C_DATA_REG] = 0x9c,
+ [OMAP_I2C_SYSC_REG] = 0x20,
+ [OMAP_I2C_CON_REG] = 0xa4,
+ [OMAP_I2C_OA_REG] = 0xa8,
+ [OMAP_I2C_SA_REG] = 0xac,
+ [OMAP_I2C_PSC_REG] = 0xb0,
+ [OMAP_I2C_SCLL_REG] = 0xb4,
+ [OMAP_I2C_SCLH_REG] = 0xb8,
+ [OMAP_I2C_SYSTEST_REG] = 0xbC,
+ [OMAP_I2C_BUFSTAT_REG] = 0xc0,
+ [OMAP_I2C_REVNB_LO] = 0x00,
+ [OMAP_I2C_REVNB_HI] = 0x04,
+ [OMAP_I2C_IRQSTATUS_RAW] = 0x24,
+ [OMAP_I2C_IRQENABLE_SET] = 0x2c,
+ [OMAP_I2C_IRQENABLE_CLR] = 0x30,
+};
+
static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
int reg, u16 val)
{
- __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
+ __raw_writew(val, i2c_dev->base +
+ (i2c_dev->regs[reg] << i2c_dev->reg_shift));
}
static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
{
- return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
+ return __raw_readw(i2c_dev->base +
+ (i2c_dev->regs[reg] << i2c_dev->reg_shift));
}
static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
@@ -264,7 +322,11 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
WARN_ON(dev->idle);
dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
- omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
+ if (dev->rev >= OMAP_I2C_REV_ON_4430)
+ omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
+ else
+ omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
+
if (dev->rev < OMAP_I2C_REV_2) {
iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
} else {
@@ -329,7 +391,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
* REVISIT: Some wkup sources might not be needed.
*/
dev->westate = OMAP_I2C_WE_ALL;
- omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
+ if (dev->rev < OMAP_I2C_REV_ON_4430)
+ omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
+ dev->westate);
}
}
omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
@@ -356,7 +420,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
psc = fclk_rate / 12000000;
}
- if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+ if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
/*
* HSI2C controller internal clk rate should be 19.2 Mhz for
@@ -746,9 +810,12 @@ complete:
if (dev->buf_len) {
*dev->buf++ = w;
dev->buf_len--;
- /* Data reg from 2430 is 8 bit wide */
- if (!cpu_is_omap2430() &&
- !cpu_is_omap34xx()) {
+ /*
+ * Data reg in 2430, omap3 and
+ * omap4 is 8 bit wide
+ */
+ if (cpu_class_is_omap1() ||
+ cpu_is_omap2420()) {
if (dev->buf_len) {
*dev->buf++ = w >> 8;
dev->buf_len--;
@@ -786,9 +853,12 @@ complete:
if (dev->buf_len) {
w = *dev->buf++;
dev->buf_len--;
- /* Data reg from 2430 is 8 bit wide */
- if (!cpu_is_omap2430() &&
- !cpu_is_omap34xx()) {
+ /*
+ * Data reg in 2430, omap3 and
+ * omap4 is 8 bit wide
+ */
+ if (cpu_class_is_omap1() ||
+ cpu_is_omap2420()) {
if (dev->buf_len) {
w |= *dev->buf++ << 8;
dev->buf_len--;
@@ -897,6 +967,8 @@ omap_i2c_probe(struct platform_device *pdev)
if (cpu_is_omap7xx())
dev->reg_shift = 1;
+ else if (cpu_is_omap44xx())
+ dev->reg_shift = 0;
else
dev->reg_shift = 2;
@@ -911,11 +983,16 @@ omap_i2c_probe(struct platform_device *pdev)
if ((r = omap_i2c_get_clocks(dev)) != 0)
goto err_iounmap;
+ if (cpu_is_omap44xx())
+ dev->regs = (u8 *) omap4_reg_map;
+ else
+ dev->regs = (u8 *) reg_map;
+
omap_i2c_unidle(dev);
dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
- if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+ if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
u16 s;
/* Set up the fifo size - Get total size */
@@ -927,8 +1004,13 @@ omap_i2c_probe(struct platform_device *pdev)
* size. This is to ensure that we can handle the status on int
* call back latencies.
*/
- dev->fifo_size = (dev->fifo_size / 2);
- dev->b_hw = 1; /* Enable hardware fixes */
+ if (dev->rev >= OMAP_I2C_REV_ON_4430) {
+ dev->fifo_size = 0;
+ dev->b_hw = 0; /* Disable hardware fixes */
+ } else {
+ dev->fifo_size = (dev->fifo_size / 2);
+ dev->b_hw = 1; /* Enable hardware fixes */
+ }
}
/* reset ASAP, clearing any IRQs */
--
1.6.0.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* RE: [PATCH] omap: i2c: Add i2c support on omap4 platform
[not found] ` <1266597180-25139-1-git-send-email-santosh.shilimkar-l0cyMroinI0@public.gmane.org>
@ 2010-02-23 6:01 ` Shilimkar, Santosh
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C42E10AD-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
0 siblings, 1 reply; 13+ messages in thread
From: Shilimkar, Santosh @ 2010-02-23 6:01 UTC (permalink / raw)
To: ben-linux-elnMNo+KYs3YtjvyW6yDsg
Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Syed, Rafiuddin,
Cory Maccarrone, Tony Lindgren
Ben,
Did you happen to look at this ?
> -----Original Message-----
> From: Shilimkar, Santosh
> Sent: Friday, February 19, 2010 10:03 PM
> To: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org
> Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Shilimkar, Santosh; Syed, Rafiuddin; Cory
> Maccarrone
> Subject: [PATCH] omap: i2c: Add i2c support on omap4 platform
>
> This patch is rebased version of earlier post to add I2C
> driver support to OMAP4 platform. On OMAP4, all
> I2C register address offsets are changed from OMAP1/2/3 I2C.
> In order to not have #ifdef's at various places in code,
> as well as to support multi-OMAP build, an array is created
> to hold the register addresses with it's offset.
>
> This patch was submitted, reviewed and acked on mailing list
> already. For more details refer below link
> http://www.mail-archive.com/linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org/msg02281.html
>
> This updated verion has a depedancy on "Add support for 16-bit registers"
> posted on linux-omap. Below is the patch-works link for the same
>
> http://patchwork.kernel.org/patch/72295/
>
> Signed-off-by: Syed Rafiuddin <rafiuddin.syed-l0cyMroinI0@public.gmane.org>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>
> Acked-by: Kevin Hilman <khilman-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org>
> Reviewed-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>
> Reviewed-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
> Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
> Cc: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> drivers/i2c/busses/i2c-omap.c | 146 ++++++++++++++++++++++++++++++++---------
> 1 files changed, 114 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 9c3ce4d..7c15496 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -44,29 +44,37 @@
> /* I2C controller revisions present on specific hardware */
> #define OMAP_I2C_REV_ON_2430 0x36
> #define OMAP_I2C_REV_ON_3430 0x3C
> +#define OMAP_I2C_REV_ON_4430 0x40
>
> /* timeout waiting for the controller to respond */
> #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
>
> -#define OMAP_I2C_REV_REG 0x00
> -#define OMAP_I2C_IE_REG 0x01
> -#define OMAP_I2C_STAT_REG 0x02
> -#define OMAP_I2C_IV_REG 0x03
> /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
> -#define OMAP_I2C_WE_REG 0x03
> -#define OMAP_I2C_SYSS_REG 0x04
> -#define OMAP_I2C_BUF_REG 0x05
> -#define OMAP_I2C_CNT_REG 0x06
> -#define OMAP_I2C_DATA_REG 0x07
> -#define OMAP_I2C_SYSC_REG 0x08
> -#define OMAP_I2C_CON_REG 0x09
> -#define OMAP_I2C_OA_REG 0x0a
> -#define OMAP_I2C_SA_REG 0x0b
> -#define OMAP_I2C_PSC_REG 0x0c
> -#define OMAP_I2C_SCLL_REG 0x0d
> -#define OMAP_I2C_SCLH_REG 0x0e
> -#define OMAP_I2C_SYSTEST_REG 0x0f
> -#define OMAP_I2C_BUFSTAT_REG 0x10
> +enum {
> + OMAP_I2C_REV_REG = 0,
> + OMAP_I2C_IE_REG,
> + OMAP_I2C_STAT_REG,
> + OMAP_I2C_IV_REG,
> + OMAP_I2C_WE_REG,
> + OMAP_I2C_SYSS_REG,
> + OMAP_I2C_BUF_REG,
> + OMAP_I2C_CNT_REG,
> + OMAP_I2C_DATA_REG,
> + OMAP_I2C_SYSC_REG,
> + OMAP_I2C_CON_REG,
> + OMAP_I2C_OA_REG,
> + OMAP_I2C_SA_REG,
> + OMAP_I2C_PSC_REG,
> + OMAP_I2C_SCLL_REG,
> + OMAP_I2C_SCLH_REG,
> + OMAP_I2C_SYSTEST_REG,
> + OMAP_I2C_BUFSTAT_REG,
> + OMAP_I2C_REVNB_LO,
> + OMAP_I2C_REVNB_HI,
> + OMAP_I2C_IRQSTATUS_RAW,
> + OMAP_I2C_IRQENABLE_SET,
> + OMAP_I2C_IRQENABLE_CLR,
> +};
>
> /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
> #define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */
> @@ -169,6 +177,7 @@ struct omap_i2c_dev {
> u32 speed; /* Speed of bus in Khz */
> u16 cmd_err;
> u8 *buf;
> + u8 *regs;
> size_t buf_len;
> struct i2c_adapter adapter;
> u8 fifo_size; /* use as flag and value
> @@ -187,15 +196,64 @@ struct omap_i2c_dev {
> u16 westate;
> };
>
> +const static u8 reg_map[] = {
> + [OMAP_I2C_REV_REG] = 0x00,
> + [OMAP_I2C_IE_REG] = 0x01,
> + [OMAP_I2C_STAT_REG] = 0x02,
> + [OMAP_I2C_IV_REG] = 0x03,
> + [OMAP_I2C_WE_REG] = 0x03,
> + [OMAP_I2C_SYSS_REG] = 0x04,
> + [OMAP_I2C_BUF_REG] = 0x05,
> + [OMAP_I2C_CNT_REG] = 0x06,
> + [OMAP_I2C_DATA_REG] = 0x07,
> + [OMAP_I2C_SYSC_REG] = 0x08,
> + [OMAP_I2C_CON_REG] = 0x09,
> + [OMAP_I2C_OA_REG] = 0x0a,
> + [OMAP_I2C_SA_REG] = 0x0b,
> + [OMAP_I2C_PSC_REG] = 0x0c,
> + [OMAP_I2C_SCLL_REG] = 0x0d,
> + [OMAP_I2C_SCLH_REG] = 0x0e,
> + [OMAP_I2C_SYSTEST_REG] = 0x0f,
> + [OMAP_I2C_BUFSTAT_REG] = 0x10,
> +};
> +
> +const static u8 omap4_reg_map[] = {
> + [OMAP_I2C_REV_REG] = 0x04,
> + [OMAP_I2C_IE_REG] = 0x2c,
> + [OMAP_I2C_STAT_REG] = 0x28,
> + [OMAP_I2C_IV_REG] = 0x34,
> + [OMAP_I2C_WE_REG] = 0x34,
> + [OMAP_I2C_SYSS_REG] = 0x90,
> + [OMAP_I2C_BUF_REG] = 0x94,
> + [OMAP_I2C_CNT_REG] = 0x98,
> + [OMAP_I2C_DATA_REG] = 0x9c,
> + [OMAP_I2C_SYSC_REG] = 0x20,
> + [OMAP_I2C_CON_REG] = 0xa4,
> + [OMAP_I2C_OA_REG] = 0xa8,
> + [OMAP_I2C_SA_REG] = 0xac,
> + [OMAP_I2C_PSC_REG] = 0xb0,
> + [OMAP_I2C_SCLL_REG] = 0xb4,
> + [OMAP_I2C_SCLH_REG] = 0xb8,
> + [OMAP_I2C_SYSTEST_REG] = 0xbC,
> + [OMAP_I2C_BUFSTAT_REG] = 0xc0,
> + [OMAP_I2C_REVNB_LO] = 0x00,
> + [OMAP_I2C_REVNB_HI] = 0x04,
> + [OMAP_I2C_IRQSTATUS_RAW] = 0x24,
> + [OMAP_I2C_IRQENABLE_SET] = 0x2c,
> + [OMAP_I2C_IRQENABLE_CLR] = 0x30,
> +};
> +
> static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
> int reg, u16 val)
> {
> - __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
> + __raw_writew(val, i2c_dev->base +
> + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> }
>
> static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
> {
> - return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
> + return __raw_readw(i2c_dev->base +
> + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> }
>
> static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> @@ -264,7 +322,11 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
> WARN_ON(dev->idle);
>
> dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
> - omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> + if (dev->rev >= OMAP_I2C_REV_ON_4430)
> + omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
> + else
> + omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> +
> if (dev->rev < OMAP_I2C_REV_2) {
> iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
> } else {
> @@ -329,7 +391,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> * REVISIT: Some wkup sources might not be needed.
> */
> dev->westate = OMAP_I2C_WE_ALL;
> - omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
> + if (dev->rev < OMAP_I2C_REV_ON_4430)
> + omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
> + dev->westate);
> }
> }
> omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> @@ -356,7 +420,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> psc = fclk_rate / 12000000;
> }
>
> - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
>
> /*
> * HSI2C controller internal clk rate should be 19.2 Mhz for
> @@ -746,9 +810,12 @@ complete:
> if (dev->buf_len) {
> *dev->buf++ = w;
> dev->buf_len--;
> - /* Data reg from 2430 is 8 bit wide */
> - if (!cpu_is_omap2430() &&
> - !cpu_is_omap34xx()) {
> + /*
> + * Data reg in 2430, omap3 and
> + * omap4 is 8 bit wide
> + */
> + if (cpu_class_is_omap1() ||
> + cpu_is_omap2420()) {
> if (dev->buf_len) {
> *dev->buf++ = w >> 8;
> dev->buf_len--;
> @@ -786,9 +853,12 @@ complete:
> if (dev->buf_len) {
> w = *dev->buf++;
> dev->buf_len--;
> - /* Data reg from 2430 is 8 bit wide */
> - if (!cpu_is_omap2430() &&
> - !cpu_is_omap34xx()) {
> + /*
> + * Data reg in 2430, omap3 and
> + * omap4 is 8 bit wide
> + */
> + if (cpu_class_is_omap1() ||
> + cpu_is_omap2420()) {
> if (dev->buf_len) {
> w |= *dev->buf++ << 8;
> dev->buf_len--;
> @@ -897,6 +967,8 @@ omap_i2c_probe(struct platform_device *pdev)
>
> if (cpu_is_omap7xx())
> dev->reg_shift = 1;
> + else if (cpu_is_omap44xx())
> + dev->reg_shift = 0;
> else
> dev->reg_shift = 2;
>
> @@ -911,11 +983,16 @@ omap_i2c_probe(struct platform_device *pdev)
> if ((r = omap_i2c_get_clocks(dev)) != 0)
> goto err_iounmap;
>
> + if (cpu_is_omap44xx())
> + dev->regs = (u8 *) omap4_reg_map;
> + else
> + dev->regs = (u8 *) reg_map;
> +
> omap_i2c_unidle(dev);
>
> dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
>
> - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> u16 s;
>
> /* Set up the fifo size - Get total size */
> @@ -927,8 +1004,13 @@ omap_i2c_probe(struct platform_device *pdev)
> * size. This is to ensure that we can handle the status on int
> * call back latencies.
> */
> - dev->fifo_size = (dev->fifo_size / 2);
> - dev->b_hw = 1; /* Enable hardware fixes */
> + if (dev->rev >= OMAP_I2C_REV_ON_4430) {
> + dev->fifo_size = 0;
> + dev->b_hw = 0; /* Disable hardware fixes */
> + } else {
> + dev->fifo_size = (dev->fifo_size / 2);
> + dev->b_hw = 1; /* Enable hardware fixes */
> + }
> }
>
> /* reset ASAP, clearing any IRQs */
> --
> 1.6.0.4
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C42E10AD-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
@ 2010-02-25 21:47 ` Tony Lindgren
2010-02-26 4:57 ` Shilimkar, Santosh
0 siblings, 1 reply; 13+ messages in thread
From: Tony Lindgren @ 2010-02-25 21:47 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Syed, Rafiuddin,
Cory Maccarrone
* Shilimkar, Santosh <santosh.shilimkar-l0cyMroinI0@public.gmane.org> [100222 21:58]:
> Ben,
> Did you happen to look at this ?
Santosh, can you please also please clarify which omaps this
patch has been tested on?
Regards,
Tony
> > -----Original Message-----
> > From: Shilimkar, Santosh
> > Sent: Friday, February 19, 2010 10:03 PM
> > To: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org
> > Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Shilimkar, Santosh; Syed, Rafiuddin; Cory
> > Maccarrone
> > Subject: [PATCH] omap: i2c: Add i2c support on omap4 platform
> >
> > This patch is rebased version of earlier post to add I2C
> > driver support to OMAP4 platform. On OMAP4, all
> > I2C register address offsets are changed from OMAP1/2/3 I2C.
> > In order to not have #ifdef's at various places in code,
> > as well as to support multi-OMAP build, an array is created
> > to hold the register addresses with it's offset.
> >
> > This patch was submitted, reviewed and acked on mailing list
> > already. For more details refer below link
> > http://www.mail-archive.com/linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org/msg02281.html
> >
> > This updated verion has a depedancy on "Add support for 16-bit registers"
> > posted on linux-omap. Below is the patch-works link for the same
> >
> > http://patchwork.kernel.org/patch/72295/
> >
> > Signed-off-by: Syed Rafiuddin <rafiuddin.syed-l0cyMroinI0@public.gmane.org>
> > Signed-off-by: Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>
> > Acked-by: Kevin Hilman <khilman-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org>
> > Reviewed-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>
> > Reviewed-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
> > Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
> > Cc: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > ---
> > drivers/i2c/busses/i2c-omap.c | 146 ++++++++++++++++++++++++++++++++---------
> > 1 files changed, 114 insertions(+), 32 deletions(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> > index 9c3ce4d..7c15496 100644
> > --- a/drivers/i2c/busses/i2c-omap.c
> > +++ b/drivers/i2c/busses/i2c-omap.c
> > @@ -44,29 +44,37 @@
> > /* I2C controller revisions present on specific hardware */
> > #define OMAP_I2C_REV_ON_2430 0x36
> > #define OMAP_I2C_REV_ON_3430 0x3C
> > +#define OMAP_I2C_REV_ON_4430 0x40
> >
> > /* timeout waiting for the controller to respond */
> > #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
> >
> > -#define OMAP_I2C_REV_REG 0x00
> > -#define OMAP_I2C_IE_REG 0x01
> > -#define OMAP_I2C_STAT_REG 0x02
> > -#define OMAP_I2C_IV_REG 0x03
> > /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
> > -#define OMAP_I2C_WE_REG 0x03
> > -#define OMAP_I2C_SYSS_REG 0x04
> > -#define OMAP_I2C_BUF_REG 0x05
> > -#define OMAP_I2C_CNT_REG 0x06
> > -#define OMAP_I2C_DATA_REG 0x07
> > -#define OMAP_I2C_SYSC_REG 0x08
> > -#define OMAP_I2C_CON_REG 0x09
> > -#define OMAP_I2C_OA_REG 0x0a
> > -#define OMAP_I2C_SA_REG 0x0b
> > -#define OMAP_I2C_PSC_REG 0x0c
> > -#define OMAP_I2C_SCLL_REG 0x0d
> > -#define OMAP_I2C_SCLH_REG 0x0e
> > -#define OMAP_I2C_SYSTEST_REG 0x0f
> > -#define OMAP_I2C_BUFSTAT_REG 0x10
> > +enum {
> > + OMAP_I2C_REV_REG = 0,
> > + OMAP_I2C_IE_REG,
> > + OMAP_I2C_STAT_REG,
> > + OMAP_I2C_IV_REG,
> > + OMAP_I2C_WE_REG,
> > + OMAP_I2C_SYSS_REG,
> > + OMAP_I2C_BUF_REG,
> > + OMAP_I2C_CNT_REG,
> > + OMAP_I2C_DATA_REG,
> > + OMAP_I2C_SYSC_REG,
> > + OMAP_I2C_CON_REG,
> > + OMAP_I2C_OA_REG,
> > + OMAP_I2C_SA_REG,
> > + OMAP_I2C_PSC_REG,
> > + OMAP_I2C_SCLL_REG,
> > + OMAP_I2C_SCLH_REG,
> > + OMAP_I2C_SYSTEST_REG,
> > + OMAP_I2C_BUFSTAT_REG,
> > + OMAP_I2C_REVNB_LO,
> > + OMAP_I2C_REVNB_HI,
> > + OMAP_I2C_IRQSTATUS_RAW,
> > + OMAP_I2C_IRQENABLE_SET,
> > + OMAP_I2C_IRQENABLE_CLR,
> > +};
> >
> > /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
> > #define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */
> > @@ -169,6 +177,7 @@ struct omap_i2c_dev {
> > u32 speed; /* Speed of bus in Khz */
> > u16 cmd_err;
> > u8 *buf;
> > + u8 *regs;
> > size_t buf_len;
> > struct i2c_adapter adapter;
> > u8 fifo_size; /* use as flag and value
> > @@ -187,15 +196,64 @@ struct omap_i2c_dev {
> > u16 westate;
> > };
> >
> > +const static u8 reg_map[] = {
> > + [OMAP_I2C_REV_REG] = 0x00,
> > + [OMAP_I2C_IE_REG] = 0x01,
> > + [OMAP_I2C_STAT_REG] = 0x02,
> > + [OMAP_I2C_IV_REG] = 0x03,
> > + [OMAP_I2C_WE_REG] = 0x03,
> > + [OMAP_I2C_SYSS_REG] = 0x04,
> > + [OMAP_I2C_BUF_REG] = 0x05,
> > + [OMAP_I2C_CNT_REG] = 0x06,
> > + [OMAP_I2C_DATA_REG] = 0x07,
> > + [OMAP_I2C_SYSC_REG] = 0x08,
> > + [OMAP_I2C_CON_REG] = 0x09,
> > + [OMAP_I2C_OA_REG] = 0x0a,
> > + [OMAP_I2C_SA_REG] = 0x0b,
> > + [OMAP_I2C_PSC_REG] = 0x0c,
> > + [OMAP_I2C_SCLL_REG] = 0x0d,
> > + [OMAP_I2C_SCLH_REG] = 0x0e,
> > + [OMAP_I2C_SYSTEST_REG] = 0x0f,
> > + [OMAP_I2C_BUFSTAT_REG] = 0x10,
> > +};
> > +
> > +const static u8 omap4_reg_map[] = {
> > + [OMAP_I2C_REV_REG] = 0x04,
> > + [OMAP_I2C_IE_REG] = 0x2c,
> > + [OMAP_I2C_STAT_REG] = 0x28,
> > + [OMAP_I2C_IV_REG] = 0x34,
> > + [OMAP_I2C_WE_REG] = 0x34,
> > + [OMAP_I2C_SYSS_REG] = 0x90,
> > + [OMAP_I2C_BUF_REG] = 0x94,
> > + [OMAP_I2C_CNT_REG] = 0x98,
> > + [OMAP_I2C_DATA_REG] = 0x9c,
> > + [OMAP_I2C_SYSC_REG] = 0x20,
> > + [OMAP_I2C_CON_REG] = 0xa4,
> > + [OMAP_I2C_OA_REG] = 0xa8,
> > + [OMAP_I2C_SA_REG] = 0xac,
> > + [OMAP_I2C_PSC_REG] = 0xb0,
> > + [OMAP_I2C_SCLL_REG] = 0xb4,
> > + [OMAP_I2C_SCLH_REG] = 0xb8,
> > + [OMAP_I2C_SYSTEST_REG] = 0xbC,
> > + [OMAP_I2C_BUFSTAT_REG] = 0xc0,
> > + [OMAP_I2C_REVNB_LO] = 0x00,
> > + [OMAP_I2C_REVNB_HI] = 0x04,
> > + [OMAP_I2C_IRQSTATUS_RAW] = 0x24,
> > + [OMAP_I2C_IRQENABLE_SET] = 0x2c,
> > + [OMAP_I2C_IRQENABLE_CLR] = 0x30,
> > +};
> > +
> > static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
> > int reg, u16 val)
> > {
> > - __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
> > + __raw_writew(val, i2c_dev->base +
> > + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> > }
> >
> > static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
> > {
> > - return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
> > + return __raw_readw(i2c_dev->base +
> > + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> > }
> >
> > static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> > @@ -264,7 +322,11 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
> > WARN_ON(dev->idle);
> >
> > dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
> > - omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> > + if (dev->rev >= OMAP_I2C_REV_ON_4430)
> > + omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
> > + else
> > + omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> > +
> > if (dev->rev < OMAP_I2C_REV_2) {
> > iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
> > } else {
> > @@ -329,7 +391,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> > * REVISIT: Some wkup sources might not be needed.
> > */
> > dev->westate = OMAP_I2C_WE_ALL;
> > - omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
> > + if (dev->rev < OMAP_I2C_REV_ON_4430)
> > + omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
> > + dev->westate);
> > }
> > }
> > omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> > @@ -356,7 +420,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> > psc = fclk_rate / 12000000;
> > }
> >
> > - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> > + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> >
> > /*
> > * HSI2C controller internal clk rate should be 19.2 Mhz for
> > @@ -746,9 +810,12 @@ complete:
> > if (dev->buf_len) {
> > *dev->buf++ = w;
> > dev->buf_len--;
> > - /* Data reg from 2430 is 8 bit wide */
> > - if (!cpu_is_omap2430() &&
> > - !cpu_is_omap34xx()) {
> > + /*
> > + * Data reg in 2430, omap3 and
> > + * omap4 is 8 bit wide
> > + */
> > + if (cpu_class_is_omap1() ||
> > + cpu_is_omap2420()) {
> > if (dev->buf_len) {
> > *dev->buf++ = w >> 8;
> > dev->buf_len--;
> > @@ -786,9 +853,12 @@ complete:
> > if (dev->buf_len) {
> > w = *dev->buf++;
> > dev->buf_len--;
> > - /* Data reg from 2430 is 8 bit wide */
> > - if (!cpu_is_omap2430() &&
> > - !cpu_is_omap34xx()) {
> > + /*
> > + * Data reg in 2430, omap3 and
> > + * omap4 is 8 bit wide
> > + */
> > + if (cpu_class_is_omap1() ||
> > + cpu_is_omap2420()) {
> > if (dev->buf_len) {
> > w |= *dev->buf++ << 8;
> > dev->buf_len--;
> > @@ -897,6 +967,8 @@ omap_i2c_probe(struct platform_device *pdev)
> >
> > if (cpu_is_omap7xx())
> > dev->reg_shift = 1;
> > + else if (cpu_is_omap44xx())
> > + dev->reg_shift = 0;
> > else
> > dev->reg_shift = 2;
> >
> > @@ -911,11 +983,16 @@ omap_i2c_probe(struct platform_device *pdev)
> > if ((r = omap_i2c_get_clocks(dev)) != 0)
> > goto err_iounmap;
> >
> > + if (cpu_is_omap44xx())
> > + dev->regs = (u8 *) omap4_reg_map;
> > + else
> > + dev->regs = (u8 *) reg_map;
> > +
> > omap_i2c_unidle(dev);
> >
> > dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
> >
> > - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> > + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> > u16 s;
> >
> > /* Set up the fifo size - Get total size */
> > @@ -927,8 +1004,13 @@ omap_i2c_probe(struct platform_device *pdev)
> > * size. This is to ensure that we can handle the status on int
> > * call back latencies.
> > */
> > - dev->fifo_size = (dev->fifo_size / 2);
> > - dev->b_hw = 1; /* Enable hardware fixes */
> > + if (dev->rev >= OMAP_I2C_REV_ON_4430) {
> > + dev->fifo_size = 0;
> > + dev->b_hw = 0; /* Disable hardware fixes */
> > + } else {
> > + dev->fifo_size = (dev->fifo_size / 2);
> > + dev->b_hw = 1; /* Enable hardware fixes */
> > + }
> > }
> >
> > /* reset ASAP, clearing any IRQs */
> > --
> > 1.6.0.4
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH] omap: i2c: Add i2c support on omap4 platform
2010-02-25 21:47 ` Tony Lindgren
@ 2010-02-26 4:57 ` Shilimkar, Santosh
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C43BF6C3-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
0 siblings, 1 reply; 13+ messages in thread
From: Shilimkar, Santosh @ 2010-02-26 4:57 UTC (permalink / raw)
To: Tony Lindgren
Cc: ben-linux, linux-omap, linux-i2c, Syed, Rafiuddin, Cory Maccarrone
Tony,
> -----Original Message-----
> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Friday, February 26, 2010 3:17 AM
> To: Shilimkar, Santosh
> Cc: ben-linux@fluff.org; linux-omap@vger.kernel.org; linux-i2c@vger.kernel.org; Syed, Rafiuddin; Cory
> Maccarrone
> Subject: Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
>
> * Shilimkar, Santosh <santosh.shilimkar@ti.com> [100222 21:58]:
> > Ben,
> > Did you happen to look at this ?
>
> Santosh, can you please also please clarify which omaps this
> patch has been tested on?
>
This patch is tested on OMAP3430 SDP and OMAP4430 SDP with regular defconfig
builds and multi-omap build.
>
> > > -----Original Message-----
> > > From: Shilimkar, Santosh
> > > Sent: Friday, February 19, 2010 10:03 PM
> > > To: ben-linux@fluff.org
> > > Cc: linux-omap@vger.kernel.org; linux-i2c@vger.kernel.org; Shilimkar, Santosh; Syed, Rafiuddin;
> Cory
> > > Maccarrone
> > > Subject: [PATCH] omap: i2c: Add i2c support on omap4 platform
> > >
> > > This patch is rebased version of earlier post to add I2C
> > > driver support to OMAP4 platform. On OMAP4, all
> > > I2C register address offsets are changed from OMAP1/2/3 I2C.
> > > In order to not have #ifdef's at various places in code,
> > > as well as to support multi-OMAP build, an array is created
> > > to hold the register addresses with it's offset.
> > >
> > > This patch was submitted, reviewed and acked on mailing list
> > > already. For more details refer below link
> > > http://www.mail-archive.com/linux-i2c@vger.kernel.org/msg02281.html
> > >
> > > This updated verion has a depedancy on "Add support for 16-bit registers"
> > > posted on linux-omap. Below is the patch-works link for the same
> > >
> > > http://patchwork.kernel.org/patch/72295/
> > >
> > > Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
> > > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > > Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
> > > Reviewed-by: Paul Walmsley <paul@pwsan.com>
> > > Reviewed-by: Tony Lindgren <tony@atomide.com>
> > > Cc: Ben Dooks <ben-linux@fluff.org>
> > > Cc: Cory Maccarrone <darkstar6262@gmail.com>
> > > ---
> > > drivers/i2c/busses/i2c-omap.c | 146 ++++++++++++++++++++++++++++++++---------
> > > 1 files changed, 114 insertions(+), 32 deletions(-)
> > >
> > > diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> > > index 9c3ce4d..7c15496 100644
> > > --- a/drivers/i2c/busses/i2c-omap.c
> > > +++ b/drivers/i2c/busses/i2c-omap.c
> > > @@ -44,29 +44,37 @@
> > > /* I2C controller revisions present on specific hardware */
> > > #define OMAP_I2C_REV_ON_2430 0x36
> > > #define OMAP_I2C_REV_ON_3430 0x3C
> > > +#define OMAP_I2C_REV_ON_4430 0x40
> > >
> > > /* timeout waiting for the controller to respond */
> > > #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
> > >
> > > -#define OMAP_I2C_REV_REG 0x00
> > > -#define OMAP_I2C_IE_REG 0x01
> > > -#define OMAP_I2C_STAT_REG 0x02
> > > -#define OMAP_I2C_IV_REG 0x03
> > > /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
> > > -#define OMAP_I2C_WE_REG 0x03
> > > -#define OMAP_I2C_SYSS_REG 0x04
> > > -#define OMAP_I2C_BUF_REG 0x05
> > > -#define OMAP_I2C_CNT_REG 0x06
> > > -#define OMAP_I2C_DATA_REG 0x07
> > > -#define OMAP_I2C_SYSC_REG 0x08
> > > -#define OMAP_I2C_CON_REG 0x09
> > > -#define OMAP_I2C_OA_REG 0x0a
> > > -#define OMAP_I2C_SA_REG 0x0b
> > > -#define OMAP_I2C_PSC_REG 0x0c
> > > -#define OMAP_I2C_SCLL_REG 0x0d
> > > -#define OMAP_I2C_SCLH_REG 0x0e
> > > -#define OMAP_I2C_SYSTEST_REG 0x0f
> > > -#define OMAP_I2C_BUFSTAT_REG 0x10
> > > +enum {
> > > + OMAP_I2C_REV_REG = 0,
> > > + OMAP_I2C_IE_REG,
> > > + OMAP_I2C_STAT_REG,
> > > + OMAP_I2C_IV_REG,
> > > + OMAP_I2C_WE_REG,
> > > + OMAP_I2C_SYSS_REG,
> > > + OMAP_I2C_BUF_REG,
> > > + OMAP_I2C_CNT_REG,
> > > + OMAP_I2C_DATA_REG,
> > > + OMAP_I2C_SYSC_REG,
> > > + OMAP_I2C_CON_REG,
> > > + OMAP_I2C_OA_REG,
> > > + OMAP_I2C_SA_REG,
> > > + OMAP_I2C_PSC_REG,
> > > + OMAP_I2C_SCLL_REG,
> > > + OMAP_I2C_SCLH_REG,
> > > + OMAP_I2C_SYSTEST_REG,
> > > + OMAP_I2C_BUFSTAT_REG,
> > > + OMAP_I2C_REVNB_LO,
> > > + OMAP_I2C_REVNB_HI,
> > > + OMAP_I2C_IRQSTATUS_RAW,
> > > + OMAP_I2C_IRQENABLE_SET,
> > > + OMAP_I2C_IRQENABLE_CLR,
> > > +};
> > >
> > > /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
> > > #define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */
> > > @@ -169,6 +177,7 @@ struct omap_i2c_dev {
> > > u32 speed; /* Speed of bus in Khz */
> > > u16 cmd_err;
> > > u8 *buf;
> > > + u8 *regs;
> > > size_t buf_len;
> > > struct i2c_adapter adapter;
> > > u8 fifo_size; /* use as flag and value
> > > @@ -187,15 +196,64 @@ struct omap_i2c_dev {
> > > u16 westate;
> > > };
> > >
> > > +const static u8 reg_map[] = {
> > > + [OMAP_I2C_REV_REG] = 0x00,
> > > + [OMAP_I2C_IE_REG] = 0x01,
> > > + [OMAP_I2C_STAT_REG] = 0x02,
> > > + [OMAP_I2C_IV_REG] = 0x03,
> > > + [OMAP_I2C_WE_REG] = 0x03,
> > > + [OMAP_I2C_SYSS_REG] = 0x04,
> > > + [OMAP_I2C_BUF_REG] = 0x05,
> > > + [OMAP_I2C_CNT_REG] = 0x06,
> > > + [OMAP_I2C_DATA_REG] = 0x07,
> > > + [OMAP_I2C_SYSC_REG] = 0x08,
> > > + [OMAP_I2C_CON_REG] = 0x09,
> > > + [OMAP_I2C_OA_REG] = 0x0a,
> > > + [OMAP_I2C_SA_REG] = 0x0b,
> > > + [OMAP_I2C_PSC_REG] = 0x0c,
> > > + [OMAP_I2C_SCLL_REG] = 0x0d,
> > > + [OMAP_I2C_SCLH_REG] = 0x0e,
> > > + [OMAP_I2C_SYSTEST_REG] = 0x0f,
> > > + [OMAP_I2C_BUFSTAT_REG] = 0x10,
> > > +};
> > > +
> > > +const static u8 omap4_reg_map[] = {
> > > + [OMAP_I2C_REV_REG] = 0x04,
> > > + [OMAP_I2C_IE_REG] = 0x2c,
> > > + [OMAP_I2C_STAT_REG] = 0x28,
> > > + [OMAP_I2C_IV_REG] = 0x34,
> > > + [OMAP_I2C_WE_REG] = 0x34,
> > > + [OMAP_I2C_SYSS_REG] = 0x90,
> > > + [OMAP_I2C_BUF_REG] = 0x94,
> > > + [OMAP_I2C_CNT_REG] = 0x98,
> > > + [OMAP_I2C_DATA_REG] = 0x9c,
> > > + [OMAP_I2C_SYSC_REG] = 0x20,
> > > + [OMAP_I2C_CON_REG] = 0xa4,
> > > + [OMAP_I2C_OA_REG] = 0xa8,
> > > + [OMAP_I2C_SA_REG] = 0xac,
> > > + [OMAP_I2C_PSC_REG] = 0xb0,
> > > + [OMAP_I2C_SCLL_REG] = 0xb4,
> > > + [OMAP_I2C_SCLH_REG] = 0xb8,
> > > + [OMAP_I2C_SYSTEST_REG] = 0xbC,
> > > + [OMAP_I2C_BUFSTAT_REG] = 0xc0,
> > > + [OMAP_I2C_REVNB_LO] = 0x00,
> > > + [OMAP_I2C_REVNB_HI] = 0x04,
> > > + [OMAP_I2C_IRQSTATUS_RAW] = 0x24,
> > > + [OMAP_I2C_IRQENABLE_SET] = 0x2c,
> > > + [OMAP_I2C_IRQENABLE_CLR] = 0x30,
> > > +};
> > > +
> > > static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
> > > int reg, u16 val)
> > > {
> > > - __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
> > > + __raw_writew(val, i2c_dev->base +
> > > + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> > > }
> > >
> > > static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
> > > {
> > > - return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
> > > + return __raw_readw(i2c_dev->base +
> > > + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> > > }
> > >
> > > static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> > > @@ -264,7 +322,11 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
> > > WARN_ON(dev->idle);
> > >
> > > dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
> > > - omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> > > + if (dev->rev >= OMAP_I2C_REV_ON_4430)
> > > + omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
> > > + else
> > > + omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> > > +
> > > if (dev->rev < OMAP_I2C_REV_2) {
> > > iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
> > > } else {
> > > @@ -329,7 +391,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> > > * REVISIT: Some wkup sources might not be needed.
> > > */
> > > dev->westate = OMAP_I2C_WE_ALL;
> > > - omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
> > > + if (dev->rev < OMAP_I2C_REV_ON_4430)
> > > + omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
> > > + dev->westate);
> > > }
> > > }
> > > omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> > > @@ -356,7 +420,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> > > psc = fclk_rate / 12000000;
> > > }
> > >
> > > - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> > > + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> > >
> > > /*
> > > * HSI2C controller internal clk rate should be 19.2 Mhz for
> > > @@ -746,9 +810,12 @@ complete:
> > > if (dev->buf_len) {
> > > *dev->buf++ = w;
> > > dev->buf_len--;
> > > - /* Data reg from 2430 is 8 bit wide */
> > > - if (!cpu_is_omap2430() &&
> > > - !cpu_is_omap34xx()) {
> > > + /*
> > > + * Data reg in 2430, omap3 and
> > > + * omap4 is 8 bit wide
> > > + */
> > > + if (cpu_class_is_omap1() ||
> > > + cpu_is_omap2420()) {
> > > if (dev->buf_len) {
> > > *dev->buf++ = w >> 8;
> > > dev->buf_len--;
> > > @@ -786,9 +853,12 @@ complete:
> > > if (dev->buf_len) {
> > > w = *dev->buf++;
> > > dev->buf_len--;
> > > - /* Data reg from 2430 is 8 bit wide */
> > > - if (!cpu_is_omap2430() &&
> > > - !cpu_is_omap34xx()) {
> > > + /*
> > > + * Data reg in 2430, omap3 and
> > > + * omap4 is 8 bit wide
> > > + */
> > > + if (cpu_class_is_omap1() ||
> > > + cpu_is_omap2420()) {
> > > if (dev->buf_len) {
> > > w |= *dev->buf++ << 8;
> > > dev->buf_len--;
> > > @@ -897,6 +967,8 @@ omap_i2c_probe(struct platform_device *pdev)
> > >
> > > if (cpu_is_omap7xx())
> > > dev->reg_shift = 1;
> > > + else if (cpu_is_omap44xx())
> > > + dev->reg_shift = 0;
> > > else
> > > dev->reg_shift = 2;
> > >
> > > @@ -911,11 +983,16 @@ omap_i2c_probe(struct platform_device *pdev)
> > > if ((r = omap_i2c_get_clocks(dev)) != 0)
> > > goto err_iounmap;
> > >
> > > + if (cpu_is_omap44xx())
> > > + dev->regs = (u8 *) omap4_reg_map;
> > > + else
> > > + dev->regs = (u8 *) reg_map;
> > > +
> > > omap_i2c_unidle(dev);
> > >
> > > dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
> > >
> > > - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> > > + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> > > u16 s;
> > >
> > > /* Set up the fifo size - Get total size */
> > > @@ -927,8 +1004,13 @@ omap_i2c_probe(struct platform_device *pdev)
> > > * size. This is to ensure that we can handle the status on int
> > > * call back latencies.
> > > */
> > > - dev->fifo_size = (dev->fifo_size / 2);
> > > - dev->b_hw = 1; /* Enable hardware fixes */
> > > + if (dev->rev >= OMAP_I2C_REV_ON_4430) {
> > > + dev->fifo_size = 0;
> > > + dev->b_hw = 0; /* Disable hardware fixes */
> > > + } else {
> > > + dev->fifo_size = (dev->fifo_size / 2);
> > > + dev->b_hw = 1; /* Enable hardware fixes */
> > > + }
> > > }
> > >
> > > /* reset ASAP, clearing any IRQs */
> > > --
> > > 1.6.0.4
> >
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH] omap: i2c: Add i2c support on omap4 platform
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C43BF6C3-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
@ 2010-02-27 4:08 ` Shilimkar, Santosh
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C43BFC61-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
0 siblings, 1 reply; 13+ messages in thread
From: Shilimkar, Santosh @ 2010-02-27 4:08 UTC (permalink / raw)
To: Tony Lindgren
Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Syed, Rafiuddin,
Cory Maccarrone, akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b
Tony,
What we do with patch now? It's more almost 6 months that this patch is
floating without merge.
> -----Original Message-----
> From: linux-omap-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org [mailto:linux-omap-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org] On Behalf Of
> Shilimkar, Santosh
> Sent: Friday, February 26, 2010 10:28 AM
> To: Tony Lindgren
> Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org; linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Syed, Rafiuddin; Cory
> Maccarrone
> Subject: RE: [PATCH] omap: i2c: Add i2c support on omap4 platform
>
> Tony,
> > -----Original Message-----
> > From: Tony Lindgren [mailto:tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org]
> > Sent: Friday, February 26, 2010 3:17 AM
> > To: Shilimkar, Santosh
> > Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org; linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Syed, Rafiuddin;
> Cory
> > Maccarrone
> > Subject: Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
> >
> > * Shilimkar, Santosh <santosh.shilimkar-l0cyMroinI0@public.gmane.org> [100222 21:58]:
> > > Ben,
> > > Did you happen to look at this ?
> >
> > Santosh, can you please also please clarify which omaps this
> > patch has been tested on?
> >
> This patch is tested on OMAP3430 SDP and OMAP4430 SDP with regular defconfig
> builds and multi-omap build.
> >
> > > > -----Original Message-----
> > > > From: Shilimkar, Santosh
> > > > Sent: Friday, February 19, 2010 10:03 PM
> > > > To: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org
> > > > Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Shilimkar, Santosh; Syed, Rafiuddin;
> > Cory
> > > > Maccarrone
> > > > Subject: [PATCH] omap: i2c: Add i2c support on omap4 platform
> > > >
> > > > This patch is rebased version of earlier post to add I2C
> > > > driver support to OMAP4 platform. On OMAP4, all
> > > > I2C register address offsets are changed from OMAP1/2/3 I2C.
> > > > In order to not have #ifdef's at various places in code,
> > > > as well as to support multi-OMAP build, an array is created
> > > > to hold the register addresses with it's offset.
> > > >
> > > > This patch was submitted, reviewed and acked on mailing list
> > > > already. For more details refer below link
> > > > http://www.mail-archive.com/linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org/msg02281.html
> > > >
> > > > This updated verion has a depedancy on "Add support for 16-bit registers"
> > > > posted on linux-omap. Below is the patch-works link for the same
> > > >
> > > > http://patchwork.kernel.org/patch/72295/
> > > >
> > > > Signed-off-by: Syed Rafiuddin <rafiuddin.syed-l0cyMroinI0@public.gmane.org>
> > > > Signed-off-by: Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>
> > > > Acked-by: Kevin Hilman <khilman-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org>
> > > > Reviewed-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>
> > > > Reviewed-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
> > > > Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
> > > > Cc: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > > > ---
> > > > drivers/i2c/busses/i2c-omap.c | 146 ++++++++++++++++++++++++++++++++---------
> > > > 1 files changed, 114 insertions(+), 32 deletions(-)
> > > >
> > > > diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> > > > index 9c3ce4d..7c15496 100644
> > > > --- a/drivers/i2c/busses/i2c-omap.c
> > > > +++ b/drivers/i2c/busses/i2c-omap.c
> > > > @@ -44,29 +44,37 @@
> > > > /* I2C controller revisions present on specific hardware */
> > > > #define OMAP_I2C_REV_ON_2430 0x36
> > > > #define OMAP_I2C_REV_ON_3430 0x3C
> > > > +#define OMAP_I2C_REV_ON_4430 0x40
> > > >
> > > > /* timeout waiting for the controller to respond */
> > > > #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
> > > >
> > > > -#define OMAP_I2C_REV_REG 0x00
> > > > -#define OMAP_I2C_IE_REG 0x01
> > > > -#define OMAP_I2C_STAT_REG 0x02
> > > > -#define OMAP_I2C_IV_REG 0x03
> > > > /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
> > > > -#define OMAP_I2C_WE_REG 0x03
> > > > -#define OMAP_I2C_SYSS_REG 0x04
> > > > -#define OMAP_I2C_BUF_REG 0x05
> > > > -#define OMAP_I2C_CNT_REG 0x06
> > > > -#define OMAP_I2C_DATA_REG 0x07
> > > > -#define OMAP_I2C_SYSC_REG 0x08
> > > > -#define OMAP_I2C_CON_REG 0x09
> > > > -#define OMAP_I2C_OA_REG 0x0a
> > > > -#define OMAP_I2C_SA_REG 0x0b
> > > > -#define OMAP_I2C_PSC_REG 0x0c
> > > > -#define OMAP_I2C_SCLL_REG 0x0d
> > > > -#define OMAP_I2C_SCLH_REG 0x0e
> > > > -#define OMAP_I2C_SYSTEST_REG 0x0f
> > > > -#define OMAP_I2C_BUFSTAT_REG 0x10
> > > > +enum {
> > > > + OMAP_I2C_REV_REG = 0,
> > > > + OMAP_I2C_IE_REG,
> > > > + OMAP_I2C_STAT_REG,
> > > > + OMAP_I2C_IV_REG,
> > > > + OMAP_I2C_WE_REG,
> > > > + OMAP_I2C_SYSS_REG,
> > > > + OMAP_I2C_BUF_REG,
> > > > + OMAP_I2C_CNT_REG,
> > > > + OMAP_I2C_DATA_REG,
> > > > + OMAP_I2C_SYSC_REG,
> > > > + OMAP_I2C_CON_REG,
> > > > + OMAP_I2C_OA_REG,
> > > > + OMAP_I2C_SA_REG,
> > > > + OMAP_I2C_PSC_REG,
> > > > + OMAP_I2C_SCLL_REG,
> > > > + OMAP_I2C_SCLH_REG,
> > > > + OMAP_I2C_SYSTEST_REG,
> > > > + OMAP_I2C_BUFSTAT_REG,
> > > > + OMAP_I2C_REVNB_LO,
> > > > + OMAP_I2C_REVNB_HI,
> > > > + OMAP_I2C_IRQSTATUS_RAW,
> > > > + OMAP_I2C_IRQENABLE_SET,
> > > > + OMAP_I2C_IRQENABLE_CLR,
> > > > +};
> > > >
> > > > /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
> > > > #define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */
> > > > @@ -169,6 +177,7 @@ struct omap_i2c_dev {
> > > > u32 speed; /* Speed of bus in Khz */
> > > > u16 cmd_err;
> > > > u8 *buf;
> > > > + u8 *regs;
> > > > size_t buf_len;
> > > > struct i2c_adapter adapter;
> > > > u8 fifo_size; /* use as flag and value
> > > > @@ -187,15 +196,64 @@ struct omap_i2c_dev {
> > > > u16 westate;
> > > > };
> > > >
> > > > +const static u8 reg_map[] = {
> > > > + [OMAP_I2C_REV_REG] = 0x00,
> > > > + [OMAP_I2C_IE_REG] = 0x01,
> > > > + [OMAP_I2C_STAT_REG] = 0x02,
> > > > + [OMAP_I2C_IV_REG] = 0x03,
> > > > + [OMAP_I2C_WE_REG] = 0x03,
> > > > + [OMAP_I2C_SYSS_REG] = 0x04,
> > > > + [OMAP_I2C_BUF_REG] = 0x05,
> > > > + [OMAP_I2C_CNT_REG] = 0x06,
> > > > + [OMAP_I2C_DATA_REG] = 0x07,
> > > > + [OMAP_I2C_SYSC_REG] = 0x08,
> > > > + [OMAP_I2C_CON_REG] = 0x09,
> > > > + [OMAP_I2C_OA_REG] = 0x0a,
> > > > + [OMAP_I2C_SA_REG] = 0x0b,
> > > > + [OMAP_I2C_PSC_REG] = 0x0c,
> > > > + [OMAP_I2C_SCLL_REG] = 0x0d,
> > > > + [OMAP_I2C_SCLH_REG] = 0x0e,
> > > > + [OMAP_I2C_SYSTEST_REG] = 0x0f,
> > > > + [OMAP_I2C_BUFSTAT_REG] = 0x10,
> > > > +};
> > > > +
> > > > +const static u8 omap4_reg_map[] = {
> > > > + [OMAP_I2C_REV_REG] = 0x04,
> > > > + [OMAP_I2C_IE_REG] = 0x2c,
> > > > + [OMAP_I2C_STAT_REG] = 0x28,
> > > > + [OMAP_I2C_IV_REG] = 0x34,
> > > > + [OMAP_I2C_WE_REG] = 0x34,
> > > > + [OMAP_I2C_SYSS_REG] = 0x90,
> > > > + [OMAP_I2C_BUF_REG] = 0x94,
> > > > + [OMAP_I2C_CNT_REG] = 0x98,
> > > > + [OMAP_I2C_DATA_REG] = 0x9c,
> > > > + [OMAP_I2C_SYSC_REG] = 0x20,
> > > > + [OMAP_I2C_CON_REG] = 0xa4,
> > > > + [OMAP_I2C_OA_REG] = 0xa8,
> > > > + [OMAP_I2C_SA_REG] = 0xac,
> > > > + [OMAP_I2C_PSC_REG] = 0xb0,
> > > > + [OMAP_I2C_SCLL_REG] = 0xb4,
> > > > + [OMAP_I2C_SCLH_REG] = 0xb8,
> > > > + [OMAP_I2C_SYSTEST_REG] = 0xbC,
> > > > + [OMAP_I2C_BUFSTAT_REG] = 0xc0,
> > > > + [OMAP_I2C_REVNB_LO] = 0x00,
> > > > + [OMAP_I2C_REVNB_HI] = 0x04,
> > > > + [OMAP_I2C_IRQSTATUS_RAW] = 0x24,
> > > > + [OMAP_I2C_IRQENABLE_SET] = 0x2c,
> > > > + [OMAP_I2C_IRQENABLE_CLR] = 0x30,
> > > > +};
> > > > +
> > > > static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
> > > > int reg, u16 val)
> > > > {
> > > > - __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
> > > > + __raw_writew(val, i2c_dev->base +
> > > > + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> > > > }
> > > >
> > > > static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
> > > > {
> > > > - return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
> > > > + return __raw_readw(i2c_dev->base +
> > > > + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> > > > }
> > > >
> > > > static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> > > > @@ -264,7 +322,11 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
> > > > WARN_ON(dev->idle);
> > > >
> > > > dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
> > > > - omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> > > > + if (dev->rev >= OMAP_I2C_REV_ON_4430)
> > > > + omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
> > > > + else
> > > > + omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> > > > +
> > > > if (dev->rev < OMAP_I2C_REV_2) {
> > > > iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
> > > > } else {
> > > > @@ -329,7 +391,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> > > > * REVISIT: Some wkup sources might not be needed.
> > > > */
> > > > dev->westate = OMAP_I2C_WE_ALL;
> > > > - omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
> > > > + if (dev->rev < OMAP_I2C_REV_ON_4430)
> > > > + omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
> > > > + dev->westate);
> > > > }
> > > > }
> > > > omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> > > > @@ -356,7 +420,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> > > > psc = fclk_rate / 12000000;
> > > > }
> > > >
> > > > - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> > > > + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> > > >
> > > > /*
> > > > * HSI2C controller internal clk rate should be 19.2 Mhz for
> > > > @@ -746,9 +810,12 @@ complete:
> > > > if (dev->buf_len) {
> > > > *dev->buf++ = w;
> > > > dev->buf_len--;
> > > > - /* Data reg from 2430 is 8 bit wide */
> > > > - if (!cpu_is_omap2430() &&
> > > > - !cpu_is_omap34xx()) {
> > > > + /*
> > > > + * Data reg in 2430, omap3 and
> > > > + * omap4 is 8 bit wide
> > > > + */
> > > > + if (cpu_class_is_omap1() ||
> > > > + cpu_is_omap2420()) {
> > > > if (dev->buf_len) {
> > > > *dev->buf++ = w >> 8;
> > > > dev->buf_len--;
> > > > @@ -786,9 +853,12 @@ complete:
> > > > if (dev->buf_len) {
> > > > w = *dev->buf++;
> > > > dev->buf_len--;
> > > > - /* Data reg from 2430 is 8 bit wide */
> > > > - if (!cpu_is_omap2430() &&
> > > > - !cpu_is_omap34xx()) {
> > > > + /*
> > > > + * Data reg in 2430, omap3 and
> > > > + * omap4 is 8 bit wide
> > > > + */
> > > > + if (cpu_class_is_omap1() ||
> > > > + cpu_is_omap2420()) {
> > > > if (dev->buf_len) {
> > > > w |= *dev->buf++ << 8;
> > > > dev->buf_len--;
> > > > @@ -897,6 +967,8 @@ omap_i2c_probe(struct platform_device *pdev)
> > > >
> > > > if (cpu_is_omap7xx())
> > > > dev->reg_shift = 1;
> > > > + else if (cpu_is_omap44xx())
> > > > + dev->reg_shift = 0;
> > > > else
> > > > dev->reg_shift = 2;
> > > >
> > > > @@ -911,11 +983,16 @@ omap_i2c_probe(struct platform_device *pdev)
> > > > if ((r = omap_i2c_get_clocks(dev)) != 0)
> > > > goto err_iounmap;
> > > >
> > > > + if (cpu_is_omap44xx())
> > > > + dev->regs = (u8 *) omap4_reg_map;
> > > > + else
> > > > + dev->regs = (u8 *) reg_map;
> > > > +
> > > > omap_i2c_unidle(dev);
> > > >
> > > > dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
> > > >
> > > > - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> > > > + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> > > > u16 s;
> > > >
> > > > /* Set up the fifo size - Get total size */
> > > > @@ -927,8 +1004,13 @@ omap_i2c_probe(struct platform_device *pdev)
> > > > * size. This is to ensure that we can handle the status on int
> > > > * call back latencies.
> > > > */
> > > > - dev->fifo_size = (dev->fifo_size / 2);
> > > > - dev->b_hw = 1; /* Enable hardware fixes */
> > > > + if (dev->rev >= OMAP_I2C_REV_ON_4430) {
> > > > + dev->fifo_size = 0;
> > > > + dev->b_hw = 0; /* Disable hardware fixes */
> > > > + } else {
> > > > + dev->fifo_size = (dev->fifo_size / 2);
> > > > + dev->b_hw = 1; /* Enable hardware fixes */
> > > > + }
> > > > }
> > > >
> > > > /* reset ASAP, clearing any IRQs */
> > > > --
> > > > 1.6.0.4
> > >
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C43BFC61-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
@ 2010-02-27 20:40 ` Tony Lindgren
[not found] ` <20100227204049.GK17041-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
0 siblings, 1 reply; 13+ messages in thread
From: Tony Lindgren @ 2010-02-27 20:40 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Syed, Rafiuddin,
Cory Maccarrone, akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b
* Shilimkar, Santosh <santosh.shilimkar-l0cyMroinI0@public.gmane.org> [100226 20:05]:
> Tony,
> What we do with patch now? It's more almost 6 months that this patch is
> floating without merge.
Well first we should test it for all omaps. So let's add it into
omap-testing for a few days to make sure it does not break anything.
Then let's ask Ben to queue it.
Regards,
Tony
>
> > -----Original Message-----
> > From: linux-omap-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org [mailto:linux-omap-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org] On Behalf Of
> > Shilimkar, Santosh
> > Sent: Friday, February 26, 2010 10:28 AM
> > To: Tony Lindgren
> > Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org; linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Syed, Rafiuddin; Cory
> > Maccarrone
> > Subject: RE: [PATCH] omap: i2c: Add i2c support on omap4 platform
> >
> > Tony,
> > > -----Original Message-----
> > > From: Tony Lindgren [mailto:tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org]
> > > Sent: Friday, February 26, 2010 3:17 AM
> > > To: Shilimkar, Santosh
> > > Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org; linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Syed, Rafiuddin;
> > Cory
> > > Maccarrone
> > > Subject: Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
> > >
> > > * Shilimkar, Santosh <santosh.shilimkar-l0cyMroinI0@public.gmane.org> [100222 21:58]:
> > > > Ben,
> > > > Did you happen to look at this ?
> > >
> > > Santosh, can you please also please clarify which omaps this
> > > patch has been tested on?
> > >
> > This patch is tested on OMAP3430 SDP and OMAP4430 SDP with regular defconfig
> > builds and multi-omap build.
> > >
> > > > > -----Original Message-----
> > > > > From: Shilimkar, Santosh
> > > > > Sent: Friday, February 19, 2010 10:03 PM
> > > > > To: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org
> > > > > Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Shilimkar, Santosh; Syed, Rafiuddin;
> > > Cory
> > > > > Maccarrone
> > > > > Subject: [PATCH] omap: i2c: Add i2c support on omap4 platform
> > > > >
> > > > > This patch is rebased version of earlier post to add I2C
> > > > > driver support to OMAP4 platform. On OMAP4, all
> > > > > I2C register address offsets are changed from OMAP1/2/3 I2C.
> > > > > In order to not have #ifdef's at various places in code,
> > > > > as well as to support multi-OMAP build, an array is created
> > > > > to hold the register addresses with it's offset.
> > > > >
> > > > > This patch was submitted, reviewed and acked on mailing list
> > > > > already. For more details refer below link
> > > > > http://www.mail-archive.com/linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org/msg02281.html
> > > > >
> > > > > This updated verion has a depedancy on "Add support for 16-bit registers"
> > > > > posted on linux-omap. Below is the patch-works link for the same
> > > > >
> > > > > http://patchwork.kernel.org/patch/72295/
> > > > >
> > > > > Signed-off-by: Syed Rafiuddin <rafiuddin.syed-l0cyMroinI0@public.gmane.org>
> > > > > Signed-off-by: Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>
> > > > > Acked-by: Kevin Hilman <khilman-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org>
> > > > > Reviewed-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>
> > > > > Reviewed-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
> > > > > Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
> > > > > Cc: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > > > > ---
> > > > > drivers/i2c/busses/i2c-omap.c | 146 ++++++++++++++++++++++++++++++++---------
> > > > > 1 files changed, 114 insertions(+), 32 deletions(-)
> > > > >
> > > > > diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> > > > > index 9c3ce4d..7c15496 100644
> > > > > --- a/drivers/i2c/busses/i2c-omap.c
> > > > > +++ b/drivers/i2c/busses/i2c-omap.c
> > > > > @@ -44,29 +44,37 @@
> > > > > /* I2C controller revisions present on specific hardware */
> > > > > #define OMAP_I2C_REV_ON_2430 0x36
> > > > > #define OMAP_I2C_REV_ON_3430 0x3C
> > > > > +#define OMAP_I2C_REV_ON_4430 0x40
> > > > >
> > > > > /* timeout waiting for the controller to respond */
> > > > > #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
> > > > >
> > > > > -#define OMAP_I2C_REV_REG 0x00
> > > > > -#define OMAP_I2C_IE_REG 0x01
> > > > > -#define OMAP_I2C_STAT_REG 0x02
> > > > > -#define OMAP_I2C_IV_REG 0x03
> > > > > /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
> > > > > -#define OMAP_I2C_WE_REG 0x03
> > > > > -#define OMAP_I2C_SYSS_REG 0x04
> > > > > -#define OMAP_I2C_BUF_REG 0x05
> > > > > -#define OMAP_I2C_CNT_REG 0x06
> > > > > -#define OMAP_I2C_DATA_REG 0x07
> > > > > -#define OMAP_I2C_SYSC_REG 0x08
> > > > > -#define OMAP_I2C_CON_REG 0x09
> > > > > -#define OMAP_I2C_OA_REG 0x0a
> > > > > -#define OMAP_I2C_SA_REG 0x0b
> > > > > -#define OMAP_I2C_PSC_REG 0x0c
> > > > > -#define OMAP_I2C_SCLL_REG 0x0d
> > > > > -#define OMAP_I2C_SCLH_REG 0x0e
> > > > > -#define OMAP_I2C_SYSTEST_REG 0x0f
> > > > > -#define OMAP_I2C_BUFSTAT_REG 0x10
> > > > > +enum {
> > > > > + OMAP_I2C_REV_REG = 0,
> > > > > + OMAP_I2C_IE_REG,
> > > > > + OMAP_I2C_STAT_REG,
> > > > > + OMAP_I2C_IV_REG,
> > > > > + OMAP_I2C_WE_REG,
> > > > > + OMAP_I2C_SYSS_REG,
> > > > > + OMAP_I2C_BUF_REG,
> > > > > + OMAP_I2C_CNT_REG,
> > > > > + OMAP_I2C_DATA_REG,
> > > > > + OMAP_I2C_SYSC_REG,
> > > > > + OMAP_I2C_CON_REG,
> > > > > + OMAP_I2C_OA_REG,
> > > > > + OMAP_I2C_SA_REG,
> > > > > + OMAP_I2C_PSC_REG,
> > > > > + OMAP_I2C_SCLL_REG,
> > > > > + OMAP_I2C_SCLH_REG,
> > > > > + OMAP_I2C_SYSTEST_REG,
> > > > > + OMAP_I2C_BUFSTAT_REG,
> > > > > + OMAP_I2C_REVNB_LO,
> > > > > + OMAP_I2C_REVNB_HI,
> > > > > + OMAP_I2C_IRQSTATUS_RAW,
> > > > > + OMAP_I2C_IRQENABLE_SET,
> > > > > + OMAP_I2C_IRQENABLE_CLR,
> > > > > +};
> > > > >
> > > > > /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
> > > > > #define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */
> > > > > @@ -169,6 +177,7 @@ struct omap_i2c_dev {
> > > > > u32 speed; /* Speed of bus in Khz */
> > > > > u16 cmd_err;
> > > > > u8 *buf;
> > > > > + u8 *regs;
> > > > > size_t buf_len;
> > > > > struct i2c_adapter adapter;
> > > > > u8 fifo_size; /* use as flag and value
> > > > > @@ -187,15 +196,64 @@ struct omap_i2c_dev {
> > > > > u16 westate;
> > > > > };
> > > > >
> > > > > +const static u8 reg_map[] = {
> > > > > + [OMAP_I2C_REV_REG] = 0x00,
> > > > > + [OMAP_I2C_IE_REG] = 0x01,
> > > > > + [OMAP_I2C_STAT_REG] = 0x02,
> > > > > + [OMAP_I2C_IV_REG] = 0x03,
> > > > > + [OMAP_I2C_WE_REG] = 0x03,
> > > > > + [OMAP_I2C_SYSS_REG] = 0x04,
> > > > > + [OMAP_I2C_BUF_REG] = 0x05,
> > > > > + [OMAP_I2C_CNT_REG] = 0x06,
> > > > > + [OMAP_I2C_DATA_REG] = 0x07,
> > > > > + [OMAP_I2C_SYSC_REG] = 0x08,
> > > > > + [OMAP_I2C_CON_REG] = 0x09,
> > > > > + [OMAP_I2C_OA_REG] = 0x0a,
> > > > > + [OMAP_I2C_SA_REG] = 0x0b,
> > > > > + [OMAP_I2C_PSC_REG] = 0x0c,
> > > > > + [OMAP_I2C_SCLL_REG] = 0x0d,
> > > > > + [OMAP_I2C_SCLH_REG] = 0x0e,
> > > > > + [OMAP_I2C_SYSTEST_REG] = 0x0f,
> > > > > + [OMAP_I2C_BUFSTAT_REG] = 0x10,
> > > > > +};
> > > > > +
> > > > > +const static u8 omap4_reg_map[] = {
> > > > > + [OMAP_I2C_REV_REG] = 0x04,
> > > > > + [OMAP_I2C_IE_REG] = 0x2c,
> > > > > + [OMAP_I2C_STAT_REG] = 0x28,
> > > > > + [OMAP_I2C_IV_REG] = 0x34,
> > > > > + [OMAP_I2C_WE_REG] = 0x34,
> > > > > + [OMAP_I2C_SYSS_REG] = 0x90,
> > > > > + [OMAP_I2C_BUF_REG] = 0x94,
> > > > > + [OMAP_I2C_CNT_REG] = 0x98,
> > > > > + [OMAP_I2C_DATA_REG] = 0x9c,
> > > > > + [OMAP_I2C_SYSC_REG] = 0x20,
> > > > > + [OMAP_I2C_CON_REG] = 0xa4,
> > > > > + [OMAP_I2C_OA_REG] = 0xa8,
> > > > > + [OMAP_I2C_SA_REG] = 0xac,
> > > > > + [OMAP_I2C_PSC_REG] = 0xb0,
> > > > > + [OMAP_I2C_SCLL_REG] = 0xb4,
> > > > > + [OMAP_I2C_SCLH_REG] = 0xb8,
> > > > > + [OMAP_I2C_SYSTEST_REG] = 0xbC,
> > > > > + [OMAP_I2C_BUFSTAT_REG] = 0xc0,
> > > > > + [OMAP_I2C_REVNB_LO] = 0x00,
> > > > > + [OMAP_I2C_REVNB_HI] = 0x04,
> > > > > + [OMAP_I2C_IRQSTATUS_RAW] = 0x24,
> > > > > + [OMAP_I2C_IRQENABLE_SET] = 0x2c,
> > > > > + [OMAP_I2C_IRQENABLE_CLR] = 0x30,
> > > > > +};
> > > > > +
> > > > > static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
> > > > > int reg, u16 val)
> > > > > {
> > > > > - __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
> > > > > + __raw_writew(val, i2c_dev->base +
> > > > > + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> > > > > }
> > > > >
> > > > > static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
> > > > > {
> > > > > - return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
> > > > > + return __raw_readw(i2c_dev->base +
> > > > > + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> > > > > }
> > > > >
> > > > > static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> > > > > @@ -264,7 +322,11 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
> > > > > WARN_ON(dev->idle);
> > > > >
> > > > > dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
> > > > > - omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> > > > > + if (dev->rev >= OMAP_I2C_REV_ON_4430)
> > > > > + omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
> > > > > + else
> > > > > + omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> > > > > +
> > > > > if (dev->rev < OMAP_I2C_REV_2) {
> > > > > iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
> > > > > } else {
> > > > > @@ -329,7 +391,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> > > > > * REVISIT: Some wkup sources might not be needed.
> > > > > */
> > > > > dev->westate = OMAP_I2C_WE_ALL;
> > > > > - omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
> > > > > + if (dev->rev < OMAP_I2C_REV_ON_4430)
> > > > > + omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
> > > > > + dev->westate);
> > > > > }
> > > > > }
> > > > > omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> > > > > @@ -356,7 +420,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> > > > > psc = fclk_rate / 12000000;
> > > > > }
> > > > >
> > > > > - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> > > > > + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> > > > >
> > > > > /*
> > > > > * HSI2C controller internal clk rate should be 19.2 Mhz for
> > > > > @@ -746,9 +810,12 @@ complete:
> > > > > if (dev->buf_len) {
> > > > > *dev->buf++ = w;
> > > > > dev->buf_len--;
> > > > > - /* Data reg from 2430 is 8 bit wide */
> > > > > - if (!cpu_is_omap2430() &&
> > > > > - !cpu_is_omap34xx()) {
> > > > > + /*
> > > > > + * Data reg in 2430, omap3 and
> > > > > + * omap4 is 8 bit wide
> > > > > + */
> > > > > + if (cpu_class_is_omap1() ||
> > > > > + cpu_is_omap2420()) {
> > > > > if (dev->buf_len) {
> > > > > *dev->buf++ = w >> 8;
> > > > > dev->buf_len--;
> > > > > @@ -786,9 +853,12 @@ complete:
> > > > > if (dev->buf_len) {
> > > > > w = *dev->buf++;
> > > > > dev->buf_len--;
> > > > > - /* Data reg from 2430 is 8 bit wide */
> > > > > - if (!cpu_is_omap2430() &&
> > > > > - !cpu_is_omap34xx()) {
> > > > > + /*
> > > > > + * Data reg in 2430, omap3 and
> > > > > + * omap4 is 8 bit wide
> > > > > + */
> > > > > + if (cpu_class_is_omap1() ||
> > > > > + cpu_is_omap2420()) {
> > > > > if (dev->buf_len) {
> > > > > w |= *dev->buf++ << 8;
> > > > > dev->buf_len--;
> > > > > @@ -897,6 +967,8 @@ omap_i2c_probe(struct platform_device *pdev)
> > > > >
> > > > > if (cpu_is_omap7xx())
> > > > > dev->reg_shift = 1;
> > > > > + else if (cpu_is_omap44xx())
> > > > > + dev->reg_shift = 0;
> > > > > else
> > > > > dev->reg_shift = 2;
> > > > >
> > > > > @@ -911,11 +983,16 @@ omap_i2c_probe(struct platform_device *pdev)
> > > > > if ((r = omap_i2c_get_clocks(dev)) != 0)
> > > > > goto err_iounmap;
> > > > >
> > > > > + if (cpu_is_omap44xx())
> > > > > + dev->regs = (u8 *) omap4_reg_map;
> > > > > + else
> > > > > + dev->regs = (u8 *) reg_map;
> > > > > +
> > > > > omap_i2c_unidle(dev);
> > > > >
> > > > > dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
> > > > >
> > > > > - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> > > > > + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> > > > > u16 s;
> > > > >
> > > > > /* Set up the fifo size - Get total size */
> > > > > @@ -927,8 +1004,13 @@ omap_i2c_probe(struct platform_device *pdev)
> > > > > * size. This is to ensure that we can handle the status on int
> > > > > * call back latencies.
> > > > > */
> > > > > - dev->fifo_size = (dev->fifo_size / 2);
> > > > > - dev->b_hw = 1; /* Enable hardware fixes */
> > > > > + if (dev->rev >= OMAP_I2C_REV_ON_4430) {
> > > > > + dev->fifo_size = 0;
> > > > > + dev->b_hw = 0; /* Disable hardware fixes */
> > > > > + } else {
> > > > > + dev->fifo_size = (dev->fifo_size / 2);
> > > > > + dev->b_hw = 1; /* Enable hardware fixes */
> > > > > + }
> > > > > }
> > > > >
> > > > > /* reset ASAP, clearing any IRQs */
> > > > > --
> > > > > 1.6.0.4
> > > >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> > the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH] omap: i2c: Add i2c support on omap4 platform
[not found] ` <20100227204049.GK17041-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
@ 2010-02-28 5:31 ` Shilimkar, Santosh
2010-03-02 22:54 ` Tony Lindgren
0 siblings, 1 reply; 13+ messages in thread
From: Shilimkar, Santosh @ 2010-02-28 5:31 UTC (permalink / raw)
To: Tony Lindgren
Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Syed, Rafiuddin,
Cory Maccarrone, akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b
> -----Original Message-----
> From: Tony Lindgren [mailto:tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org]
> Sent: Sunday, February 28, 2010 2:11 AM
> To: Shilimkar, Santosh
> Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org; linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Syed, Rafiuddin; Cory
> Maccarrone; akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org
> Subject: Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
>
> * Shilimkar, Santosh <santosh.shilimkar-l0cyMroinI0@public.gmane.org> [100226 20:05]:
> > Tony,
> > What we do with patch now? It's more almost 6 months that this patch is
> > floating without merge.
>
> Well first we should test it for all omaps. So let's add it into
> omap-testing for a few days to make sure it does not break anything.
>
> Then let's ask Ben to queue it.
>
Ok with me.
Regards,
Santosh
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
2010-02-28 5:31 ` Shilimkar, Santosh
@ 2010-03-02 22:54 ` Tony Lindgren
[not found] ` <20100302225445.GA14164-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
0 siblings, 1 reply; 13+ messages in thread
From: Tony Lindgren @ 2010-03-02 22:54 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: ben-linux, linux-omap, linux-i2c, Syed, Rafiuddin, Cory Maccarrone, akpm
* Shilimkar, Santosh <santosh.shilimkar@ti.com> [100227 21:28]:
> > -----Original Message-----
> > From: Tony Lindgren [mailto:tony@atomide.com]
> > Sent: Sunday, February 28, 2010 2:11 AM
> > To: Shilimkar, Santosh
> > Cc: ben-linux@fluff.org; linux-omap@vger.kernel.org; linux-i2c@vger.kernel.org; Syed, Rafiuddin; Cory
> > Maccarrone; akpm@linux-foundation.org
> > Subject: Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
> >
> > * Shilimkar, Santosh <santosh.shilimkar@ti.com> [100226 20:05]:
> > > Tony,
> > > What we do with patch now? It's more almost 6 months that this patch is
> > > floating without merge.
> >
> > Well first we should test it for all omaps. So let's add it into
> > omap-testing for a few days to make sure it does not break anything.
> >
> > Then let's ask Ben to queue it.
> >
> Ok with me.
I've tried it out and seems to work just fine on 2420. I've applied
it for testing into omap-testing (and master) branches now.
Would be nice to get an ack from people using 7xx too on this.
Acked-by: Tony Lindgren <tony@atomide.com>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
[not found] ` <20100302225445.GA14164-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
@ 2010-03-07 0:47 ` Angelo Arrifano
2010-03-07 4:38 ` Cory Maccarrone
0 siblings, 1 reply; 13+ messages in thread
From: Angelo Arrifano @ 2010-03-07 0:47 UTC (permalink / raw)
To: Tony Lindgren
Cc: Shilimkar, Santosh, ben-linux-elnMNo+KYs3YtjvyW6yDsg,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Syed, Rafiuddin,
Cory Maccarrone, akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b,
linwizard-devel-pyega4qmqnRoyOMFzWx49A
On Ter, 2010-03-02 at 14:54 -0800, Tony Lindgren wrote:
> * Shilimkar, Santosh <santosh.shilimkar-l0cyMroinI0@public.gmane.org> [100227 21:28]:
> > > -----Original Message-----
> > > From: Tony Lindgren [mailto:tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org]
> > > Sent: Sunday, February 28, 2010 2:11 AM
> > > To: Shilimkar, Santosh
> > > Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org; linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Syed, Rafiuddin; Cory
> > > Maccarrone; akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org
> > > Subject: Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
> > >
> > > * Shilimkar, Santosh <santosh.shilimkar-l0cyMroinI0@public.gmane.org> [100226 20:05]:
> > > > Tony,
> > > > What we do with patch now? It's more almost 6 months that this patch is
> > > > floating without merge.
> > >
> > > Well first we should test it for all omaps. So let's add it into
> > > omap-testing for a few days to make sure it does not break anything.
> > >
> > > Then let's ask Ben to queue it.
> > >
> > Ok with me.
>
> I've tried it out and seems to work just fine on 2420. I've applied
> it for testing into omap-testing (and master) branches now.
>
> Would be nice to get an ack from people using 7xx too on this.
>
> Acked-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
I just tested this on omap-testing with my HTC Wizard (omap850) using
board-htcherald with little modifications.
- I2C works as expected here.
Acked-by: Angelo Arrifano <miknix-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Tested-by: Angelo Arrifano <miknix-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
--
Angelo Arrifano AKA MiKNiX
miknix-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
http://www.arrifano.com
MsC Student / Researcher
Lab. I3S - CNRS/UNSA, France
arrifano-kSrUrczbTpn985uAA1p3mw@public.gmane.org
http://www.i3s.unice.fr/~arrifano/
Gentoo Linux OMAP850/Embedded Official Developer
http://www.gentoo.org/~miknix
miknix-aBrp7R+bbdUdnm+yROfE0A@public.gmane.org
Linwizard Project Leader/Developer
miknix-Rn4VEauK+AKRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
PGP Pubkey 0x3D92BB0B
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
2010-03-07 0:47 ` Angelo Arrifano
@ 2010-03-07 4:38 ` Cory Maccarrone
0 siblings, 0 replies; 13+ messages in thread
From: Cory Maccarrone @ 2010-03-07 4:38 UTC (permalink / raw)
To: Angelo Arrifano
Cc: Tony Lindgren, Shilimkar, Santosh,
ben-linux-elnMNo+KYs3YtjvyW6yDsg,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Syed, Rafiuddin,
akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b,
linwizard-devel-pyega4qmqnRoyOMFzWx49A
On Sat, Mar 6, 2010 at 4:47 PM, Angelo Arrifano <miknix-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> On Ter, 2010-03-02 at 14:54 -0800, Tony Lindgren wrote:
>> * Shilimkar, Santosh <santosh.shilimkar-l0cyMroinI0@public.gmane.org> [100227 21:28]:
>> > > -----Original Message-----
>> > > From: Tony Lindgren [mailto:tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org]
>> > > Sent: Sunday, February 28, 2010 2:11 AM
>> > > To: Shilimkar, Santosh
>> > > Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org; linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c@vger.kernel.org; Syed, Rafiuddin; Cory
>> > > Maccarrone; akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org
>> > > Subject: Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
>> > >
>> > > * Shilimkar, Santosh <santosh.shilimkar-l0cyMroinI0@public.gmane.org> [100226 20:05]:
>> > > > Tony,
>> > > > What we do with patch now? It's more almost 6 months that this patch is
>> > > > floating without merge.
>> > >
>> > > Well first we should test it for all omaps. So let's add it into
>> > > omap-testing for a few days to make sure it does not break anything.
>> > >
>> > > Then let's ask Ben to queue it.
>> > >
>> > Ok with me.
>>
>> I've tried it out and seems to work just fine on 2420. I've applied
>> it for testing into omap-testing (and master) branches now.
>>
>> Would be nice to get an ack from people using 7xx too on this.
>>
>> Acked-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
> I just tested this on omap-testing with my HTC Wizard (omap850) using
> board-htcherald with little modifications.
> - I2C works as expected here.
>
> Acked-by: Angelo Arrifano <miknix-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Tested-by: Angelo Arrifano <miknix-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>
> --
> Angelo Arrifano AKA MiKNiX
> miknix-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> http://www.arrifano.com
>
> MsC Student / Researcher
> Lab. I3S - CNRS/UNSA, France
> arrifano-kSrUrczbTpn985uAA1p3mw@public.gmane.org
> http://www.i3s.unice.fr/~arrifano/
>
> Gentoo Linux OMAP850/Embedded Official Developer
> http://www.gentoo.org/~miknix
> miknix-aBrp7R+bbdUdnm+yROfE0A@public.gmane.org
>
> Linwizard Project Leader/Developer
> miknix-Rn4VEauK+AKRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
>
> PGP Pubkey 0x3D92BB0B
>
>
I concur, I just tested it with an HTC Herald, and I2C works beautifully.
Acked-by: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Tested-by: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- Cory
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
2010-02-19 16:33 [PATCH] omap: i2c: Add i2c support on omap4 platform Santosh Shilimkar
[not found] ` <1266597180-25139-1-git-send-email-santosh.shilimkar-l0cyMroinI0@public.gmane.org>
@ 2010-03-07 22:18 ` Ben Dooks
[not found] ` <20100307221819.GA15071-elnMNo+KYs3pIgCt6eIbzw@public.gmane.org>
1 sibling, 1 reply; 13+ messages in thread
From: Ben Dooks @ 2010-03-07 22:18 UTC (permalink / raw)
To: Santosh Shilimkar
Cc: ben-linux, linux-omap, linux-i2c, Syed Rafiuddin, Cory Maccarrone
On Fri, Feb 19, 2010 at 10:03:00PM +0530, Santosh Shilimkar wrote:
> This patch is rebased version of earlier post to add I2C
> driver support to OMAP4 platform. On OMAP4, all
> I2C register address offsets are changed from OMAP1/2/3 I2C.
> In order to not have #ifdef's at various places in code,
> as well as to support multi-OMAP build, an array is created
> to hold the register addresses with it's offset.
>
> This patch was submitted, reviewed and acked on mailing list
> already. For more details refer below link
> http://www.mail-archive.com/linux-i2c@vger.kernel.org/msg02281.html
>
> This updated verion has a depedancy on "Add support for 16-bit registers"
> posted on linux-omap. Below is the patch-works link for the same
>
> http://patchwork.kernel.org/patch/72295/
currently even with this patch applied it doesn't apply cleanly.
> Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
> Reviewed-by: Paul Walmsley <paul@pwsan.com>
> Reviewed-by: Tony Lindgren <tony@atomide.com>
> Cc: Ben Dooks <ben-linux@fluff.org>
> Cc: Cory Maccarrone <darkstar6262@gmail.com>
> ---
> drivers/i2c/busses/i2c-omap.c | 146 ++++++++++++++++++++++++++++++++---------
> 1 files changed, 114 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 9c3ce4d..7c15496 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -44,29 +44,37 @@
> /* I2C controller revisions present on specific hardware */
> #define OMAP_I2C_REV_ON_2430 0x36
> #define OMAP_I2C_REV_ON_3430 0x3C
> +#define OMAP_I2C_REV_ON_4430 0x40
>
> /* timeout waiting for the controller to respond */
> #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
>
> -#define OMAP_I2C_REV_REG 0x00
> -#define OMAP_I2C_IE_REG 0x01
> -#define OMAP_I2C_STAT_REG 0x02
> -#define OMAP_I2C_IV_REG 0x03
> /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
> -#define OMAP_I2C_WE_REG 0x03
> -#define OMAP_I2C_SYSS_REG 0x04
> -#define OMAP_I2C_BUF_REG 0x05
> -#define OMAP_I2C_CNT_REG 0x06
> -#define OMAP_I2C_DATA_REG 0x07
> -#define OMAP_I2C_SYSC_REG 0x08
> -#define OMAP_I2C_CON_REG 0x09
> -#define OMAP_I2C_OA_REG 0x0a
> -#define OMAP_I2C_SA_REG 0x0b
> -#define OMAP_I2C_PSC_REG 0x0c
> -#define OMAP_I2C_SCLL_REG 0x0d
> -#define OMAP_I2C_SCLH_REG 0x0e
> -#define OMAP_I2C_SYSTEST_REG 0x0f
> -#define OMAP_I2C_BUFSTAT_REG 0x10
> +enum {
> + OMAP_I2C_REV_REG = 0,
> + OMAP_I2C_IE_REG,
> + OMAP_I2C_STAT_REG,
> + OMAP_I2C_IV_REG,
> + OMAP_I2C_WE_REG,
> + OMAP_I2C_SYSS_REG,
> + OMAP_I2C_BUF_REG,
> + OMAP_I2C_CNT_REG,
> + OMAP_I2C_DATA_REG,
> + OMAP_I2C_SYSC_REG,
> + OMAP_I2C_CON_REG,
> + OMAP_I2C_OA_REG,
> + OMAP_I2C_SA_REG,
> + OMAP_I2C_PSC_REG,
> + OMAP_I2C_SCLL_REG,
> + OMAP_I2C_SCLH_REG,
> + OMAP_I2C_SYSTEST_REG,
> + OMAP_I2C_BUFSTAT_REG,
> + OMAP_I2C_REVNB_LO,
> + OMAP_I2C_REVNB_HI,
> + OMAP_I2C_IRQSTATUS_RAW,
> + OMAP_I2C_IRQENABLE_SET,
> + OMAP_I2C_IRQENABLE_CLR,
> +};
>
> /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
> #define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */
> @@ -169,6 +177,7 @@ struct omap_i2c_dev {
> u32 speed; /* Speed of bus in Khz */
> u16 cmd_err;
> u8 *buf;
> + u8 *regs;
> size_t buf_len;
> struct i2c_adapter adapter;
> u8 fifo_size; /* use as flag and value
> @@ -187,15 +196,64 @@ struct omap_i2c_dev {
> u16 westate;
> };
>
> +const static u8 reg_map[] = {
> + [OMAP_I2C_REV_REG] = 0x00,
> + [OMAP_I2C_IE_REG] = 0x01,
> + [OMAP_I2C_STAT_REG] = 0x02,
> + [OMAP_I2C_IV_REG] = 0x03,
> + [OMAP_I2C_WE_REG] = 0x03,
> + [OMAP_I2C_SYSS_REG] = 0x04,
> + [OMAP_I2C_BUF_REG] = 0x05,
> + [OMAP_I2C_CNT_REG] = 0x06,
> + [OMAP_I2C_DATA_REG] = 0x07,
> + [OMAP_I2C_SYSC_REG] = 0x08,
> + [OMAP_I2C_CON_REG] = 0x09,
> + [OMAP_I2C_OA_REG] = 0x0a,
> + [OMAP_I2C_SA_REG] = 0x0b,
> + [OMAP_I2C_PSC_REG] = 0x0c,
> + [OMAP_I2C_SCLL_REG] = 0x0d,
> + [OMAP_I2C_SCLH_REG] = 0x0e,
> + [OMAP_I2C_SYSTEST_REG] = 0x0f,
> + [OMAP_I2C_BUFSTAT_REG] = 0x10,
> +};
> +
> +const static u8 omap4_reg_map[] = {
> + [OMAP_I2C_REV_REG] = 0x04,
> + [OMAP_I2C_IE_REG] = 0x2c,
> + [OMAP_I2C_STAT_REG] = 0x28,
> + [OMAP_I2C_IV_REG] = 0x34,
> + [OMAP_I2C_WE_REG] = 0x34,
> + [OMAP_I2C_SYSS_REG] = 0x90,
> + [OMAP_I2C_BUF_REG] = 0x94,
> + [OMAP_I2C_CNT_REG] = 0x98,
> + [OMAP_I2C_DATA_REG] = 0x9c,
> + [OMAP_I2C_SYSC_REG] = 0x20,
> + [OMAP_I2C_CON_REG] = 0xa4,
> + [OMAP_I2C_OA_REG] = 0xa8,
> + [OMAP_I2C_SA_REG] = 0xac,
> + [OMAP_I2C_PSC_REG] = 0xb0,
> + [OMAP_I2C_SCLL_REG] = 0xb4,
> + [OMAP_I2C_SCLH_REG] = 0xb8,
> + [OMAP_I2C_SYSTEST_REG] = 0xbC,
> + [OMAP_I2C_BUFSTAT_REG] = 0xc0,
> + [OMAP_I2C_REVNB_LO] = 0x00,
> + [OMAP_I2C_REVNB_HI] = 0x04,
> + [OMAP_I2C_IRQSTATUS_RAW] = 0x24,
> + [OMAP_I2C_IRQENABLE_SET] = 0x2c,
> + [OMAP_I2C_IRQENABLE_CLR] = 0x30,
> +};
> +
> static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
> int reg, u16 val)
> {
> - __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
> + __raw_writew(val, i2c_dev->base +
> + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> }
>
> static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
> {
> - return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
> + return __raw_readw(i2c_dev->base +
> + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> }
>
> static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> @@ -264,7 +322,11 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
> WARN_ON(dev->idle);
>
> dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
> - omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> + if (dev->rev >= OMAP_I2C_REV_ON_4430)
> + omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
> + else
> + omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> +
> if (dev->rev < OMAP_I2C_REV_2) {
> iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
> } else {
> @@ -329,7 +391,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> * REVISIT: Some wkup sources might not be needed.
> */
> dev->westate = OMAP_I2C_WE_ALL;
> - omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
> + if (dev->rev < OMAP_I2C_REV_ON_4430)
> + omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
> + dev->westate);
> }
> }
> omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> @@ -356,7 +420,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> psc = fclk_rate / 12000000;
> }
>
> - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
>
> /*
> * HSI2C controller internal clk rate should be 19.2 Mhz for
> @@ -746,9 +810,12 @@ complete:
> if (dev->buf_len) {
> *dev->buf++ = w;
> dev->buf_len--;
> - /* Data reg from 2430 is 8 bit wide */
> - if (!cpu_is_omap2430() &&
> - !cpu_is_omap34xx()) {
> + /*
> + * Data reg in 2430, omap3 and
> + * omap4 is 8 bit wide
> + */
> + if (cpu_class_is_omap1() ||
> + cpu_is_omap2420()) {
> if (dev->buf_len) {
> *dev->buf++ = w >> 8;
> dev->buf_len--;
> @@ -786,9 +853,12 @@ complete:
> if (dev->buf_len) {
> w = *dev->buf++;
> dev->buf_len--;
> - /* Data reg from 2430 is 8 bit wide */
> - if (!cpu_is_omap2430() &&
> - !cpu_is_omap34xx()) {
> + /*
> + * Data reg in 2430, omap3 and
> + * omap4 is 8 bit wide
> + */
> + if (cpu_class_is_omap1() ||
> + cpu_is_omap2420()) {
> if (dev->buf_len) {
> w |= *dev->buf++ << 8;
> dev->buf_len--;
> @@ -897,6 +967,8 @@ omap_i2c_probe(struct platform_device *pdev)
>
> if (cpu_is_omap7xx())
> dev->reg_shift = 1;
> + else if (cpu_is_omap44xx())
> + dev->reg_shift = 0;
> else
> dev->reg_shift = 2;
>
> @@ -911,11 +983,16 @@ omap_i2c_probe(struct platform_device *pdev)
> if ((r = omap_i2c_get_clocks(dev)) != 0)
> goto err_iounmap;
>
> + if (cpu_is_omap44xx())
> + dev->regs = (u8 *) omap4_reg_map;
> + else
> + dev->regs = (u8 *) reg_map;
> +
> omap_i2c_unidle(dev);
>
> dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
>
> - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> u16 s;
>
> /* Set up the fifo size - Get total size */
> @@ -927,8 +1004,13 @@ omap_i2c_probe(struct platform_device *pdev)
> * size. This is to ensure that we can handle the status on int
> * call back latencies.
> */
> - dev->fifo_size = (dev->fifo_size / 2);
> - dev->b_hw = 1; /* Enable hardware fixes */
> + if (dev->rev >= OMAP_I2C_REV_ON_4430) {
> + dev->fifo_size = 0;
> + dev->b_hw = 0; /* Disable hardware fixes */
> + } else {
> + dev->fifo_size = (dev->fifo_size / 2);
> + dev->b_hw = 1; /* Enable hardware fixes */
> + }
> }
>
> /* reset ASAP, clearing any IRQs */
> --
> 1.6.0.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-i2c" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Ben (ben@fluff.org, http://www.fluff.org/)
'a smiley only costs 4 bytes'
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH] omap: i2c: Add i2c support on omap4 platform
[not found] ` <20100307221819.GA15071-elnMNo+KYs3pIgCt6eIbzw@public.gmane.org>
@ 2010-03-08 5:01 ` Shilimkar, Santosh
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C4619F89-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
0 siblings, 1 reply; 13+ messages in thread
From: Shilimkar, Santosh @ 2010-03-08 5:01 UTC (permalink / raw)
To: Ben Dooks
Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Syed, Rafiuddin,
Cory Maccarrone
> -----Original Message-----
> From: Ben Dooks [mailto:ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org]
> Sent: Monday, March 08, 2010 3:48 AM
> To: Shilimkar, Santosh
> Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org; linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Syed, Rafiuddin; Cory
> Maccarrone
> Subject: Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
>
> On Fri, Feb 19, 2010 at 10:03:00PM +0530, Santosh Shilimkar wrote:
> > This patch is rebased version of earlier post to add I2C
> > driver support to OMAP4 platform. On OMAP4, all
> > I2C register address offsets are changed from OMAP1/2/3 I2C.
> > In order to not have #ifdef's at various places in code,
> > as well as to support multi-OMAP build, an array is created
> > to hold the register addresses with it's offset.
> >
> > This patch was submitted, reviewed and acked on mailing list
> > already. For more details refer below link
> > http://www.mail-archive.com/linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org/msg02281.html
> >
> > This updated verion has a depedancy on "Add support for 16-bit registers"
> > posted on linux-omap. Below is the patch-works link for the same
> >
> > http://patchwork.kernel.org/patch/72295/
>
> currently even with this patch applied it doesn't apply cleanly.
May be it needs refresh after recent merges? Are you ok if I refresh this patch
against latest mainline on top of below patch and repost
http://patchwork.kernel.org/patch/72295/
>
> > Signed-off-by: Syed Rafiuddin <rafiuddin.syed-l0cyMroinI0@public.gmane.org>
> > Signed-off-by: Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>
> > Acked-by: Kevin Hilman <khilman-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org>
> > Reviewed-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>
> > Reviewed-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
> > Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
> > Cc: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > ---
> > drivers/i2c/busses/i2c-omap.c | 146 ++++++++++++++++++++++++++++++++---------
> > 1 files changed, 114 insertions(+), 32 deletions(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> > index 9c3ce4d..7c15496 100644
> > --- a/drivers/i2c/busses/i2c-omap.c
> > +++ b/drivers/i2c/busses/i2c-omap.c
> > @@ -44,29 +44,37 @@
> > /* I2C controller revisions present on specific hardware */
> > #define OMAP_I2C_REV_ON_2430 0x36
> > #define OMAP_I2C_REV_ON_3430 0x3C
> > +#define OMAP_I2C_REV_ON_4430 0x40
> >
> > /* timeout waiting for the controller to respond */
> > #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
> >
> > -#define OMAP_I2C_REV_REG 0x00
> > -#define OMAP_I2C_IE_REG 0x01
> > -#define OMAP_I2C_STAT_REG 0x02
> > -#define OMAP_I2C_IV_REG 0x03
> > /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
> > -#define OMAP_I2C_WE_REG 0x03
> > -#define OMAP_I2C_SYSS_REG 0x04
> > -#define OMAP_I2C_BUF_REG 0x05
> > -#define OMAP_I2C_CNT_REG 0x06
> > -#define OMAP_I2C_DATA_REG 0x07
> > -#define OMAP_I2C_SYSC_REG 0x08
> > -#define OMAP_I2C_CON_REG 0x09
> > -#define OMAP_I2C_OA_REG 0x0a
> > -#define OMAP_I2C_SA_REG 0x0b
> > -#define OMAP_I2C_PSC_REG 0x0c
> > -#define OMAP_I2C_SCLL_REG 0x0d
> > -#define OMAP_I2C_SCLH_REG 0x0e
> > -#define OMAP_I2C_SYSTEST_REG 0x0f
> > -#define OMAP_I2C_BUFSTAT_REG 0x10
> > +enum {
> > + OMAP_I2C_REV_REG = 0,
> > + OMAP_I2C_IE_REG,
> > + OMAP_I2C_STAT_REG,
> > + OMAP_I2C_IV_REG,
> > + OMAP_I2C_WE_REG,
> > + OMAP_I2C_SYSS_REG,
> > + OMAP_I2C_BUF_REG,
> > + OMAP_I2C_CNT_REG,
> > + OMAP_I2C_DATA_REG,
> > + OMAP_I2C_SYSC_REG,
> > + OMAP_I2C_CON_REG,
> > + OMAP_I2C_OA_REG,
> > + OMAP_I2C_SA_REG,
> > + OMAP_I2C_PSC_REG,
> > + OMAP_I2C_SCLL_REG,
> > + OMAP_I2C_SCLH_REG,
> > + OMAP_I2C_SYSTEST_REG,
> > + OMAP_I2C_BUFSTAT_REG,
> > + OMAP_I2C_REVNB_LO,
> > + OMAP_I2C_REVNB_HI,
> > + OMAP_I2C_IRQSTATUS_RAW,
> > + OMAP_I2C_IRQENABLE_SET,
> > + OMAP_I2C_IRQENABLE_CLR,
> > +};
> >
> > /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
> > #define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */
> > @@ -169,6 +177,7 @@ struct omap_i2c_dev {
> > u32 speed; /* Speed of bus in Khz */
> > u16 cmd_err;
> > u8 *buf;
> > + u8 *regs;
> > size_t buf_len;
> > struct i2c_adapter adapter;
> > u8 fifo_size; /* use as flag and value
> > @@ -187,15 +196,64 @@ struct omap_i2c_dev {
> > u16 westate;
> > };
> >
> > +const static u8 reg_map[] = {
> > + [OMAP_I2C_REV_REG] = 0x00,
> > + [OMAP_I2C_IE_REG] = 0x01,
> > + [OMAP_I2C_STAT_REG] = 0x02,
> > + [OMAP_I2C_IV_REG] = 0x03,
> > + [OMAP_I2C_WE_REG] = 0x03,
> > + [OMAP_I2C_SYSS_REG] = 0x04,
> > + [OMAP_I2C_BUF_REG] = 0x05,
> > + [OMAP_I2C_CNT_REG] = 0x06,
> > + [OMAP_I2C_DATA_REG] = 0x07,
> > + [OMAP_I2C_SYSC_REG] = 0x08,
> > + [OMAP_I2C_CON_REG] = 0x09,
> > + [OMAP_I2C_OA_REG] = 0x0a,
> > + [OMAP_I2C_SA_REG] = 0x0b,
> > + [OMAP_I2C_PSC_REG] = 0x0c,
> > + [OMAP_I2C_SCLL_REG] = 0x0d,
> > + [OMAP_I2C_SCLH_REG] = 0x0e,
> > + [OMAP_I2C_SYSTEST_REG] = 0x0f,
> > + [OMAP_I2C_BUFSTAT_REG] = 0x10,
> > +};
> > +
> > +const static u8 omap4_reg_map[] = {
> > + [OMAP_I2C_REV_REG] = 0x04,
> > + [OMAP_I2C_IE_REG] = 0x2c,
> > + [OMAP_I2C_STAT_REG] = 0x28,
> > + [OMAP_I2C_IV_REG] = 0x34,
> > + [OMAP_I2C_WE_REG] = 0x34,
> > + [OMAP_I2C_SYSS_REG] = 0x90,
> > + [OMAP_I2C_BUF_REG] = 0x94,
> > + [OMAP_I2C_CNT_REG] = 0x98,
> > + [OMAP_I2C_DATA_REG] = 0x9c,
> > + [OMAP_I2C_SYSC_REG] = 0x20,
> > + [OMAP_I2C_CON_REG] = 0xa4,
> > + [OMAP_I2C_OA_REG] = 0xa8,
> > + [OMAP_I2C_SA_REG] = 0xac,
> > + [OMAP_I2C_PSC_REG] = 0xb0,
> > + [OMAP_I2C_SCLL_REG] = 0xb4,
> > + [OMAP_I2C_SCLH_REG] = 0xb8,
> > + [OMAP_I2C_SYSTEST_REG] = 0xbC,
> > + [OMAP_I2C_BUFSTAT_REG] = 0xc0,
> > + [OMAP_I2C_REVNB_LO] = 0x00,
> > + [OMAP_I2C_REVNB_HI] = 0x04,
> > + [OMAP_I2C_IRQSTATUS_RAW] = 0x24,
> > + [OMAP_I2C_IRQENABLE_SET] = 0x2c,
> > + [OMAP_I2C_IRQENABLE_CLR] = 0x30,
> > +};
> > +
> > static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
> > int reg, u16 val)
> > {
> > - __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
> > + __raw_writew(val, i2c_dev->base +
> > + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> > }
> >
> > static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
> > {
> > - return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
> > + return __raw_readw(i2c_dev->base +
> > + (i2c_dev->regs[reg] << i2c_dev->reg_shift));
> > }
> >
> > static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> > @@ -264,7 +322,11 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
> > WARN_ON(dev->idle);
> >
> > dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
> > - omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> > + if (dev->rev >= OMAP_I2C_REV_ON_4430)
> > + omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
> > + else
> > + omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> > +
> > if (dev->rev < OMAP_I2C_REV_2) {
> > iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
> > } else {
> > @@ -329,7 +391,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> > * REVISIT: Some wkup sources might not be needed.
> > */
> > dev->westate = OMAP_I2C_WE_ALL;
> > - omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
> > + if (dev->rev < OMAP_I2C_REV_ON_4430)
> > + omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
> > + dev->westate);
> > }
> > }
> > omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
> > @@ -356,7 +420,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> > psc = fclk_rate / 12000000;
> > }
> >
> > - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> > + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> >
> > /*
> > * HSI2C controller internal clk rate should be 19.2 Mhz for
> > @@ -746,9 +810,12 @@ complete:
> > if (dev->buf_len) {
> > *dev->buf++ = w;
> > dev->buf_len--;
> > - /* Data reg from 2430 is 8 bit wide */
> > - if (!cpu_is_omap2430() &&
> > - !cpu_is_omap34xx()) {
> > + /*
> > + * Data reg in 2430, omap3 and
> > + * omap4 is 8 bit wide
> > + */
> > + if (cpu_class_is_omap1() ||
> > + cpu_is_omap2420()) {
> > if (dev->buf_len) {
> > *dev->buf++ = w >> 8;
> > dev->buf_len--;
> > @@ -786,9 +853,12 @@ complete:
> > if (dev->buf_len) {
> > w = *dev->buf++;
> > dev->buf_len--;
> > - /* Data reg from 2430 is 8 bit wide */
> > - if (!cpu_is_omap2430() &&
> > - !cpu_is_omap34xx()) {
> > + /*
> > + * Data reg in 2430, omap3 and
> > + * omap4 is 8 bit wide
> > + */
> > + if (cpu_class_is_omap1() ||
> > + cpu_is_omap2420()) {
> > if (dev->buf_len) {
> > w |= *dev->buf++ << 8;
> > dev->buf_len--;
> > @@ -897,6 +967,8 @@ omap_i2c_probe(struct platform_device *pdev)
> >
> > if (cpu_is_omap7xx())
> > dev->reg_shift = 1;
> > + else if (cpu_is_omap44xx())
> > + dev->reg_shift = 0;
> > else
> > dev->reg_shift = 2;
> >
> > @@ -911,11 +983,16 @@ omap_i2c_probe(struct platform_device *pdev)
> > if ((r = omap_i2c_get_clocks(dev)) != 0)
> > goto err_iounmap;
> >
> > + if (cpu_is_omap44xx())
> > + dev->regs = (u8 *) omap4_reg_map;
> > + else
> > + dev->regs = (u8 *) reg_map;
> > +
> > omap_i2c_unidle(dev);
> >
> > dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
> >
> > - if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> > + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
> > u16 s;
> >
> > /* Set up the fifo size - Get total size */
> > @@ -927,8 +1004,13 @@ omap_i2c_probe(struct platform_device *pdev)
> > * size. This is to ensure that we can handle the status on int
> > * call back latencies.
> > */
> > - dev->fifo_size = (dev->fifo_size / 2);
> > - dev->b_hw = 1; /* Enable hardware fixes */
> > + if (dev->rev >= OMAP_I2C_REV_ON_4430) {
> > + dev->fifo_size = 0;
> > + dev->b_hw = 0; /* Disable hardware fixes */
> > + } else {
> > + dev->fifo_size = (dev->fifo_size / 2);
> > + dev->b_hw = 1; /* Enable hardware fixes */
> > + }
> > }
> >
> > /* reset ASAP, clearing any IRQs */
> > --
> > 1.6.0.4
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-i2c" in
> > the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
>
> --
> Ben (ben-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org, http://www.fluff.org/)
>
> 'a smiley only costs 4 bytes'
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH] omap: i2c: Add i2c support on omap4 platform
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C4619F89-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
@ 2010-03-08 7:40 ` Shilimkar, Santosh
0 siblings, 0 replies; 13+ messages in thread
From: Shilimkar, Santosh @ 2010-03-08 7:40 UTC (permalink / raw)
To: Ben Dooks
Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA, Syed, Rafiuddin,
Cory Maccarrone
[-- Attachment #1: Type: text/plain, Size: 2287 bytes --]
Ben,
> -----Original Message-----
> From: linux-omap-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org [mailto:linux-omap-owner-u79uwXL29Tb/PtFMR13I2A@public.gmane.orgel.org] On Behalf Of
> Shilimkar, Santosh
> Sent: Monday, March 08, 2010 10:31 AM
> To: Ben Dooks
> Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Syed, Rafiuddin; Cory Maccarrone
> Subject: RE: [PATCH] omap: i2c: Add i2c support on omap4 platform
>
> > -----Original Message-----
> > From: Ben Dooks [mailto:ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org]
> > Sent: Monday, March 08, 2010 3:48 AM
> > To: Shilimkar, Santosh
> > Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org; linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-i2c-u79uwXL29TY@public.gmane.orgnel.org; Syed, Rafiuddin;
> Cory
> > Maccarrone
> > Subject: Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
> >
> > On Fri, Feb 19, 2010 at 10:03:00PM +0530, Santosh Shilimkar wrote:
> > > This patch is rebased version of earlier post to add I2C
> > > driver support to OMAP4 platform. On OMAP4, all
> > > I2C register address offsets are changed from OMAP1/2/3 I2C.
> > > In order to not have #ifdef's at various places in code,
> > > as well as to support multi-OMAP build, an array is created
> > > to hold the register addresses with it's offset.
> > >
> > > This patch was submitted, reviewed and acked on mailing list
> > > already. For more details refer below link
> > > http://www.mail-archive.com/linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org/msg02281.html
> > >
> > > This updated verion has a depedancy on "Add support for 16-bit registers"
> > > posted on linux-omap. Below is the patch-works link for the same
> > >
> > > http://patchwork.kernel.org/patch/72295/
> >
> > currently even with this patch applied it doesn't apply cleanly.
> May be it needs refresh after recent merges? Are you ok if I refresh this patch
> against latest mainline on top of below patch and repost
> http://patchwork.kernel.org/patch/72295/
Attached refreshed version which directly applies against the mainline since
"Add support for 16-bit registers" is already merged.
Boot tested on OMAP4 SDP platform.
Regards,
Santosh
[-- Attachment #2: 0001-omap-i2c-Add-i2c-support-on-omap4-platform.patch --]
[-- Type: application/octet-stream, Size: 8537 bytes --]
From dad7ceee3b5437a5ea5f04c1c94ff418b26dcea0 Mon Sep 17 00:00:00 2001
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
Date: Mon, 8 Mar 2010 11:43:11 +0530
Subject: [PATCH v2] omap: i2c: Add i2c support on omap4 platform
This patch is rebased version of earlier post to add I2C
driver support to OMAP4 platform. On OMAP4, all
I2C register address offsets are changed from OMAP1/2/3 I2C.
In order to not have #ifdef's at various places in code,
as well as to support multi-OMAP build, an array is created
to hold the register addresses with it's offset.
This patch was submitted, reviewed and acked on mailing list
already. For more details refer below link
http://www.mail-archive.com/linux-i2c@vger.kernel.org/msg02281.html
Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Angelo Arrifano <miknix@gmail.com>
Tested-by: Angelo Arrifano <miknix@gmail.com>
Acked-by: Cory Maccarrone <darkstar6262@gmail.com>
Tested-by: Cory Maccarrone <darkstar6262@gmail.com>
Cc: Ben Dooks <ben-linux@fluff.org>
---
The patch is generated against latest mainline commit
"25cf84cf377c0aae5dbcf937ea89bc7893db5176" from Linus and has no
dependancy now.
drivers/i2c/busses/i2c-omap.c | 146 ++++++++++++++++++++++++++++++++---------
1 files changed, 114 insertions(+), 32 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 913abd7..ee31e4d 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -44,29 +44,37 @@
/* I2C controller revisions present on specific hardware */
#define OMAP_I2C_REV_ON_2430 0x36
#define OMAP_I2C_REV_ON_3430 0x3C
+#define OMAP_I2C_REV_ON_4430 0x40
/* timeout waiting for the controller to respond */
#define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
-#define OMAP_I2C_REV_REG 0x00
-#define OMAP_I2C_IE_REG 0x01
-#define OMAP_I2C_STAT_REG 0x02
-#define OMAP_I2C_IV_REG 0x03
/* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
-#define OMAP_I2C_WE_REG 0x03
-#define OMAP_I2C_SYSS_REG 0x04
-#define OMAP_I2C_BUF_REG 0x05
-#define OMAP_I2C_CNT_REG 0x06
-#define OMAP_I2C_DATA_REG 0x07
-#define OMAP_I2C_SYSC_REG 0x08
-#define OMAP_I2C_CON_REG 0x09
-#define OMAP_I2C_OA_REG 0x0a
-#define OMAP_I2C_SA_REG 0x0b
-#define OMAP_I2C_PSC_REG 0x0c
-#define OMAP_I2C_SCLL_REG 0x0d
-#define OMAP_I2C_SCLH_REG 0x0e
-#define OMAP_I2C_SYSTEST_REG 0x0f
-#define OMAP_I2C_BUFSTAT_REG 0x10
+enum {
+ OMAP_I2C_REV_REG = 0,
+ OMAP_I2C_IE_REG,
+ OMAP_I2C_STAT_REG,
+ OMAP_I2C_IV_REG,
+ OMAP_I2C_WE_REG,
+ OMAP_I2C_SYSS_REG,
+ OMAP_I2C_BUF_REG,
+ OMAP_I2C_CNT_REG,
+ OMAP_I2C_DATA_REG,
+ OMAP_I2C_SYSC_REG,
+ OMAP_I2C_CON_REG,
+ OMAP_I2C_OA_REG,
+ OMAP_I2C_SA_REG,
+ OMAP_I2C_PSC_REG,
+ OMAP_I2C_SCLL_REG,
+ OMAP_I2C_SCLH_REG,
+ OMAP_I2C_SYSTEST_REG,
+ OMAP_I2C_BUFSTAT_REG,
+ OMAP_I2C_REVNB_LO,
+ OMAP_I2C_REVNB_HI,
+ OMAP_I2C_IRQSTATUS_RAW,
+ OMAP_I2C_IRQENABLE_SET,
+ OMAP_I2C_IRQENABLE_CLR,
+};
/* I2C Interrupt Enable Register (OMAP_I2C_IE): */
#define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */
@@ -169,6 +177,7 @@ struct omap_i2c_dev {
u32 speed; /* Speed of bus in Khz */
u16 cmd_err;
u8 *buf;
+ u8 *regs;
size_t buf_len;
struct i2c_adapter adapter;
u8 fifo_size; /* use as flag and value
@@ -187,15 +196,64 @@ struct omap_i2c_dev {
u16 westate;
};
+const static u8 reg_map[] = {
+ [OMAP_I2C_REV_REG] = 0x00,
+ [OMAP_I2C_IE_REG] = 0x01,
+ [OMAP_I2C_STAT_REG] = 0x02,
+ [OMAP_I2C_IV_REG] = 0x03,
+ [OMAP_I2C_WE_REG] = 0x03,
+ [OMAP_I2C_SYSS_REG] = 0x04,
+ [OMAP_I2C_BUF_REG] = 0x05,
+ [OMAP_I2C_CNT_REG] = 0x06,
+ [OMAP_I2C_DATA_REG] = 0x07,
+ [OMAP_I2C_SYSC_REG] = 0x08,
+ [OMAP_I2C_CON_REG] = 0x09,
+ [OMAP_I2C_OA_REG] = 0x0a,
+ [OMAP_I2C_SA_REG] = 0x0b,
+ [OMAP_I2C_PSC_REG] = 0x0c,
+ [OMAP_I2C_SCLL_REG] = 0x0d,
+ [OMAP_I2C_SCLH_REG] = 0x0e,
+ [OMAP_I2C_SYSTEST_REG] = 0x0f,
+ [OMAP_I2C_BUFSTAT_REG] = 0x10,
+};
+
+const static u8 omap4_reg_map[] = {
+ [OMAP_I2C_REV_REG] = 0x04,
+ [OMAP_I2C_IE_REG] = 0x2c,
+ [OMAP_I2C_STAT_REG] = 0x28,
+ [OMAP_I2C_IV_REG] = 0x34,
+ [OMAP_I2C_WE_REG] = 0x34,
+ [OMAP_I2C_SYSS_REG] = 0x90,
+ [OMAP_I2C_BUF_REG] = 0x94,
+ [OMAP_I2C_CNT_REG] = 0x98,
+ [OMAP_I2C_DATA_REG] = 0x9c,
+ [OMAP_I2C_SYSC_REG] = 0x20,
+ [OMAP_I2C_CON_REG] = 0xa4,
+ [OMAP_I2C_OA_REG] = 0xa8,
+ [OMAP_I2C_SA_REG] = 0xac,
+ [OMAP_I2C_PSC_REG] = 0xb0,
+ [OMAP_I2C_SCLL_REG] = 0xb4,
+ [OMAP_I2C_SCLH_REG] = 0xb8,
+ [OMAP_I2C_SYSTEST_REG] = 0xbC,
+ [OMAP_I2C_BUFSTAT_REG] = 0xc0,
+ [OMAP_I2C_REVNB_LO] = 0x00,
+ [OMAP_I2C_REVNB_HI] = 0x04,
+ [OMAP_I2C_IRQSTATUS_RAW] = 0x24,
+ [OMAP_I2C_IRQENABLE_SET] = 0x2c,
+ [OMAP_I2C_IRQENABLE_CLR] = 0x30,
+};
+
static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
int reg, u16 val)
{
- __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
+ __raw_writew(val, i2c_dev->base +
+ (i2c_dev->regs[reg] << i2c_dev->reg_shift));
}
static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
{
- return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
+ return __raw_readw(i2c_dev->base +
+ (i2c_dev->regs[reg] << i2c_dev->reg_shift));
}
static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
@@ -264,7 +322,11 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
WARN_ON(dev->idle);
dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
- omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
+ if (dev->rev >= OMAP_I2C_REV_ON_4430)
+ omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
+ else
+ omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
+
if (dev->rev < OMAP_I2C_REV_2) {
iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
} else {
@@ -329,7 +391,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
* REVISIT: Some wkup sources might not be needed.
*/
dev->westate = OMAP_I2C_WE_ALL;
- omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
+ if (dev->rev < OMAP_I2C_REV_ON_4430)
+ omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
+ dev->westate);
}
}
omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
@@ -356,7 +420,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
psc = fclk_rate / 12000000;
}
- if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+ if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
/*
* HSI2C controller internal clk rate should be 19.2 Mhz for
@@ -746,9 +810,12 @@ complete:
if (dev->buf_len) {
*dev->buf++ = w;
dev->buf_len--;
- /* Data reg from 2430 is 8 bit wide */
- if (!cpu_is_omap2430() &&
- !cpu_is_omap34xx()) {
+ /*
+ * Data reg in 2430, omap3 and
+ * omap4 is 8 bit wide
+ */
+ if (cpu_class_is_omap1() ||
+ cpu_is_omap2420()) {
if (dev->buf_len) {
*dev->buf++ = w >> 8;
dev->buf_len--;
@@ -786,9 +853,12 @@ complete:
if (dev->buf_len) {
w = *dev->buf++;
dev->buf_len--;
- /* Data reg from 2430 is 8 bit wide */
- if (!cpu_is_omap2430() &&
- !cpu_is_omap34xx()) {
+ /*
+ * Data reg in 2430, omap3 and
+ * omap4 is 8 bit wide
+ */
+ if (cpu_class_is_omap1() ||
+ cpu_is_omap2420()) {
if (dev->buf_len) {
w |= *dev->buf++ << 8;
dev->buf_len--;
@@ -905,11 +975,16 @@ omap_i2c_probe(struct platform_device *pdev)
if ((r = omap_i2c_get_clocks(dev)) != 0)
goto err_iounmap;
+ if (cpu_is_omap44xx())
+ dev->regs = (u8 *) omap4_reg_map;
+ else
+ dev->regs = (u8 *) reg_map;
+
omap_i2c_unidle(dev);
dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
- if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+ if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
u16 s;
/* Set up the fifo size - Get total size */
@@ -921,12 +996,19 @@ omap_i2c_probe(struct platform_device *pdev)
* size. This is to ensure that we can handle the status on int
* call back latencies.
*/
- dev->fifo_size = (dev->fifo_size / 2);
- dev->b_hw = 1; /* Enable hardware fixes */
+ if (dev->rev >= OMAP_I2C_REV_ON_4430) {
+ dev->fifo_size = 0;
+ dev->b_hw = 0; /* Disable hardware fixes */
+ } else {
+ dev->fifo_size = (dev->fifo_size / 2);
+ dev->b_hw = 1; /* Enable hardware fixes */
+ }
}
if (cpu_is_omap7xx())
dev->reg_shift = 1;
+ else if (cpu_is_omap44xx())
+ dev->reg_shift = 0;
else
dev->reg_shift = 2;
--
1.6.0.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
end of thread, other threads:[~2010-03-08 7:40 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-02-19 16:33 [PATCH] omap: i2c: Add i2c support on omap4 platform Santosh Shilimkar
[not found] ` <1266597180-25139-1-git-send-email-santosh.shilimkar-l0cyMroinI0@public.gmane.org>
2010-02-23 6:01 ` Shilimkar, Santosh
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C42E10AD-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
2010-02-25 21:47 ` Tony Lindgren
2010-02-26 4:57 ` Shilimkar, Santosh
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C43BF6C3-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
2010-02-27 4:08 ` Shilimkar, Santosh
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C43BFC61-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
2010-02-27 20:40 ` Tony Lindgren
[not found] ` <20100227204049.GK17041-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
2010-02-28 5:31 ` Shilimkar, Santosh
2010-03-02 22:54 ` Tony Lindgren
[not found] ` <20100302225445.GA14164-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
2010-03-07 0:47 ` Angelo Arrifano
2010-03-07 4:38 ` Cory Maccarrone
2010-03-07 22:18 ` Ben Dooks
[not found] ` <20100307221819.GA15071-elnMNo+KYs3pIgCt6eIbzw@public.gmane.org>
2010-03-08 5:01 ` Shilimkar, Santosh
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02C4619F89-/tLxBxkBPtCIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
2010-03-08 7:40 ` Shilimkar, Santosh
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.