All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Lin, Ray" <Ray.Lin@lsi.com>
To: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Xen-devel <xen-devel@lists.xensource.com>,
	Dante Cinco <dantecinco@gmail.com>
Subject: RE: swiotlb=force in Konrad's xen-pcifront-0.8.2 pvops domU kernel with PCI passthrough
Date: Fri, 12 Nov 2010 12:38:59 -0700	[thread overview]
Message-ID: <EB4C61A1A2501842A04B573FE42B14D601374FBFD2@cosmail02.lsi.com> (raw)
In-Reply-To: <20101112165541.GA10339@dumpdata.com>

 

-----Original Message-----
From: Konrad Rzeszutek Wilk [mailto:konrad.wilk@oracle.com] 
Sent: Friday, November 12, 2010 8:56 AM
To: Lin, Ray
Cc: Dante Cinco; Xen-devel
Subject: Re: [Xen-devel] swiotlb=force in Konrad's xen-pcifront-0.8.2 pvops domU kernel with PCI passthrough

> That does not sound right. You should be able to use the PCI passthrough without the IOMMU. Since it is an interrupt issue it sounds like that you are using x2APIC and that is enabled without the IOMMU.
> Had you tried disabling IOMMU and x2apic? (this is all on the 
> hypervisor line?)
> 
> Konrad,
> It's unlikely the interrupt issue but DMA issue. Here is the sequence 
> how the tachyon device generates the DMA/interrupts,
> - the tachyon device does the DMA to update the memory which indicates the source of interrupt.
> - After the DMA is done, the tachyon device trigger an interrupt.
> - The interrupt service routine of software driver is invoked due to 
> the interrupt
> - The interrupt service routine checks the source of interrupts by examining the memory which is supposed to be updated by previous DMA.
> - Even though the interrupt happens, the driver code can't find the source of interrupt since the DMA doesn't work properly.

That sounds like the tachyon device is updating the wrong memory location. How are you programming the memory location where thetachyon device is suppose to touch? Are you using the value from pci_map_page or are you using virt_to_phys? The virt_to_phys should be different from the pci_map_page.. unless you allocated a coherent DMA pool using pci_alloc_coherent in which case the virt_to_phys() values for that pool should be the right MFNs.

Our driver uses pci_map_single to get the physical addr to program the chip.


One way you can figure this is doing something like this to make sure you got the right MFN:

add these two:
#include <xen/page.h>
#include <asm/xen/page.h>

          phys_addr_t phys = page_to_phys(mem->pages[i]);
+               if (xen_pv_domain()) {
+                       phys_addr_t xen_phys = PFN_PHYS(pfn_to_mfn(
+                                       page_to_pfn(mem->pages[i])));
+                       if (phys != xen_phys) {
+                               printk(KERN_ERR "Fixing up: (0x%lx->0x%lx)." \
+                                       " CODE UNTESTED!\n",
+                                       (unsigned long)phys,
+                                       (unsigned long)xen_phys);
+                               WARN_ON_ONCE(phys != xen_phys);
+                               phys = xen_phys;
+                       }
+               }
	and using the 'phys' value from now.



If this sounds like black magic, here is a short writeup http://wiki.xensource.com/xenwiki/XenPVOPSDRM

look at "Why those patches" section.

Lastly, are you using unsigned long for or the phys_addr_t typedefs?

The driver uses dma_addr_t for physical address. 

The more I think about your problem the more it sounds like a truncating issue. You said that it works just right (albeit slow) if you use 'swiotlb=force'. The slowness could be due to not using the pci_sync_* APIs to sync the DMA buffers.. But irregardless using bounce buffers will slow the DMA operations down.

The driver do use pci_dma_sync_single_for_cpu or pci_dma_sync_single_for_device to sync the DMA buffers. Without these syncs, the driver would not work at all.

Using the bounce buffers limits the DMA operations to under 32-bit. So could it be that you are using some casting macro that casts a PFN to unsigned long or vice-versa and we end up truncating it to 32-bit? (I've seen this issue actually with InfiniBand drivers back in RHEL5 days..). Lastly, do you set your DMA mask on the device to 32BIT?

The tachyon chip supports both 32-bit & 45-bit dma. Some features need to set 32-bit physical addr to chip. Others need to set 45-bit physical addr to chip. 
The driver doesn't set DMA mask on the device to 32 bit.

I'm looking at the driver code to see anything wrong or not. We appreciate your help Konrad.

  reply	other threads:[~2010-11-12 19:38 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-11-11  1:16 swiotlb=force in Konrad's xen-pcifront-0.8.2 pvops domU kernel with PCI passthrough Dante Cinco
2010-11-11 16:04 ` Konrad Rzeszutek Wilk
2010-11-11 18:31   ` Dante Cinco
2010-11-11 19:03     ` Konrad Rzeszutek Wilk
2010-11-11 19:42       ` Lin, Ray
2010-11-12 15:56         ` Konrad Rzeszutek Wilk
2010-11-12 16:20           ` Lin, Ray
2010-11-12 16:55             ` Konrad Rzeszutek Wilk
2010-11-12 19:38               ` Lin, Ray [this message]
2010-11-12 22:33                 ` Konrad Rzeszutek Wilk
2010-11-12 22:57                   ` Lin, Ray
2010-11-16 17:07                   ` Dante Cinco
2010-11-16 18:57                     ` Konrad Rzeszutek Wilk
2010-11-16 19:43                       ` Dante Cinco
2010-11-16 20:15                         ` Konrad Rzeszutek Wilk
2010-11-18  1:09                           ` Dante Cinco
2010-11-18 17:19                             ` Konrad Rzeszutek Wilk
2010-11-18 17:28                               ` Chris Mason
2010-11-18 17:54                               ` Mathieu Desnoyers
2010-11-18 18:43                               ` Dante Cinco
2010-11-18 18:52                                 ` Lin, Ray
2010-11-18 19:35                                 ` Dante Cinco
2010-11-18 21:20                                   ` Dan Magenheimer
2010-11-18 21:39                                     ` Lin, Ray
2010-11-19  0:20                                       ` Dan Magenheimer
2010-11-19  1:38                                         ` Dante Cinco
2010-11-19 17:10                                   ` Jeremy Fitzhardinge
2010-11-19 17:52                                     ` Dante Cinco
2010-11-19 17:58                                       ` Keir Fraser
2010-11-19 22:36                                         ` Dan Magenheimer
2010-11-20  0:13                                           ` Dante Cinco
2010-11-19 17:55                                     ` Lin, Ray
2010-11-12 18:29           ` Dante Cinco
2010-11-11 22:32       ` Dante Cinco
2010-11-12  1:02         ` Dante Cinco
2010-11-12 16:58           ` Konrad Rzeszutek Wilk

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=EB4C61A1A2501842A04B573FE42B14D601374FBFD2@cosmail02.lsi.com \
    --to=ray.lin@lsi.com \
    --cc=dantecinco@gmail.com \
    --cc=konrad.wilk@oracle.com \
    --cc=xen-devel@lists.xensource.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.