[RFC 2/7] Unite all PCI-e on 85xx and 86xx under one codebase

[RFC 2/7] Unite all PCI-e on 85xx and 86xx under one codebase

[Andy Fleming]

Add 85xx PCI express memory map register.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
---
 include/asm-ppc/immap_85xx.h |   75 ++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 75 insertions(+), 0 deletions(-)

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index b35cd6a..adef8c7 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -87,6 +87,81 @@ typedef struct ccsr_pci {
 	char	res19[472];
 } ccsr_pci_t;
 
+/* PCI Express Registers */
+typedef struct ccsr_pex {
+	uint    pex_config_addr;        /* 0x.000 - PCI Express Configuration Address Register */
+	uint    pex_config_data;        /* 0x.004 - PCI Express Configuration Data Register */
+	char    res1[4];
+	uint    pex_otb_cpl_tor;        /* 0x.00c - PCI Express Outbound completion timeout register */
+	uint    pex_conf_tor;           /* 0x.010 - PCI Express configuration timeout register */
+	char    res2[12];
+	uint    pex_pme_mes_dr;         /* 0x.020 - PCI Express PME and message detect register */
+	uint    pex_pme_mes_disr;       /* 0x.024 - PCI Express PME and message disable register */
+	uint    pex_pme_mes_ier;        /* 0x.028 - PCI Express PME and message interrupt enable register */
+	uint    pex_pmcr;               /* 0x.02c - PCI Express power management command register */
+	char    res3[3024];
+	uint    pexotar0;               /* 0x.c00 - PCI Express outbound translation address register 0 */
+	uint    pexotear0;              /* 0x.c04 - PCI Express outbound translation extended address register 0*/
+	char    res4[8];
+	uint    pexowar0;               /* 0x.c10 - PCI Express outbound window attributes register 0*/
+	char    res5[12];
+	uint    pexotar1;               /* 0x.c20 - PCI Express outbound translation address register 1 */
+	uint    pexotear1;              /* 0x.c24 - PCI Express outbound translation extended address register 1*/
+	uint    pexowbar1;              /* 0x.c28 - PCI Express outbound window base address register 1*/
+	char    res6[4];
+	uint    pexowar1;               /* 0x.c30 - PCI Express outbound window attributes register 1*/
+	char    res7[12];
+	uint    pexotar2;               /* 0x.c40 - PCI Express outbound translation address register 2 */
+	uint    pexotear2;              /* 0x.c44 - PCI Express outbound translation extended address register 2*/
+	uint    pexowbar2;              /* 0x.c48 - PCI Express outbound window base address register 2*/
+	char    res8[4];
+	uint    pexowar2;               /* 0x.c50 - PCI Express outbound window attributes register 2*/
+	char    res9[12];
+	uint    pexotar3;               /* 0x.c60 - PCI Express outbound translation address register 3 */
+	uint    pexotear3;              /* 0x.c64 - PCI Express outbound translation extended address register 3*/
+	uint    pexowbar3;              /* 0x.c68 - PCI Express outbound window base address register 3*/
+	char    res10[4];
+	uint    pexowar3;               /* 0x.c70 - PCI Express outbound window attributes register 3*/
+	char    res11[12];
+	uint    pexotar4;               /* 0x.c80 - PCI Express outbound translation address register 4 */
+	uint    pexotear4;              /* 0x.c84 - PCI Express outbound translation extended address register 4*/
+	uint    pexowbar4;              /* 0x.c88 - PCI Express outbound window base address register 4*/
+	char    res12[4];
+	uint    pexowar4;               /* 0x.c90 - PCI Express outbound window attributes register 4*/
+	char    res13[12];
+	char    res14[256];
+	uint    pexitar3;               /* 0x.da0 - PCI Express inbound translation address register 3 */
+	char    res15[4];
+	uint    pexiwbar3;              /* 0x.da8 - PCI Express inbound window base address register 3 */
+	uint    pexiwbear3;             /* 0x.dac - PCI Express inbound window base extended address register 3 */
+	uint    pexiwar3;               /* 0x.db0 - PCI Express inbound window attributes register 3 */
+	char    res16[12];
+	uint    pexitar2;               /* 0x.dc0 - PCI Express inbound translation address register 2 */
+	char    res17[4];
+	uint    pexiwbar2;              /* 0x.dc8 - PCI Express inbound window base address register 2 */
+	uint    pexiwbear2;             /* 0x.dcc - PCI Express inbound window base extended address register 2 */
+	uint    pexiwar2;               /* 0x.dd0 - PCI Express inbound window attributes register 2 */
+	char    res18[12];
+	uint    pexitar1;               /* 0x.de0 - PCI Express inbound translation address register 2 */
+	char    res19[4];
+	uint    pexiwbar1;              /* 0x.de8 - PCI Express inbound window base address register 2 */
+	uint    pexiwbear1;             /* 0x.dec - PCI Express inbound window base extended address register 2 */
+	uint    pexiwar1;               /* 0x.df0 - PCI Express inbound window attributes register 2 */
+	char    res20[12];
+	uint    pex_err_dr;             /* 0x.e00 - PCI Express error detect register */
+	char    res21[4];
+	uint    pex_err_en;             /* 0x.e08 - PCI Express error interrupt enable register */
+	char    res22[4];
+	uint    pex_err_disr;           /* 0x.e10 - PCI Express error disable register */
+	char    res23[12];
+	uint    pex_err_cap_stat;       /* 0x.e20 - PCI Express error capture status register */
+	char    res24[4];
+	uint    pex_err_cap_r0;         /* 0x.e28 - PCI Express error capture register 0 */
+	uint    pex_err_cap_r1;         /* 0x.e2c - PCI Express error capture register 0 */
+	uint    pex_err_cap_r2;         /* 0x.e30 - PCI Express error capture register 0 */
+	uint    pex_err_cap_r3;         /* 0x.e34 - PCI Express error capture register 0 */
+} ccsr_pex_t;
+
 /* Global Utility Registers */
 typedef struct ccsr_guts {
 	uint	porpllsr;	/* 0x.0000 - POR PLL Ratio Status Register */
-- 
1.4.4

Re: [RFC 2/7] Unite all PCI-e on 85xx and 86xx under one codebase

[Kumar Gala]

On Feb 15, 2007, at 8:44 PM, Andy Fleming wrote:

> Add 85xx PCI express memory map register.
>
> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
> Acked-by: Andy Fleming <afleming@freescale.com>
> ---
>  include/asm-ppc/immap_85xx.h |   75 +++++++++++++++++++++++++++++++ 
> +++++++++++
>  1 files changed, 75 insertions(+), 0 deletions(-)

Are the 86xx and 85xx structs the same?  If so, can we pull them out  
of immap_*.h into a sysdev/fsl_pcie.h

(and lose the typedef while you're at it).

- k

RE: [RFC 2/7] Unite all PCI-e on 85xx and 86xx under one codebase

[Zang Roy-r61911]

=20
> On Feb 15, 2007, at 8:44 PM, Andy Fleming wrote:
>=20
> > Add 85xx PCI express memory map register.
> >
> > Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
> > Acked-by: Andy Fleming <afleming@freescale.com>
> > ---
> >  include/asm-ppc/immap_85xx.h |   75=20
> +++++++++++++++++++++++++++++++=20
> > +++++++++++
> >  1 files changed, 75 insertions(+), 0 deletions(-)
>=20
> Are the 86xx and 85xx structs the same?  If so, can we pull=20
> them out of immap_*.h into a sysdev/fsl_pcie.h
>=20
> (and lose the typedef while you're at it).
They have same structs. But I do not think it is proper to move them
into =20
sysdev/fsl_pcie.h now. sysdev/fsl_pcie.c does not use  this header file.
plaforms/85xx/pci.c use it to set up memory map windows.=20
In fact, there is little difference between immap_85xx.h and
immap_86xx.h.=20
After the migration from ppc to powerpc, we can unify them together.

Re: [RFC 2/7] Unite all PCI-e on 85xx and 86xx under one codebase

[Kumar Gala]

On Feb 26, 2007, at 12:41 AM, Zang Roy-r61911 wrote:

>
>> On Feb 15, 2007, at 8:44 PM, Andy Fleming wrote:
>>
>>> Add 85xx PCI express memory map register.
>>>
>>> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
>>> Acked-by: Andy Fleming <afleming@freescale.com>
>>> ---
>>>  include/asm-ppc/immap_85xx.h |   75
>> +++++++++++++++++++++++++++++++
>>> +++++++++++
>>>  1 files changed, 75 insertions(+), 0 deletions(-)
>>
>> Are the 86xx and 85xx structs the same?  If so, can we pull
>> them out of immap_*.h into a sysdev/fsl_pcie.h
>>
>> (and lose the typedef while you're at it).
> They have same structs. But I do not think it is proper to move them
> into
> sysdev/fsl_pcie.h now. sysdev/fsl_pcie.c does not use  this header  
> file.
> plaforms/85xx/pci.c use it to set up memory map windows.
> In fact, there is little difference between immap_85xx.h and
> immap_86xx.h.
> After the migration from ppc to powerpc, we can unify them together.

Why wait, I don't believe we support pcie in arch/ppc for anything  
fsl platform and the PCI support is different between arch/powerpc  
and arch/ppc.

- k

RE: [RFC 2/7] Unite all PCI-e on 85xx and 86xx under one codebase

[Zang Roy-r61911]

=20
> On Feb 26, 2007, at 12:41 AM, Zang Roy-r61911 wrote:
>=20
> >
> >> On Feb 15, 2007, at 8:44 PM, Andy Fleming wrote:
> >>
> >>> Add 85xx PCI express memory map register.
> >>>
> >>> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
> >>> Acked-by: Andy Fleming <afleming@freescale.com>
> >>> ---
> >>>  include/asm-ppc/immap_85xx.h |   75
> >> +++++++++++++++++++++++++++++++
> >>> +++++++++++
> >>>  1 files changed, 75 insertions(+), 0 deletions(-)
> >>
> >> Are the 86xx and 85xx structs the same?  If so, can we=20
> pull them out=20
> >> of immap_*.h into a sysdev/fsl_pcie.h
> >>
> >> (and lose the typedef while you're at it).
> > They have same structs. But I do not think it is proper to=20
> move them=20
> > into sysdev/fsl_pcie.h now. sysdev/fsl_pcie.c does not use  this=20
> > header file.
> > plaforms/85xx/pci.c use it to set up memory map windows.
> > In fact, there is little difference between immap_85xx.h and=20
> > immap_86xx.h.
> > After the migration from ppc to powerpc, we can unify them together.
>=20
> Why wait, I don't believe we support pcie in arch/ppc for=20
> anything fsl platform and the PCI support is different=20
> between arch/powerpc and arch/ppc.
>=20
Wait  to unify immap  together :-).
I agree to separate pcie struct for  arch/powerpc, then the code in
arch/powerpc will not depend header file include/asm-ppc.
I will provide patch to Andy and Jon tomorrow.
Roy

Re: [RFC 2/7] Unite all PCI-e on 85xx and 86xx under one codebase

[Kumar Gala]

On Feb 26, 2007, at 9:52 AM, Zang Roy-r61911 wrote:

>
>> On Feb 26, 2007, at 12:41 AM, Zang Roy-r61911 wrote:
>>
>>>
>>>> On Feb 15, 2007, at 8:44 PM, Andy Fleming wrote:
>>>>
>>>>> Add 85xx PCI express memory map register.
>>>>>
>>>>> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
>>>>> Acked-by: Andy Fleming <afleming@freescale.com>
>>>>> ---
>>>>>  include/asm-ppc/immap_85xx.h |   75
>>>> +++++++++++++++++++++++++++++++
>>>>> +++++++++++
>>>>>  1 files changed, 75 insertions(+), 0 deletions(-)
>>>>
>>>> Are the 86xx and 85xx structs the same?  If so, can we
>> pull them out
>>>> of immap_*.h into a sysdev/fsl_pcie.h
>>>>
>>>> (and lose the typedef while you're at it).
>>> They have same structs. But I do not think it is proper to
>> move them
>>> into sysdev/fsl_pcie.h now. sysdev/fsl_pcie.c does not use  this
>>> header file.
>>> plaforms/85xx/pci.c use it to set up memory map windows.
>>> In fact, there is little difference between immap_85xx.h and
>>> immap_86xx.h.
>>> After the migration from ppc to powerpc, we can unify them together.
>>
>> Why wait, I don't believe we support pcie in arch/ppc for
>> anything fsl platform and the PCI support is different
>> between arch/powerpc and arch/ppc.
>>
> Wait  to unify immap  together :-).

Don't exactly follow.

> I agree to separate pcie struct for  arch/powerpc, then the code in
> arch/powerpc will not depend header file include/asm-ppc.
> I will provide patch to Andy and Jon tomorrow.

ok.

- k