[U-Boot] [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.

[U-Boot] [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.

[Tor Krill]

On Thu, 2010-06-24 at 14:26 +0200, Prafulla Wadaskar wrote:
> 
> > -----Original Message-----
> > From: Tor Krill [mailto:tor at excito.com] 
> > Sent: Thursday, June 24, 2010 5:05 PM
> > To: Prafulla Wadaskar
> > Cc: u-boot at lists.denx.de
> > Subject: RE: [PATCH V2] Allow PHY addresses on kirkwood egiga 
> > to be non continuous.
> > 
> > 
> > Hi Prafulla,
> > 
> > On Thu, 2010-06-24 at 13:22 +0200, Prafulla Wadaskar wrote:
> > > 
> > > > -----Original Message-----
> > > > From: Tor Krill [mailto:tor at excito.com] 
> > > > Sent: Thursday, June 24, 2010 3:02 PM
> > > > To: u-boot at lists.denx.de
> > > > Cc: Prafulla Wadaskar; Tor Krill
> > > > Subject: [PATCH V2] Allow PHY addresses on kirkwood egiga to 
> > > > be non continuous.
> > > > 
> > > > Changing its configuration from PHY_BASE_ADR single value to use
> > > > CONFIG_PHY_BASE_ADDRS as an array with adresses.
> > > > 
> > > > Updated in version 2:
> > > > 
> > > > Merged board updates to single patch.
> > > 
> > > These two lines should go as changelog for v2 below (after ---)
> > 
> > Sorry, there seems to be no end on my mistakes :(
> > 
> > > > 
> > > > Signed-off-by: Tor Krill <tor@excito.com>
> > > > ---
> > > i.e. here..
> > > 
> > > >  board/keymile/km_arm/km_arm.c |    3 ++-
> > > >  drivers/net/kirkwood_egiga.c  |    3 ++-
> > > >  drivers/net/kirkwood_egiga.h  |    8 ++++----
> > > >  include/configs/guruplug.h    |    2 +-
> > > >  include/configs/km_arm.h      |    2 +-
> > > >  include/configs/openrd_base.h |    2 +-
> > > >  include/configs/rd6281a.h     |    2 +-
> > > >  include/configs/sheevaplug.h  |    2 +-
> > > >  8 files changed, 13 insertions(+), 11 deletions(-)
> > > 
> > > Hi Tom
> > > I understood your problem.
> > > But all of the Kirkwood boards so far have similar 
> > implementation which is standard practice.
> > > How does your board design differed in this case?
> > > 
> > > Instead of fixing it here for all other boards,
> > > can't you simply align PHY address on your board?
> > > I think this will be much easier.
> > 
> > We use both ethernet interfaces by default in our design, with the phy
> > addresses 0x08 and 0x18, and unfortunately we have already started the
> > manufacturing of these units which makes it expensive and hard to
> > reverse this design decision :(
> 
> Do you think this will be corrected in next h/w version?
> If yes, then you can keep this patch private to yourself.

We will unfortunately not change this, what we know of now. If it had
only been moving some resistors mounted or not it could perhaps have
been fixable before mass production. But as it is now this would involve
us changing the the design as well. 

> > 
> > But if we turn this around if the hardware allows this then 
> > why not let
> > this be configurable in u-boot as well? Do this have any technical
> > implications on the other boards?
> 
> Overall 
>
> 1. This patch increases u-boot binary size by 20 bytes. (may be
>  critical issue on low footprint boards like mv88f6281gtw_ge). 

Ok, i only get this to ~4 bytes but thats a valid point.

> 2. For the boards using single port will also need to configure PHY address
>  for other port, which is meaningless, unnecessary and confusing.

Sure you had to put something there to be on the safe side. But is that
really that confusing, the SOC really have two ports, them being used or
not? 

This is the exact same mechanism that is used for
CONFIG_KIRKWOOD_EGIGA_PORTS which is implemented as an array telling the
driver if it should initialize the port or not.

> Technically no implications, but we need to keep code simple, small and standard.

And again, i think the flexibility is worth the "small" prize. I know
that fx the TK71 devkit have non consecutive PHY addresses (Even though
it not being present in mainline u-boot) 

If you are able to set the addresses "freely", why limit this in
software?

The alternative, as i see it, would be to have defines for each port and
then ifdef each init. Would that be an alternative?

Regards,

/Tor

[U-Boot] [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.

[Wolfgang Denk]

Dear Tor Krill,

In message <1277716302.2221.37.camel@tor-desktop> you wrote:
>
> > 2. For the boards using single port will also need to configure PHY address
> >  for other port, which is meaningless, unnecessary and confusing.
> 
> Sure you had to put something there to be on the safe side. But is that
> really that confusing, the SOC really have two ports, them being used or
> not? 

It is indeed confusing and should be avoided if one has to configurwe
hardware ports that are not actually present or used on a specific
board.

If needed, provide sane defaults internally in the code.

But keep in mind that U-Boot requires that only used peripherals
should be initialized - we should not initisalize any unused ports.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Let's say the docs present a simplified view of reality...    :-)
                      - Larry Wall in  <6940@jpl-devvax.JPL.NASA.GOV>

[U-Boot] [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.

[Prafulla Wadaskar]

 

> -----Original Message-----
> From: Wolfgang Denk [mailto:wd at denx.de] 
> Sent: Monday, June 28, 2010 5:32 PM
> To: Tor Krill
> Cc: Prafulla Wadaskar; u-boot at lists.denx.de
> Subject: Re: [U-Boot] [PATCH V2] Allow PHY addresses on 
> kirkwood egiga to be non continuous.
> 
> Dear Tor Krill,
> 
> In message <1277716302.2221.37.camel@tor-desktop> you wrote:
> >
> > > 2. For the boards using single port will also need to 
> configure PHY address
> > >  for other port, which is meaningless, unnecessary and confusing.
> > 
> > Sure you had to put something there to be on the safe side. 
> But is that
> > really that confusing, the SOC really have two ports, them 
> being used or
> > not? 
> 
> It is indeed confusing and should be avoided if one has to configurwe
> hardware ports that are not actually present or used on a specific
> board.
> 
> If needed, provide sane defaults internally in the code.
> 
> But keep in mind that U-Boot requires that only used peripherals
> should be initialized - we should not initisalize any unused ports.

Yes,
This is already taken care by kirkwood_egiga driver, it only initialize selected port

Regards..
Prafulla . .

[U-Boot] [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.

[Tor Krill]

On Thu, 2010-06-24 at 18:37 +0200, Mike Frysinger wrote:
> On Thursday, June 24, 2010 05:31:47 Tor Krill wrote:
> >  void reset_phy(void)
> >  {
> >  	char *name = "egiga0";
> > +	u8 port_addr[] = CONFIG_PHY_ADDRS;
> > 
> >  	if (miiphy_set_current_dev(name))
> >  		return;
> > 
> >  	/* reset the phy */
> > -	miiphy_reset(name, CONFIG_PHY_BASE_ADR);
> > +	miiphy_reset(name, port_addr[0]);
> >  }
> 
> hmm, this cant possibly be correct.  how do you know which of the phys is to 
> be reset ?  but i guess that's just a bug in the ARM tree you cant do much 
> about without fixing everyone.

In the original the base adress was used to adress the PHY being reset
and as long as you don't enter the addresses in reverse in the array the
above construction should work. (And since this is for a specific board,
only using one PHY(?), it should be quite isolated.)

/Tor

[U-Boot] [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.

[Mike Frysinger]

On Thursday, June 24, 2010 12:48:25 Albert ARIBAUD wrote:
> Le 24/06/2010 18:37, Mike Frysinger a ?crit :
> > i dont know anything about the kirkwood_egiga, but cant you have more
> > than one instance on a board ?  if so, it'd make more sense to change
> > the phy addr define stuff into an array argument that gets passed to the
> > driver init func. -mike
> 
> More than one instance on Kirkwood is not possible as the egiga is
> actually part of the SoC itself.

until the SoC maker produces one with 2 on it ;)

but ok, nm me then
-mike
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[U-Boot] [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.

[Albert ARIBAUD]

Hi all,

Le 24/06/2010 18:37, Mike Frysinger a ?crit :

> i dont know anything about the kirkwood_egiga, but cant you have more than one
> instance on a board ?  if so, it'd make more sense to change the phy addr
> define stuff into an array argument that gets passed to the driver init func.
> -mike

More than one instance on Kirkwood is not possible as the egiga is 
actually part of the SoC itself.

(note however that it is used on other Marvell SoCs, notably Orion5x 
with only one port; I am preparing (and yes, dutifully testing, on both 
a Kirkwood OpenRD Client and an Orion5x ED Mini V2) a set of patches 
that will remove ties to kirkwood in egiga and then add orion5x support 
to it)

Amicalement,
-- 
Albert.

[U-Boot] [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.

[Mike Frysinger]

On Thursday, June 24, 2010 05:31:47 Tor Krill wrote:
>  void reset_phy(void)
>  {
>  	char *name = "egiga0";
> +	u8 port_addr[] = CONFIG_PHY_ADDRS;
> 
>  	if (miiphy_set_current_dev(name))
>  		return;
> 
>  	/* reset the phy */
> -	miiphy_reset(name, CONFIG_PHY_BASE_ADR);
> +	miiphy_reset(name, port_addr[0]);
>  }

hmm, this cant possibly be correct.  how do you know which of the phys is to 
be reset ?  but i guess that's just a bug in the ARM tree you cant do much 
about without fixing everyone.

> --- a/drivers/net/kirkwood_egiga.c
> +++ b/drivers/net/kirkwood_egiga.c
> @@ -629,6 +629,7 @@ int kirkwood_egiga_initialize(bd_t * bis)
>  	int devnum;
>  	char *s;
>  	u8 used_ports[MAX_KWGBE_DEVS] = CONFIG_KIRKWOOD_EGIGA_PORTS;
> +	u8 port_addr[MAX_KWGBE_DEVS] = PHY_ADDRS;
> 
>  	for (devnum = 0; devnum < MAX_KWGBE_DEVS; devnum++) {
>  		/*skip if port is configured not to use */
> @@ -712,7 +713,7 @@ int kirkwood_egiga_initialize(bd_t * bis)
>  		miiphy_register(dev->name, smi_reg_read, smi_reg_write);
>  		/* Set phy address of the port */
>  		miiphy_write(dev->name, KIRKWOOD_PHY_ADR_REQUEST,
> -				KIRKWOOD_PHY_ADR_REQUEST, PHY_BASE_ADR + devnum);
> +				KIRKWOOD_PHY_ADR_REQUEST, port_addr[devnum]);
>  #endif
>  	}
>  	return 0;
> --- a/drivers/net/kirkwood_egiga.h
> +++ b/drivers/net/kirkwood_egiga.h
> @@ -30,11 +30,11 @@
> 
>  #define MAX_KWGBE_DEVS	2	/*controller has two ports */
> 
> -/* PHY_BASE_ADR is board specific and can be configured */
> -#if defined (CONFIG_PHY_BASE_ADR)
> -#define PHY_BASE_ADR		CONFIG_PHY_BASE_ADR
> +/* PHY addresses is board specific and can be configured */
> +#if defined (CONFIG_PHY_ADDRS)
> +#define PHY_ADDRS		CONFIG_PHY_ADDRS
>  #else
> -#define PHY_BASE_ADR		0x08	/* default phy base addr */
> +#define PHY_ADDRS		{0x08,0x09}	/* default phy base addr */
>  #endif

i dont know anything about the kirkwood_egiga, but cant you have more than one 
instance on a board ?  if so, it'd make more sense to change the phy addr 
define stuff into an array argument that gets passed to the driver init func.
-mike
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[U-Boot] [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.

[Tor Krill]

Hi Prafulla,

On Thu, 2010-06-24 at 13:22 +0200, Prafulla Wadaskar wrote:
> 
> > -----Original Message-----
> > From: Tor Krill [mailto:tor at excito.com] 
> > Sent: Thursday, June 24, 2010 3:02 PM
> > To: u-boot at lists.denx.de
> > Cc: Prafulla Wadaskar; Tor Krill
> > Subject: [PATCH V2] Allow PHY addresses on kirkwood egiga to 
> > be non continuous.
> > 
> > Changing its configuration from PHY_BASE_ADR single value to use
> > CONFIG_PHY_BASE_ADDRS as an array with adresses.
> > 
> > Updated in version 2:
> > 
> > Merged board updates to single patch.
> 
> These two lines should go as changelog for v2 below (after ---)

Sorry, there seems to be no end on my mistakes :(

> > 
> > Signed-off-by: Tor Krill <tor@excito.com>
> > ---
> i.e. here..
> 
> >  board/keymile/km_arm/km_arm.c |    3 ++-
> >  drivers/net/kirkwood_egiga.c  |    3 ++-
> >  drivers/net/kirkwood_egiga.h  |    8 ++++----
> >  include/configs/guruplug.h    |    2 +-
> >  include/configs/km_arm.h      |    2 +-
> >  include/configs/openrd_base.h |    2 +-
> >  include/configs/rd6281a.h     |    2 +-
> >  include/configs/sheevaplug.h  |    2 +-
> >  8 files changed, 13 insertions(+), 11 deletions(-)
> 
> Hi Tom
> I understood your problem.
> But all of the Kirkwood boards so far have similar implementation which is standard practice.
> How does your board design differed in this case?
> 
> Instead of fixing it here for all other boards,
> can't you simply align PHY address on your board?
> I think this will be much easier.

We use both ethernet interfaces by default in our design, with the phy
addresses 0x08 and 0x18, and unfortunately we have already started the
manufacturing of these units which makes it expensive and hard to
reverse this design decision :(  

But if we turn this around if the hardware allows this then why not let
this be configurable in u-boot as well? Do this have any technical
implications on the other boards? 

Best Regards,

/Tor

[U-Boot] [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.

[Prafulla Wadaskar]

 

> -----Original Message-----
> From: Tor Krill [mailto:tor at excito.com] 
> Sent: Thursday, June 24, 2010 3:02 PM
> To: u-boot at lists.denx.de
> Cc: Prafulla Wadaskar; Tor Krill
> Subject: [PATCH V2] Allow PHY addresses on kirkwood egiga to 
> be non continuous.
> 
> Changing its configuration from PHY_BASE_ADR single value to use
> CONFIG_PHY_BASE_ADDRS as an array with adresses.
> 
> Updated in version 2:
> 
> Merged board updates to single patch.

These two lines should go as changelog for v2 below (after ---)

> 
> Signed-off-by: Tor Krill <tor@excito.com>
> ---
i.e. here..

>  board/keymile/km_arm/km_arm.c |    3 ++-
>  drivers/net/kirkwood_egiga.c  |    3 ++-
>  drivers/net/kirkwood_egiga.h  |    8 ++++----
>  include/configs/guruplug.h    |    2 +-
>  include/configs/km_arm.h      |    2 +-
>  include/configs/openrd_base.h |    2 +-
>  include/configs/rd6281a.h     |    2 +-
>  include/configs/sheevaplug.h  |    2 +-
>  8 files changed, 13 insertions(+), 11 deletions(-)

Hi Tom
I understood your problem.
But all of the Kirkwood boards so far have similar implementation which is standard practice.
How does your board design differed in this case?

Instead of fixing it here for all other boards,
can't you simply align PHY address on your board?
I think this will be much easier.

Regards..
Prafulla . .

[U-Boot] [PATCH V2] Allow PHY addresses on kirkwood egiga to be non continuous.

[Tor Krill]

Changing its configuration from PHY_BASE_ADR single value to use
CONFIG_PHY_BASE_ADDRS as an array with adresses.

Updated in version 2:

Merged board updates to single patch.

Signed-off-by: Tor Krill <tor@excito.com>
---
 board/keymile/km_arm/km_arm.c |    3 ++-
 drivers/net/kirkwood_egiga.c  |    3 ++-
 drivers/net/kirkwood_egiga.h  |    8 ++++----
 include/configs/guruplug.h    |    2 +-
 include/configs/km_arm.h      |    2 +-
 include/configs/openrd_base.h |    2 +-
 include/configs/rd6281a.h     |    2 +-
 include/configs/sheevaplug.h  |    2 +-
 8 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 53cf474..16da353 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -244,12 +244,13 @@ int dram_init(void)
 void reset_phy(void)
 {
 	char *name = "egiga0";
+	u8 port_addr[] = CONFIG_PHY_ADDRS;
 
 	if (miiphy_set_current_dev(name))
 		return;
 
 	/* reset the phy */
-	miiphy_reset(name, CONFIG_PHY_BASE_ADR);
+	miiphy_reset(name, port_addr[0]);
 }
 
 #if defined(CONFIG_HUSH_INIT_VAR)
diff --git a/drivers/net/kirkwood_egiga.c b/drivers/net/kirkwood_egiga.c
index 932792e..7993e51 100644
--- a/drivers/net/kirkwood_egiga.c
+++ b/drivers/net/kirkwood_egiga.c
@@ -629,6 +629,7 @@ int kirkwood_egiga_initialize(bd_t * bis)
 	int devnum;
 	char *s;
 	u8 used_ports[MAX_KWGBE_DEVS] = CONFIG_KIRKWOOD_EGIGA_PORTS;
+	u8 port_addr[MAX_KWGBE_DEVS] = PHY_ADDRS;
 
 	for (devnum = 0; devnum < MAX_KWGBE_DEVS; devnum++) {
 		/*skip if port is configured not to use */
@@ -712,7 +713,7 @@ int kirkwood_egiga_initialize(bd_t * bis)
 		miiphy_register(dev->name, smi_reg_read, smi_reg_write);
 		/* Set phy address of the port */
 		miiphy_write(dev->name, KIRKWOOD_PHY_ADR_REQUEST,
-				KIRKWOOD_PHY_ADR_REQUEST, PHY_BASE_ADR + devnum);
+				KIRKWOOD_PHY_ADR_REQUEST, port_addr[devnum]);
 #endif
 	}
 	return 0;
diff --git a/drivers/net/kirkwood_egiga.h b/drivers/net/kirkwood_egiga.h
index 30c773c..6ff3bb7 100644
--- a/drivers/net/kirkwood_egiga.h
+++ b/drivers/net/kirkwood_egiga.h
@@ -30,11 +30,11 @@
 
 #define MAX_KWGBE_DEVS	2	/*controller has two ports */
 
-/* PHY_BASE_ADR is board specific and can be configured */
-#if defined (CONFIG_PHY_BASE_ADR)
-#define PHY_BASE_ADR		CONFIG_PHY_BASE_ADR
+/* PHY addresses is board specific and can be configured */
+#if defined (CONFIG_PHY_ADDRS)
+#define PHY_ADDRS		CONFIG_PHY_ADDRS
 #else
-#define PHY_BASE_ADR		0x08	/* default phy base addr */
+#define PHY_ADDRS		{0x08,0x09}	/* default phy base addr */
 #endif
 
 /* Constants */
diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h
index 2fbc6ad..028eee7 100644
--- a/include/configs/guruplug.h
+++ b/include/configs/guruplug.h
@@ -175,7 +175,7 @@
 #define CONFIG_KIRKWOOD_EGIGA	/* Enable kirkwood Gbe Controller Driver */
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
 #define CONFIG_KIRKWOOD_EGIGA_PORTS	{1,1}	/* enable both ports */
-#define CONFIG_PHY_BASE_ADR	0
+#define CONFIG_PHY_ADDRS	{0,1}
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
 #define CONFIG_RESET_PHY_R	/* use reset_phy() to init mv88e1121 PHY */
 #endif /* CONFIG_CMD_NET */
diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h
index a928c2c..1c3fa0d 100644
--- a/include/configs/km_arm.h
+++ b/include/configs/km_arm.h
@@ -130,7 +130,7 @@
 #define CONFIG_KIRKWOOD_EGIGA	/* Enable kirkwood Gbe Controller Driver */
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
 #define CONFIG_KIRKWOOD_EGIGA_PORTS	{1,0}	/* enable port 0 only */
-#define CONFIG_PHY_BASE_ADR	0
+#define CONFIG_PHY_ADDRS	{0,1}
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
 #define CONFIG_RESET_PHY_R	/* use reset_phy() to init 88E1118 PHY */
 
diff --git a/include/configs/openrd_base.h b/include/configs/openrd_base.h
index d2f4502..37574ac 100644
--- a/include/configs/openrd_base.h
+++ b/include/configs/openrd_base.h
@@ -186,7 +186,7 @@
 #define CONFIG_KIRKWOOD_EGIGA	/* Enable kirkwood Gbe Controller Driver */
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
 #define CONFIG_KIRKWOOD_EGIGA_PORTS	{1,0}	/* enable port 0 only */
-#define CONFIG_PHY_BASE_ADR	0x8
+#define CONFIG_PHY_ADDRS	{0x8,0x9}
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
 #define CONFIG_RESET_PHY_R	/* use reset_phy() to init mv8831116 PHY */
 #endif /* CONFIG_CMD_NET */
diff --git a/include/configs/rd6281a.h b/include/configs/rd6281a.h
index 3d8e25c..01550d1 100644
--- a/include/configs/rd6281a.h
+++ b/include/configs/rd6281a.h
@@ -176,7 +176,7 @@
 #define CONFIG_MV88E61XX_MULTICHIP_ADRMODE
 #define CONFIG_DIS_AUTO_NEG_SPEED_GMII /*Disable Auto speed negociation */
 #define CONFIG_PHY_SPEED	_1000BASET	/*Force PHYspeed to 1GBPs */
-#define CONFIG_PHY_BASE_ADR	0x0A
+#define CONFIG_PHY_ADDRS	{0x0A,0x0B}
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
 #define CONFIG_RESET_PHY_R	/* use reset_phy() to init switch and PHY */
 #define CONFIG_MV88E61XX_SWITCH	/* Enable MV88E61XX switch driver */
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index e9edc44..9fdfd7e 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@ -177,7 +177,7 @@
 #define CONFIG_KIRKWOOD_EGIGA	/* Enable kirkwood Gbe Controller Driver */
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
 #define CONFIG_KIRKWOOD_EGIGA_PORTS	{1,0}	/* enable port 0 only */
-#define CONFIG_PHY_BASE_ADR	0
+#define CONFIG_PHY_ADDRS	{0,1}
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
 #define CONFIG_RESET_PHY_R	/* use reset_phy() to init mv8831116 PHY */
 #endif /* CONFIG_CMD_NET */
-- 
1.7.0.4