[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Valentin Longchamp]

This series is the second effort of merging the Keymile boards support
back into mainline.

This series is a subset of the first patch series:
http://lists.denx.de/pipermail/u-boot/2011-April/090013.html
The first large series was split up to three independent series, which
are easier to review and apply for the custodians.

This series adds the km_arm specific parts of the series. All its changes
concern our marvell based boards and that's why it should go through the
u-boot-marvell git tree.

Changes for v3: taken Prafulla's comments into account

Holger Brunck (2):
  arm/km: add second serial interface for kirkwood
  arm/km: update mgcoge3un board support

Valentin Longchamp (6):
  arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h
  arm/km: move CONFIG_EXTRA_ENV_SETTINGS from board to km_arm file
  arm/km: introduce bootcount env variable and clean km_arm
  arm/km: disable ls (through jffs2 support)
  arm/km: rename mgcoge2un to mgcoge3un
  mvgbe: enable configurability of PORT_SERIAL_CONTROL_VALUE

 MAINTAINERS                                  |    6 +-
 board/keymile/km_arm/km_arm.c                |  108 +++++++++++----
 board/keymile/km_arm/kwbimage-memphis.cfg    |  197 ++++++++++++++++++++++++++
 boards.cfg                                   |    2 +-
 drivers/net/mvgbe.h                          |    2 +
 include/configs/keymile-common.h             |    9 --
 include/configs/km_arm.h                     |   25 ++++
 include/configs/{mgcoge2un.h => mgcoge3un.h} |   49 ++++---
 include/configs/suen3.h                      |   15 --
 include/configs/suen8.h                      |   15 --
 10 files changed, 340 insertions(+), 88 deletions(-)
 create mode 100644 board/keymile/km_arm/kwbimage-memphis.cfg
 rename include/configs/{mgcoge2un.h => mgcoge3un.h} (56%)

[U-Boot] [PATCH v3 1/8] arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h

[Valentin Longchamp]

This define is marvell specific, so it should be present in km_arm.
It is however not needed there either, since we set it to the default
value that is already set in include/asm/arch-kirkwood/config.h

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
---
changes for v3:
	- this patch is new in the series

 include/configs/keymile-common.h |    9 ---------
 1 files changed, 0 insertions(+), 9 deletions(-)

diff --git a/include/configs/keymile-common.h b/include/configs/keymile-common.h
index cb6d0fb..7115724 100644
--- a/include/configs/keymile-common.h
+++ b/include/configs/keymile-common.h
@@ -31,15 +31,6 @@
 #define CONFIG_BOOTCOUNT_LIMIT
 
 /*
- * By default kwbimage.cfg from board specific folder is used
- * If for some board, different configuration file need to be used,
- * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file
- */
-#ifndef CONFIG_SYS_KWD_CONFIG
-#define	CONFIG_SYS_KWD_CONFIG	$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg
-#endif /* CONFIG_SYS_KWD_CONFIG */
-
-/*
  * Command line configuration.
  */
 #include <config_cmd_default.h>
-- 
1.7.0.5

[U-Boot] [PATCH v3 2/8] arm/km: move CONFIG_EXTRA_ENV_SETTINGS from board to km_arm file

[Valentin Longchamp]

Since all the boards define the same env settings, this simplifies
the board files.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
changes for v3:
	- this patch is new in the series

 include/configs/km_arm.h    |   15 +++++++++++++++
 include/configs/mgcoge2un.h |   15 ---------------
 include/configs/suen3.h     |   15 ---------------
 include/configs/suen8.h     |   15 ---------------
 4 files changed, 15 insertions(+), 45 deletions(-)

diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h
index 70113d4..313a7f8 100644
--- a/include/configs/km_arm.h
+++ b/include/configs/km_arm.h
@@ -242,6 +242,21 @@ int get_scl (void);
 		"sf write ${u-boot_addr_r} 0 ${filesize};"		\
 		"spi off\0"
 
+/*
+ * Default environment variables
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	CONFIG_KM_DEF_ENV						\
+	"newenv=setenv addr 0x100000 && "				\
+		"i2c dev 1; mw.b ${addr} 0 4 && "			\
+		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
+		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
+		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
+		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
+	"rootpath=/opt/eldk/arm\0"					\
+	"EEprom_ivm=" KM_IVM_BUS "\0"					\
+	""
+
 #if defined(CONFIG_SYS_NO_FLASH)
 #define CONFIG_KM_UBI_PARTITION_NAME   "ubi0"
 #undef	CONFIG_FLASH_CFI_MTD
diff --git a/include/configs/mgcoge2un.h b/include/configs/mgcoge2un.h
index d3c7bdc..876ac34 100644
--- a/include/configs/mgcoge2un.h
+++ b/include/configs/mgcoge2un.h
@@ -47,19 +47,4 @@
 #define KM_IVM_BUS	"pca9547:70:9" /* I2C2 (Mux-Port 1)*/
 #define KM_ENV_BUS	"pca9547:70:d" /* I2C2 (Mux-Port 5)*/
 
-/*
- * Default environment variables
- */
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	CONFIG_KM_DEF_ENV						\
-	"newenv=setenv addr 0x100000 && "				\
-		"i2c dev 1; mw.b ${addr} 0 4 && "			\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
-	"rootpath=/opt/eldk/arm\0"					\
-	"EEprom_ivm=" KM_IVM_BUS "\0"					\
-	""
-
 #endif /* _CONFIG_MGCOGE2UN_H */
diff --git a/include/configs/suen3.h b/include/configs/suen3.h
index 2b6f19e..7d7a4ff 100644
--- a/include/configs/suen3.h
+++ b/include/configs/suen3.h
@@ -46,19 +46,4 @@
 #define KM_IVM_BUS	"pca9544a:70:9"	/* I2C2 (Mux-Port 1)*/
 #define KM_ENV_BUS	"pca9544a:70:d"	/* I2C2 (Mux-Port 5)*/
 
-/*
- * Default environment variables
- */
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	CONFIG_KM_DEF_ENV						\
-	"newenv=setenv addr 0x100000 && "				\
-		"i2c dev 1; mw.b ${addr} 0 4 && "			\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
-	"rootpath=/opt/eldk/arm\0"					\
-	"EEprom_ivm=" KM_IVM_BUS "\0"					\
-	""
-
 #endif /* _CONFIG_SUEN3_H */
diff --git a/include/configs/suen8.h b/include/configs/suen8.h
index 3f60bc3..28c8a0b 100644
--- a/include/configs/suen8.h
+++ b/include/configs/suen8.h
@@ -47,19 +47,4 @@
 #define KM_IVM_BUS	"pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
 #define KM_ENV_BUS	"pca9544a:70:d" /* I2C2 (Mux-Port 5)*/
 
-/*
- * Default environment variables
- */
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	CONFIG_KM_DEF_ENV						\
-	"newenv=setenv addr 0x100000 && "				\
-		"i2c dev 1; mw.b ${addr} 0 4 && "			\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
-	"rootpath=/opt/eldk/arm\0"					\
-	"EEprom_ivm=" KM_IVM_BUS "\0"					\
-	""
-
 #endif /* _CONFIG_SUEN8_H */
-- 
1.7.0.5

[U-Boot] [PATCH v3 3/8] arm/km: introduce bootcount env variable and clean km_arm

[Valentin Longchamp]

This environment variable is used to set the bootcount address
for the kernel.

last_stage_init is not available for arm platforms. So the
calls to set_km_var and set_bootcount_addr are done in
misc_init_r.

Additionally some unneeded printouts were removed.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
Changes for v2:
   - split up first large patch series to three independent smaller
     patch series
   - taken Wolfgang Denk's comments into account
Changes for v3:
   - taken Prafulla's comments into account, merged with previous 02/08 patch

 board/keymile/km_arm/km_arm.c |   28 +++++++++++++++-------------
 include/configs/km_arm.h      |    3 +++
 2 files changed, 18 insertions(+), 13 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index c772ee2..4049a4e 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -145,16 +145,22 @@ int initialize_unit_leds(void)
 	return 0;
 }
 
+#if defined(CONFIG_BOOTCOUNT_LIMIT)
+void set_bootcount_addr(void)
+{
+	uchar buf[32];
+	unsigned int bootcountaddr;
+	bootcountaddr = gd->ram_size - BOOTCOUNT_ADDR;
+	sprintf((char *)buf, "0x%x", bootcountaddr);
+	setenv("bootcountaddr", (char *)buf);
+}
+#endif
+
 int misc_init_r(void)
 {
 	char *str;
 	int mach_type;
 
-	puts("Piggy:");
-	if (ethernet_present() == 0)
-		puts (" not");
-	puts(" present\n");
-
 	str = getenv("mach_type");
 	if (str != NULL) {
 		mach_type = simple_strtoul(str, NULL, 10);
@@ -163,7 +169,10 @@ int misc_init_r(void)
 	}
 
 	initialize_unit_leds();
-
+	set_km_env();
+#if defined(CONFIG_BOOTCOUNT_LIMIT)
+	set_bootcount_addr();
+#endif
 	return 0;
 }
 
@@ -182,7 +191,6 @@ int board_early_init_f(void)
 	writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
 	tmp = readl(KW_GPIO0_BASE + 4);
 	writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE + 4);
-	printf("KM: setting NAND mode\n");
 
 #if defined(CONFIG_SOFT_I2C)
 	/* init the GPIO for I2C Bitbang driver */
@@ -212,12 +220,6 @@ int board_init(void)
 	return 0;
 }
 
-int last_stage_init(void)
-{
-	set_km_env();
-	return 0;
-}
-
 #if defined(CONFIG_CMD_SF)
 int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h
index 313a7f8..16199ef 100644
--- a/include/configs/km_arm.h
+++ b/include/configs/km_arm.h
@@ -64,6 +64,9 @@
 #define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 4096KBytes */
 
 #define CONFIG_KM_DEF_ENV_CPU						\
+	"addbootcount="							\
+		"setenv bootargs ${bootargs} "				\
+		"bootcountaddr=${bootcountaddr}\0"			\
 	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0"		\
 	"boot=bootm ${actual_kernel_addr} - -\0"			\
 	"cramfsloadfdt=echo \\\\c\0"					\
-- 
1.7.0.5

[U-Boot] [PATCH v3 4/8] arm/km: disable ls (through jffs2 support)

[Valentin Longchamp]

This is not supported on our km-arm boards since we have defined
CONFIG_SYS_NO_FLASH for our NAND Flash chip.

With CONFIG_CMD_JFFS2, the ls command is present and works very badly
on our km-arm boards.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
---
Changes for v2:
   - split up first large patch series to three independent smaller
     patch series

 include/configs/km_arm.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h
index 16199ef..d27a630 100644
--- a/include/configs/km_arm.h
+++ b/include/configs/km_arm.h
@@ -263,6 +263,7 @@ int get_scl (void);
 #if defined(CONFIG_SYS_NO_FLASH)
 #define CONFIG_KM_UBI_PARTITION_NAME   "ubi0"
 #undef	CONFIG_FLASH_CFI_MTD
+#undef	CONFIG_CMD_JFFS2
 #undef	CONFIG_JFFS2_CMDLINE
 #endif
 
-- 
1.7.0.5

[U-Boot] [PATCH v3 5/8] arm/km: add second serial interface for kirkwood

[Valentin Longchamp]

From: Holger Brunck <holger.brunck@keymile.com>

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
Changes for v2:
   - split up first large patch series to three independent smaller
     patch series

 include/configs/km_arm.h |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h
index d27a630..d2669d3 100644
--- a/include/configs/km_arm.h
+++ b/include/configs/km_arm.h
@@ -92,6 +92,7 @@
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
 #define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
+#define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE
 
 /*
  * Serial Port configuration
@@ -136,7 +137,12 @@
 
 #define BOOTFLASH_START		0x0
 
+/* Kirkwood has two serial IF */
+#if (CONFIG_CONS_INDEX == 2)
+#define CONFIG_KM_CONSOLE_TTY	"ttyS1"
+#else
 #define CONFIG_KM_CONSOLE_TTY	"ttyS0"
+#endif
 
 /* size in bytes reserved for initial data */
 
-- 
1.7.0.5

[U-Boot] [PATCH v3 6/8] arm/km: rename mgcoge2un to mgcoge3un

[Valentin Longchamp]

The mgcoge2un target was only an intermediate step to mgcoge3un.
For this reason the mgcoge2un support was moved to mgcoge3un,
because it isn't needed to support both targets.

We add the BootROM init file for the mgcoge3un memphis RAM.

We also move the suen3 and suen8 boards into the correct category
in the MAINTAINERS file.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
Changes for v2:
   - split up first large patch series to three independent smaller
     patch series
Changes for v3:
   - taken Prafulla's comments into account, merged with previous 03/08 patch
     so that 03/08 does not look like dead code

 MAINTAINERS                                  |    6 +-
 board/keymile/km_arm/kwbimage-memphis.cfg    |  197 ++++++++++++++++++++++++++
 boards.cfg                                   |    2 +-
 include/configs/{mgcoge2un.h => mgcoge3un.h} |   15 ++-
 4 files changed, 210 insertions(+), 10 deletions(-)
 create mode 100644 board/keymile/km_arm/kwbimage-memphis.cfg
 rename include/configs/{mgcoge2un.h => mgcoge3un.h} (81%)

diff --git a/MAINTAINERS b/MAINTAINERS
index e2a4ba9..39b3e78 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -430,13 +430,10 @@ Heiko Schocher <hs@denx.de>
 	kmsupx5		MPC8321
 	mgcoge		MPC8247
 	mgcoge2ne	MPC8247
-	mgcoge2un	ARM926EJS (Kirkwood SoC)
 	mucmc52		MPC5200
 	muas3001	MPC8270
 	municse		MPC5200
 	sc3		PPC405GP
-	suen3		ARM926EJS (Kirkwood SoC)
-	suen8		ARM926EJS (Kirkwood SoC)
 	suvd3		MPC8321
 	tuda1		MPC8321
 	tuxa1		MPC8321
@@ -814,6 +811,9 @@ Jens Scharsig <esw@bus-elektronik.de>
 Heiko Schocher <hs@denx.de>
 
 	magnesium	i.MX27
+	mgcoge3un	ARM926EJS (Kirkwood SoC)
+	suen3		ARM926EJS (Kirkwood SoC)
+	suen8		ARM926EJS (Kirkwood SoC)
 
 Robert Schwebel <r.schwebel@pengutronix.de>
 
diff --git a/board/keymile/km_arm/kwbimage-memphis.cfg b/board/keymile/km_arm/kwbimage-memphis.cfg
new file mode 100644
index 0000000..2faaf2b
--- /dev/null
+++ b/board/keymile/km_arm/kwbimage-memphis.cfg
@@ -0,0 +1,197 @@
+#
+# (C) Copyright 2010
+# Heiko Schocher, DENX Software Engineering, hs at denx.de.
+#
+# (C) Copyright 2011
+# Valentin Longchamp, Keymile AG, valentin.longchamp at keymile.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM	spi	# Boot from SPI flash
+
+DATA 0xFFD10000 0x01112222	# MPP Control 0 Register
+# bit 3-0:   MPPSel0	2, NF_IO[2]
+# bit 7-4:   MPPSel1	2, NF_IO[3]
+# bit 12-8:  MPPSel2	2, NF_IO[4]
+# bit 15-12: MPPSel3	2, NF_IO[5]
+# bit 19-16: MPPSel4	1, NF_IO[6]
+# bit 23-20: MPPSel5	1, NF_IO[7]
+# bit 27-24: MPPSel6	1, SYSRST_O
+# bit 31-28: MPPSel7	0, GPO[7]
+
+DATA 0xFFD10004 0x03303300
+
+DATA 0xFFD10008 0x00001100	# MPP Control 2 Register
+# bit 3-0:   MPPSel16	0, GPIO[16]
+# bit 7-4:   MPPSel17	0, GPIO[17]
+# bit 12-8:  MPPSel18	1, NF_IO[0]
+# bit 15-12: MPPSel19	1, NF_IO[1]
+# bit 19-16: MPPSel20	0, GPIO[20]
+# bit 23-20: MPPSel21	0, GPIO[21]
+# bit 27-24: MPPSel22	0, GPIO[22]
+# bit 31-28: MPPSel23	0, GPIO[23]
+
+DATA 0xFFD100E0 0x1B1B1B1B	# IO Configuration 0 Register
+DATA 0xFFD20134 0x66666666	# L2 RAM Timing 0 Register
+DATA 0xFFD20138 0x66666666	# L2 RAM Timing 1 Register
+DATA 0xFFD20154 0x00000200	# CPU RAM Management Control3 Register
+DATA 0xFFD2014C 0x00001C00	# CPU RAM Management Control1 Register
+DATA 0xFFD20148 0x00000001	# CPU RAM Management Control0 Register
+
+#Dram initalization
+DATA 0xFFD01400 0x430004E0	# SDRAM Configuration Register
+# bit13-0:  0x4E0 (DDR2 clks refresh rate)
+# bit23-14: zero
+# bit24: 1= enable exit self refresh mode on DDR access
+# bit25: 1 required
+# bit29-26: zero
+# bit31-30: 01
+
+DATA 0xFFD01404 0x38543000	# DDR Controller Control Low
+# bit 3-0:  0 reserved
+# bit 4:    0=addr/cmd in smame cycle
+# bit 5:    0=clk is driven during self refresh, we don't care for APX
+# bit 6:    0=use recommended falling edge of clk for addr/cmd
+# bit14:    0=input buffer always powered up
+# bit18:    1=cpu lock transaction enabled
+# bit23-20: 5=recommended value for CL=4 and STARTBURST_DEL disabled bit31=0
+# bit27-24: 8= CL+4, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
+# bit30-28: 3 required
+# bit31:    0=no additional STARTBURST delay
+
+DATA 0xFFD01408 0x2302433E	# DDR Timing (Low) (active cycles value +1)
+# bit3-0:   TRAS lsbs
+# bit7-4:   TRCD
+# bit11- 8: TRP
+# bit15-12: TWR
+# bit19-16: TWTR
+# bit20:    TRAS msb
+# bit23-21: 0x0
+# bit27-24: TRRD
+# bit31-28: TRTP
+
+DATA 0xFFD0140C 0x00000A3E	#  DDR Timing (High)
+# bit6-0:   TRFC
+# bit8-7:   TR2R
+# bit10-9:  TR2W
+# bit12-11: TW2W
+# bit31-13: zero required
+
+DATA 0xFFD01410 0x00000001	#  DDR Address Control
+# bit1-0:   01, Cs0width=x16
+# bit3-2:   00, Cs0size=2Gb
+# bit5-4:   00, Cs2width=nonexistent
+# bit7-6:   00, Cs1size =nonexistent
+# bit9-8:   00, Cs2width=nonexistent
+# bit11-10: 00, Cs2size =nonexistent
+# bit13-12: 00, Cs3width=nonexistent
+# bit15-14: 00, Cs3size =nonexistent
+# bit16:    0,  Cs0AddrSel
+# bit17:    0,  Cs1AddrSel
+# bit18:    0,  Cs2AddrSel
+# bit19:    0,  Cs3AddrSel
+# bit31-20: 0 required
+
+DATA 0xFFD01414 0x00000000	#  DDR Open Pages Control
+# bit0:    0,  OpenPage enabled
+# bit31-1: 0 required
+
+DATA 0xFFD01418 0x00000000	#  DDR Operation
+# bit3-0:   0x0, DDR cmd
+# bit31-4:  0 required
+
+DATA 0xFFD0141C 0x00000652	#  DDR Mode
+DATA 0xFFD01420 0x00000006	#  DDR Extended Mode
+# bit0:    0,  DDR DLL enabled
+# bit1:    1,  DDR drive strenght reduced
+# bit2:    1,  DDR ODT control lsd disabled
+# bit5-3:  000, required
+# bit6:    0,  DDR ODT control msb disabled
+# bit9-7:  000, required
+# bit10:   0,  differential DQS enabled
+# bit11:   0, required
+# bit12:   0, DDR output buffer enabled
+# bit31-13: 0 required
+
+DATA 0xFFD01424 0x0000F17F	#  DDR Controller Control High
+# bit2-0:  111, required
+# bit3  :  1  , MBUS Burst Chop disabled
+# bit6-4:  111, required
+# bit7  :  0
+# bit8  :  1  , add a sample stage
+# bit9  :  0  , no half clock cycle addition to dataout
+# bit10 :  0  , 1/4 clock cycle skew enabled for addr/ctl signals
+# bit11 :  0  , 1/4 clock cycle skew disabled for write mesh
+# bit15-12: 1111 required
+# bit31-16: 0    required
+
+DATA 0xFFD01428 0x00084520	# DDR2 SDRAM Timing Low
+# bit3-0  : 0000, required
+# bit7-4  : 0010, M_ODT assertion 2 cycles after read
+# bit11-8 : 1001, M_ODT de-assertion 5 cycles after read
+# bit15-12: 0100, internal ODT assertion 4 cycles after read
+# bit19-16: 1000, internal ODT de-assertion 8 cycles after read
+# bit31-20: 0   , required
+
+DATA 0xFFD0147c 0x00008451	# DDR2 SDRAM Timing High
+# bit3-0  : 0001, M_ODT assertion same cycle as write
+# bit7-4  : 0101, M_ODT de-assertion x cycles after write
+# bit11-8 : 0100, internal ODT assertion x cycles after write
+# bit15-12: 1000, internal ODT de-assertion x cycles after write
+
+DATA 0xFFD01500 0x00000000	# CS[0]n Base address to 0x0
+DATA 0xFFD01504 0x0FFFFFF1	# CS[0]n Size
+# bit0:    1,  Window enabled
+# bit1:    0,  Write Protect disabled
+# bit3-2:  00, CS0 hit selected
+# bit23-4: ones, required
+# bit31-24: 0x0F, Size (i.e. 256MB)
+
+DATA 0xFFD0150C 0x00000000	# CS[1]n Size, window disabled
+DATA 0xFFD01514 0x00000000	# CS[2]n Size, window disabled
+DATA 0xFFD0151C 0x00000000	# CS[3]n Size, window disabled
+
+DATA 0xFFD01494 0x00010000	#  DDR ODT Control (Low)
+# bit3-0:  0, ODT0Rd, MODT[0] not asserted during read from DRAM CS0
+# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
+
+DATA 0xFFD01498 0x00000000	#  DDR ODT Control (High)
+# bit1-0:  00, ODT0 controlled by ODT Control (low) register above
+# bit3-2:  00, ODT1 controlled by register
+# bit31-4: zero, required
+
+DATA 0xFFD0149C 0x0000F801	# CPU ODT Control
+# bit3-0:  1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
+# bit7-4:  0, ODT0Wr, Internal ODT not asserted during write to DRAM bank0
+# bit9-8:  0, ODTEn, controlled by ODT0Rd and ODT0Wr
+# bit11-10:2, DQ_ODTSel. ODT select turned on, 75 ohm
+# bit13-12:3, STARTBURST ODT buffer selected, 50 ohm
+# bit14   :1, STARTBURST ODT enabled
+# bit15   :1, Use ODT Block
+
+DATA 0xFFD01480 0x00000001	# DDR Initialization Control
+# bit0=1, enable DDR init upon this register write
+
+# End of Header extension
+DATA 0x0 0x0
diff --git a/boards.cfg b/boards.cfg
index 2b0900a..2d36c52 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -105,7 +105,7 @@ davinci_sffsdr               arm         arm926ejs   sffsdr              davinci
 davinci_sonata               arm         arm926ejs   sonata              davinci        davinci
 suen3                        arm         arm926ejs   km_arm              keymile        kirkwood
 suen8                        arm         arm926ejs   km_arm              keymile        kirkwood
-mgcoge2un                    arm         arm926ejs   km_arm              keymile        kirkwood
+mgcoge3un                    arm         arm926ejs   km_arm              keymile        kirkwood
 guruplug                     arm         arm926ejs   -                   Marvell        kirkwood
 mv88f6281gtw_ge              arm         arm926ejs   -                   Marvell        kirkwood
 openrd_base                  arm         arm926ejs   -                   Marvell        kirkwood
diff --git a/include/configs/mgcoge2un.h b/include/configs/mgcoge3un.h
similarity index 81%
rename from include/configs/mgcoge2un.h
rename to include/configs/mgcoge3un.h
index 876ac34..1c32085 100644
--- a/include/configs/mgcoge2un.h
+++ b/include/configs/mgcoge3un.h
@@ -31,8 +31,8 @@
 /* for linking errors see
  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html */
 
-#ifndef _CONFIG_MGCOGE2UN_H
-#define _CONFIG_MGCOGE2UN_H
+#ifndef _CONFIG_MGCOGE3UN_H
+#define _CONFIG_MGCOGE3UN_H
 
 /* include common defines/options for all arm based Keymile boards */
 #include "km_arm.h"
@@ -40,11 +40,14 @@
 /*
  * Version number information
  */
-#define CONFIG_IDENT_STRING	"\nKeymile MGCOGE2UN"
-
-#define CONFIG_HOSTNAME			mgcoge2un
+#define CONFIG_IDENT_STRING	"\nKeymile MGCOGE3UN"
+#define CONFIG_HOSTNAME		mgcoge3un
+#define CONFIG_MGCOGE3UN
 
 #define KM_IVM_BUS	"pca9547:70:9" /* I2C2 (Mux-Port 1)*/
 #define KM_ENV_BUS	"pca9547:70:d" /* I2C2 (Mux-Port 5)*/
 
-#endif /* _CONFIG_MGCOGE2UN_H */
+/* we use a new RAM type on mgcoge3un board */
+#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
+
+#endif /* _CONFIG_MGCOGE3UN_H */
-- 
1.7.0.5

[U-Boot] [PATCH v3 7/8] mvgbe: enable configurability of PORT_SERIAL_CONTROL_VALUE

[Valentin Longchamp]

This allows this configuration to be defined differently for some
boards that request it.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
Changes for v2:
   - split up first large patch series to three independent smaller
     patch series
Changes for v3:
   - taken Prafulla's comments into account, split from previous 07/08 patch

 drivers/net/mvgbe.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/net/mvgbe.h b/drivers/net/mvgbe.h
index 3de98d0..d8a5429 100644
--- a/drivers/net/mvgbe.h
+++ b/drivers/net/mvgbe.h
@@ -84,6 +84,7 @@
 	MVGBE_TX_BURST_SIZE_16_64BIT)
 
 /* Default port serial control value */
+#ifndef PORT_SERIAL_CONTROL_VALUE
 #define PORT_SERIAL_CONTROL_VALUE		( \
 	MVGBE_FORCE_LINK_PASS			| \
 	MVGBE_DIS_AUTO_NEG_FOR_DUPLX		| \
@@ -101,6 +102,7 @@
 	MVGBE_CLR_EXT_LOOPBACK			| \
 	MVGBE_SET_FULL_DUPLEX_MODE		| \
 	MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX)
+#endif
 
 /* Tx WRR confoguration macros */
 #define PORT_MAX_TRAN_UNIT	0x24	/* MTU register (default) 9KByte */
-- 
1.7.0.5

[U-Boot] [PATCH v3 8/8] arm/km: update mgcoge3un board support

[Valentin Longchamp]

From: Holger Brunck <holger.brunck@keymile.com>

We change default settings for egiga on mgcoge3un.
The reason we need this is that we have the gig port on mgcoge3un
connected using a back-to-back pair of PHYs. There are no magnetics and
because of that the port has to be run with a fixd configuration and
auto-negotiation must be disabled. In the default mode the egiga driver
uses autoneg to determine port speed - which defaults to 1G (we need
100M full duplex).

Add wait for the GPIO line connected to mgcoge3ne before
starting mgcoge3un. A board specific ethernet present function
was added, because on this board ethernet is always present.
The BOCO FPGA access was enhanced and changed to use register
definitions.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
Changes for v2:
   - split up first large patch series to three independent smaller
     patch series
Changes for v3:
   - taken Prafulla's comments into account, merged with previous 08/08 patch

 board/keymile/km_arm/km_arm.c |   80 +++++++++++++++++++++++++++++++++-------
 include/configs/mgcoge3un.h   |   25 +++++++++++++
 2 files changed, 91 insertions(+), 14 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 4049a4e..d86acc9 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -41,6 +41,16 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/*
+ * BOCO FPGA definitions
+ */
+#define BOCO		0x10
+#define REG_CTRL_H		0x02
+#define MASK_WRL_UNITRUN	0x01
+#define MASK_RBX_PGY_PRESENT	0x40
+#define REG_IRQ_CIRQ2		0x2d
+#define MASK_RBI_DEFECT_16	0x01
+
 /* Multi-Purpose Pins Functionality configuration */
 u32 kwmpp_config[] = {
 	MPP0_NF_IO2,
@@ -102,43 +112,64 @@ u32 kwmpp_config[] = {
 	0
 };
 
+#if defined(CONFIG_MGCOGE3UN)
+/*
+ * Wait for startup OK from mgcoge3ne
+ */
+int startup_allowed(void)
+{
+	unsigned char buf;
+
+	/*
+	 * Read CIRQ16 bit (bit 0)
+	 */
+	if (i2c_read(BOCO, REG_IRQ_CIRQ2, 1, &buf, 1) != 0)
+		printf("%s: Error reading Boco\n", __func__);
+	else
+		if ((buf & MASK_RBI_DEFECT_16) == MASK_RBI_DEFECT_16)
+			return 1;
+	return 0;
+}
+
+/*
+ * mgcoge3un has always ethernet present. Its connected to the 6061 switch
+ * and provides ICNev and piggy4 connections.
+ */
+int ethernet_present(void)
+{
+	return 1;
+}
+#else
 int ethernet_present(void)
 {
 	uchar	buf;
 	int	ret = 0;
 
-	if (i2c_read(0x10, 2, 1, &buf, 1) != 0) {
+	if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
 		printf("%s: Error reading Boco\n", __func__);
 		return -1;
 	}
-	if ((buf & 0x40) == 0x40)
+	if ((buf & MASK_RBX_PGY_PRESENT) == MASK_RBX_PGY_PRESENT)
 		ret = 1;
 
 	return ret;
 }
+#endif
 
 int initialize_unit_leds(void)
 {
 	/*
-	 * init the unit LEDs
-	 * per default they all are
+	 * Init the unit LEDs per default they all are
 	 * ok apart from bootstat
-	 * LED connected through BOCO
-	 * BOCO	lies at the address  0x10
-	 * LEDs are in the block CTRL_H	(addr 0x02)
-	 * BOOTSTAT LED is the first 0x01
 	 */
-	#define BOCO        0x10
-	#define CTRL_H      0x02
-	#define APPLEDMASK  0x01
 	uchar buf;
 
-	if (i2c_read(BOCO, CTRL_H, 1, &buf, 1) != 0) {
+	if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
 		printf("%s: Error reading Boco\n", __func__);
 		return -1;
 	}
-	buf |= APPLEDMASK;
-	if (i2c_write(BOCO, CTRL_H, 1, &buf, 1) != 0) {
+	buf |= MASK_WRL_UNITRUN;
+	if (i2c_write(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
 		printf("%s: Error writing Boco\n", __func__);
 		return -1;
 	}
@@ -167,6 +198,27 @@ int misc_init_r(void)
 		printf("Overwriting MACH_TYPE with %d!!!\n", mach_type);
 		gd->bd->bi_arch_number = mach_type;
 	}
+#if defined(CONFIG_MGCOGE3UN)
+	char *wait_for_ne;
+	wait_for_ne = getenv("waitforne");
+	if (wait_for_ne != NULL) {
+		if (strcmp(wait_for_ne, "true") == 0) {
+			int cnt = 0;
+			puts("NE go: ");
+			while (startup_allowed() == 0) {
+				udelay(200000);
+				cnt++;
+				if (cnt == 5)
+					puts("wait\b\b\b\b");
+				if (cnt == 10) {
+					cnt = 0;
+					puts("    \b\b\b\b");
+				}
+			}
+			puts("OK\n");
+		}
+	}
+#endif
 
 	initialize_unit_leds();
 	set_km_env();
diff --git a/include/configs/mgcoge3un.h b/include/configs/mgcoge3un.h
index 1c32085..d022c4f 100644
--- a/include/configs/mgcoge3un.h
+++ b/include/configs/mgcoge3un.h
@@ -50,4 +50,29 @@
 /* we use a new RAM type on mgcoge3un board */
 #define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
 
+/*
+ * mgcoge3un has a fixed link to the marvell switch
+ * with 100MB full duplex and autoneg off, for this
+ * reason we have to change the default settings
+ */
+#define PORT_SERIAL_CONTROL_VALUE		( \
+	MVGBE_FORCE_LINK_PASS			| \
+	MVGBE_DIS_AUTO_NEG_FOR_DUPLX		| \
+	MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL	| \
+	MVGBE_ADV_NO_FLOW_CTRL			| \
+	MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX	| \
+	MVGBE_FORCE_BP_MODE_NO_JAM		| \
+	(1 << 9) /* Reserved bit has to be 1 */	| \
+	MVGBE_DO_NOT_FORCE_LINK_FAIL		| \
+	MVGBE_DIS_AUTO_NEG_SPEED_GMII		| \
+	MVGBE_DTE_ADV_0				| \
+	MVGBE_MIIPHY_MAC_MODE			| \
+	MVGBE_AUTO_NEG_NO_CHANGE		| \
+	MVGBE_MAX_RX_PACKET_1552BYTE		| \
+	MVGBE_CLR_EXT_LOOPBACK			| \
+	MVGBE_SET_FULL_DUPLEX_MODE		| \
+	MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX	|\
+	MVGBE_SET_GMII_SPEED_TO_10_100	|\
+	MVGBE_SET_MII_SPEED_TO_100)
+
 #endif /* _CONFIG_MGCOGE3UN_H */
-- 
1.7.0.5

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Valentin Longchamp]

Hi Prafulla,

Valentin Longchamp wrote:
> This series is the second effort of merging the Keymile boards support
> back into mainline.
> 
> This series is a subset of the first patch series:
> http://lists.denx.de/pipermail/u-boot/2011-April/090013.html
> The first large series was split up to three independent series, which
> are easier to review and apply for the custodians.
> 
> This series adds the km_arm specific parts of the series. All its changes
> concern our marvell based boards and that's why it should go through the
> u-boot-marvell git tree.
> 
> Changes for v3: taken Prafulla's comments into account

I have posted those one week ago, and I was wondering if you would be able to review/take them in you tree soon ?

Best Regards

Valentin

> 
> Holger Brunck (2):
>   arm/km: add second serial interface for kirkwood
>   arm/km: update mgcoge3un board support
> 
> Valentin Longchamp (6):
>   arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h
>   arm/km: move CONFIG_EXTRA_ENV_SETTINGS from board to km_arm file
>   arm/km: introduce bootcount env variable and clean km_arm
>   arm/km: disable ls (through jffs2 support)
>   arm/km: rename mgcoge2un to mgcoge3un
>   mvgbe: enable configurability of PORT_SERIAL_CONTROL_VALUE
> 
>  MAINTAINERS                                  |    6 +-
>  board/keymile/km_arm/km_arm.c                |  108 +++++++++++----
>  board/keymile/km_arm/kwbimage-memphis.cfg    |  197 ++++++++++++++++++++++++++
>  boards.cfg                                   |    2 +-
>  drivers/net/mvgbe.h                          |    2 +
>  include/configs/keymile-common.h             |    9 --
>  include/configs/km_arm.h                     |   25 ++++
>  include/configs/{mgcoge2un.h => mgcoge3un.h} |   49 ++++---
>  include/configs/suen3.h                      |   15 --
>  include/configs/suen8.h                      |   15 --
>  10 files changed, 340 insertions(+), 88 deletions(-)
>  create mode 100644 board/keymile/km_arm/kwbimage-memphis.cfg
>  rename include/configs/{mgcoge2un.h => mgcoge3un.h} (56%)
> 


-- 
Valentin Longchamp
Embedded Software Engineer
Hardware and Chip Integration
______________________________________ 
KEYMILE AG 
Schwarzenburgstr. 73
CH-3097 Liebefeld
Phone +41 31 377 1318 
Fax   +41 31 377 1212 
valentin.longchamp at keymile.com
www.keymile.com 
______________________________________ 
KEYMILE: A Specialist as a Partner

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Prafulla Wadaskar]

> -----Original Message-----
> From: Valentin Longchamp [mailto:valentin.longchamp at keymile.com]
> Sent: Wednesday, May 11, 2011 8:52 PM
> To: Prafulla Wadaskar
> Cc: u-boot at lists.denx.de; holger.brunck at keymile.com
> Subject: Re: [PATCH v3 0/8] keymile arm boards update, part 2
> 
> Hi Prafulla,
> 
> Valentin Longchamp wrote:
> > This series is the second effort of merging the Keymile boards support
> > back into mainline.
> >
> > This series is a subset of the first patch series:
> > http://lists.denx.de/pipermail/u-boot/2011-April/090013.html
> > The first large series was split up to three independent series, which
> > are easier to review and apply for the custodians.
> >
> > This series adds the km_arm specific parts of the series. All its
> changes
> > concern our marvell based boards and that's why it should go through
> the
> > u-boot-marvell git tree.
> >
> > Changes for v3: taken Prafulla's comments into account
> 
> I have posted those one week ago, and I was wondering if you would be
> able to review/take them in you tree soon ?

Yes Valentin
I will review them in this week, sorry for delay.

Regards..
Prafulla . .

[U-Boot] [PATCH v3 2/8] arm/km: move CONFIG_EXTRA_ENV_SETTINGS from board to km_arm file

[Prafulla Wadaskar]

> -----Original Message-----
> From: Valentin Longchamp [mailto:valentin.longchamp at keymile.com]
> Sent: Wednesday, May 04, 2011 9:24 PM
> To: u-boot at lists.denx.de
> Cc: holger.brunck at keymile.com; Prafulla Wadaskar; Valentin Longchamp;
> Heiko Schocher; Wolfgang Denk; Detlev Zundel
> Subject: [PATCH v3 2/8] arm/km: move CONFIG_EXTRA_ENV_SETTINGS from
> board to km_arm file
> 
> Since all the boards define the same env settings, this simplifies
> the board files.
> 
> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
> cc: Holger Brunck <holger.brunck@keymile.com>
> cc: Heiko Schocher <hs@denx.de>
> cc: Wolfgang Denk <wd@denx.de>
> cc: Detlev Zundel <dzu@denx.de>
> cc: Prafulla Wadaskar <prafulla@marvell.com>
> ---
> changes for v3:
> 	- this patch is new in the series
> 
>  include/configs/km_arm.h    |   15 +++++++++++++++
>  include/configs/mgcoge2un.h |   15 ---------------
>  include/configs/suen3.h     |   15 ---------------
>  include/configs/suen8.h     |   15 ---------------
>  4 files changed, 15 insertions(+), 45 deletions(-)
> 
> diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h
> index 70113d4..313a7f8 100644
> --- a/include/configs/km_arm.h
> +++ b/include/configs/km_arm.h
> @@ -242,6 +242,21 @@ int get_scl (void);
>  		"sf write ${u-boot_addr_r} 0 ${filesize};"		\
>  		"spi off\0"
> 
> +/*
> + * Default environment variables
> + */
> +#define CONFIG_EXTRA_ENV_SETTINGS					\
> +	CONFIG_KM_DEF_ENV						\
> +	"newenv=setenv addr 0x100000 && "				\
> +		"i2c dev 1; mw.b ${addr} 0 4 && "			\
> +		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
> +		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
> +		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
> +		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
> +	"rootpath=/opt/eldk/arm\0"					\
> +	"EEprom_ivm=" KM_IVM_BUS "\0"					\
> +	""
> +
>  #if defined(CONFIG_SYS_NO_FLASH)
>  #define CONFIG_KM_UBI_PARTITION_NAME   "ubi0"
>  #undef	CONFIG_FLASH_CFI_MTD
> diff --git a/include/configs/mgcoge2un.h b/include/configs/mgcoge2un.h
> index d3c7bdc..876ac34 100644
> --- a/include/configs/mgcoge2un.h
> +++ b/include/configs/mgcoge2un.h
> @@ -47,19 +47,4 @@
>  #define KM_IVM_BUS	"pca9547:70:9" /* I2C2 (Mux-Port 1)*/
>  #define KM_ENV_BUS	"pca9547:70:d" /* I2C2 (Mux-Port 5)*/
> 
> -/*
> - * Default environment variables
> - */
> -#define CONFIG_EXTRA_ENV_SETTINGS					\
> -	CONFIG_KM_DEF_ENV						\
> -	"newenv=setenv addr 0x100000 && "				\
> -		"i2c dev 1; mw.b ${addr} 0 4 && "			\
> -		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
> -		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
> -		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
> -		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
> -	"rootpath=/opt/eldk/arm\0"					\
> -	"EEprom_ivm=" KM_IVM_BUS "\0"					\
> -	""
> -
>  #endif /* _CONFIG_MGCOGE2UN_H */
> diff --git a/include/configs/suen3.h b/include/configs/suen3.h
> index 2b6f19e..7d7a4ff 100644
> --- a/include/configs/suen3.h
> +++ b/include/configs/suen3.h
> @@ -46,19 +46,4 @@
>  #define KM_IVM_BUS	"pca9544a:70:9"	/* I2C2 (Mux-Port 1)*/
>  #define KM_ENV_BUS	"pca9544a:70:d"	/* I2C2 (Mux-Port 5)*/
> 
> -/*
> - * Default environment variables
> - */
> -#define CONFIG_EXTRA_ENV_SETTINGS					\
> -	CONFIG_KM_DEF_ENV						\
> -	"newenv=setenv addr 0x100000 && "				\
> -		"i2c dev 1; mw.b ${addr} 0 4 && "			\
> -		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
> -		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
> -		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
> -		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
> -	"rootpath=/opt/eldk/arm\0"					\
> -	"EEprom_ivm=" KM_IVM_BUS "\0"					\
> -	""
> -
>  #endif /* _CONFIG_SUEN3_H */
> diff --git a/include/configs/suen8.h b/include/configs/suen8.h
> index 3f60bc3..28c8a0b 100644
> --- a/include/configs/suen8.h
> +++ b/include/configs/suen8.h
> @@ -47,19 +47,4 @@
>  #define KM_IVM_BUS	"pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
>  #define KM_ENV_BUS	"pca9544a:70:d" /* I2C2 (Mux-Port 5)*/
> 
> -/*
> - * Default environment variables
> - */
> -#define CONFIG_EXTRA_ENV_SETTINGS					\
> -	CONFIG_KM_DEF_ENV						\
> -	"newenv=setenv addr 0x100000 && "				\
> -		"i2c dev 1; mw.b ${addr} 0 4 && "			\
> -		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
> -		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
> -		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
> -		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
> -	"rootpath=/opt/eldk/arm\0"					\
> -	"EEprom_ivm=" KM_IVM_BUS "\0"					\
> -	""
> -
>  #endif /* _CONFIG_SUEN8_H */
> --

Acked-By: Prafulla Wadaskar <Prafulla@marvell.com>

Regards..
Prafulla . . 

[U-Boot] [PATCH v3 1/8] arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h

[Prafulla Wadaskar]

> -----Original Message-----
> From: Valentin Longchamp [mailto:valentin.longchamp at keymile.com]
> Sent: Wednesday, May 04, 2011 9:24 PM
> To: u-boot at lists.denx.de
> Cc: holger.brunck at keymile.com; Prafulla Wadaskar; Valentin Longchamp;
> Heiko Schocher; Wolfgang Denk; Detlev Zundel
> Subject: [PATCH v3 1/8] arm/km: remove CONFIG_SYS_KWD_CONFIG from
> keymile-common.h
> 
> This define is marvell specific, so it should be present in km_arm.
> It is however not needed there either, since we set it to the default
> value that is already set in include/asm/arch-kirkwood/config.h
> 
> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
> cc: Holger Brunck <holger.brunck@keymile.com>
> cc: Prafulla Wadaskar <prafulla@marvell.com>
> cc: Heiko Schocher <hs@denx.de>
> cc: Wolfgang Denk <wd@denx.de>
> cc: Detlev Zundel <dzu@denx.de>
> ---
> changes for v3:
> 	- this patch is new in the series
> 
>  include/configs/keymile-common.h |    9 ---------
>  1 files changed, 0 insertions(+), 9 deletions(-)
> 
> diff --git a/include/configs/keymile-common.h b/include/configs/keymile-
> common.h
> index cb6d0fb..7115724 100644
> --- a/include/configs/keymile-common.h
> +++ b/include/configs/keymile-common.h
> @@ -31,15 +31,6 @@
>  #define CONFIG_BOOTCOUNT_LIMIT
> 
>  /*
> - * By default kwbimage.cfg from board specific folder is used
> - * If for some board, different configuration file need to be used,
> - * CONFIG_SYS_KWD_CONFIG should be defined in board specific header
> file
> - */
> -#ifndef CONFIG_SYS_KWD_CONFIG
> -#define	CONFIG_SYS_KWD_CONFIG	$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg
> -#endif /* CONFIG_SYS_KWD_CONFIG */
> -
> -/*
>   * Command line configuration.
>   */
>  #include <config_cmd_default.h>

Acked-by: Prafulla Wadaskar <prafulla@marvell.com>

Regards..
Prafulla . .

[U-Boot] [PATCH v3 3/8] arm/km: introduce bootcount env variable and clean km_arm

[Prafulla Wadaskar]

> -----Original Message-----
> From: Valentin Longchamp [mailto:valentin.longchamp at keymile.com]
> Sent: Wednesday, May 04, 2011 9:24 PM
> To: u-boot at lists.denx.de
> Cc: holger.brunck at keymile.com; Prafulla Wadaskar; Valentin Longchamp;
> Wolfgang Denk; Detlev Zundel
> Subject: [PATCH v3 3/8] arm/km: introduce bootcount env variable and
> clean km_arm
> 
> This environment variable is used to set the bootcount address
> for the kernel.
> 
> last_stage_init is not available for arm platforms. So the
> calls to set_km_var and set_bootcount_addr are done in
> misc_init_r.
> 
> Additionally some unneeded printouts were removed.
> 
> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
> Acked-by: Heiko Schocher <hs@denx.de>
> cc: Wolfgang Denk <wd@denx.de>
> cc: Detlev Zundel <dzu@denx.de>
> cc: Prafulla Wadaskar <prafulla@marvell.com>
> ---
> Changes for v2:
>    - split up first large patch series to three independent smaller
>      patch series
>    - taken Wolfgang Denk's comments into account
> Changes for v3:
>    - taken Prafulla's comments into account, merged with previous 02/08
> patch
> 
>  board/keymile/km_arm/km_arm.c |   28 +++++++++++++++-------------
>  include/configs/km_arm.h      |    3 +++
>  2 files changed, 18 insertions(+), 13 deletions(-)
> 
> diff --git a/board/keymile/km_arm/km_arm.c
> b/board/keymile/km_arm/km_arm.c
> index c772ee2..4049a4e 100644
> --- a/board/keymile/km_arm/km_arm.c
> +++ b/board/keymile/km_arm/km_arm.c
> @@ -145,16 +145,22 @@ int initialize_unit_leds(void)
>  	return 0;
>  }
> 
> +#if defined(CONFIG_BOOTCOUNT_LIMIT)
> +void set_bootcount_addr(void)
> +{
> +	uchar buf[32];
> +	unsigned int bootcountaddr;
> +	bootcountaddr = gd->ram_size - BOOTCOUNT_ADDR;
> +	sprintf((char *)buf, "0x%x", bootcountaddr);
> +	setenv("bootcountaddr", (char *)buf);
> +}
> +#endif
> +
>  int misc_init_r(void)
>  {
>  	char *str;
>  	int mach_type;
> 
> -	puts("Piggy:");
> -	if (ethernet_present() == 0)
> -		puts (" not");
> -	puts(" present\n");
> -
>  	str = getenv("mach_type");
>  	if (str != NULL) {
>  		mach_type = simple_strtoul(str, NULL, 10);
> @@ -163,7 +169,10 @@ int misc_init_r(void)
>  	}
> 
>  	initialize_unit_leds();
> -
> +	set_km_env();
> +#if defined(CONFIG_BOOTCOUNT_LIMIT)
> +	set_bootcount_addr();
> +#endif
>  	return 0;
>  }
> 
> @@ -182,7 +191,6 @@ int board_early_init_f(void)
>  	writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
>  	tmp = readl(KW_GPIO0_BASE + 4);
>  	writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE + 4);
> -	printf("KM: setting NAND mode\n");
> 
>  #if defined(CONFIG_SOFT_I2C)
>  	/* init the GPIO for I2C Bitbang driver */
> @@ -212,12 +220,6 @@ int board_init(void)
>  	return 0;
>  }
> 
> -int last_stage_init(void)
> -{
> -	set_km_env();
> -	return 0;
> -}
> -
>  #if defined(CONFIG_CMD_SF)
>  int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const
> argv[])
>  {
> diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h
> index 313a7f8..16199ef 100644
> --- a/include/configs/km_arm.h
> +++ b/include/configs/km_arm.h
> @@ -64,6 +64,9 @@
>  #define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 4096KBytes */
> 
>  #define CONFIG_KM_DEF_ENV_CPU						\
> +	"addbootcount="							\
> +		"setenv bootargs ${bootargs} "				\
> +		"bootcountaddr=${bootcountaddr}\0"			\
>  	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0"		\
>  	"boot=bootm ${actual_kernel_addr} - -\0"			\
>  	"cramfsloadfdt=echo \\\\c\0"					\
> --

Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>

Regards..
Prafulla . .

> 1.7.0.5

[U-Boot] [PATCH v3 8/8] arm/km: update mgcoge3un board support

[Prafulla Wadaskar]

> -----Original Message-----
> From: Valentin Longchamp [mailto:valentin.longchamp at keymile.com]
> Sent: Wednesday, May 04, 2011 9:24 PM
> To: u-boot at lists.denx.de
> Cc: holger.brunck at keymile.com; Prafulla Wadaskar; Valentin Longchamp;
> Wolfgang Denk; Detlev Zundel
> Subject: [PATCH v3 8/8] arm/km: update mgcoge3un board support
> 
> From: Holger Brunck <holger.brunck@keymile.com>

This line should be removed or moved to cc/ack/test list, it will appear in commit log

> 
> We change default settings for egiga on mgcoge3un.
> The reason we need this is that we have the gig port on mgcoge3un
> connected using a back-to-back pair of PHYs. There are no magnetics and
> because of that the port has to be run with a fixd configuration and
> auto-negotiation must be disabled. In the default mode the egiga driver
> uses autoneg to determine port speed - which defaults to 1G (we need
> 100M full duplex).
> 
> Add wait for the GPIO line connected to mgcoge3ne before
> starting mgcoge3un. A board specific ethernet present function
> was added, because on this board ethernet is always present.
> The BOCO FPGA access was enhanced and changed to use register
> definitions.
> 
> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
> Acked-by: Heiko Schocher <hs@denx.de>
> cc: Wolfgang Denk <wd@denx.de>
> cc: Detlev Zundel <dzu@denx.de>
> cc: Prafulla Wadaskar <prafulla@marvell.com>
> ---
> Changes for v2:
>    - split up first large patch series to three independent smaller
>      patch series
> Changes for v3:
>    - taken Prafulla's comments into account, merged with previous 08/08
> patch
> 
>  board/keymile/km_arm/km_arm.c |   80 +++++++++++++++++++++++++++++++++-
> ------
>  include/configs/mgcoge3un.h   |   25 +++++++++++++
>  2 files changed, 91 insertions(+), 14 deletions(-)
> 
> diff --git a/board/keymile/km_arm/km_arm.c
> b/board/keymile/km_arm/km_arm.c
> index 4049a4e..d86acc9 100644
> --- a/board/keymile/km_arm/km_arm.c
> +++ b/board/keymile/km_arm/km_arm.c
> @@ -41,6 +41,16 @@
> 
>  DECLARE_GLOBAL_DATA_PTR;
> 
> +/*
> + * BOCO FPGA definitions
> + */
> +#define BOCO		0x10
> +#define REG_CTRL_H		0x02
> +#define MASK_WRL_UNITRUN	0x01
> +#define MASK_RBX_PGY_PRESENT	0x40
> +#define REG_IRQ_CIRQ2		0x2d
> +#define MASK_RBI_DEFECT_16	0x01
> +
>  /* Multi-Purpose Pins Functionality configuration */
>  u32 kwmpp_config[] = {
>  	MPP0_NF_IO2,
> @@ -102,43 +112,64 @@ u32 kwmpp_config[] = {
>  	0
>  };
> 
> +#if defined(CONFIG_MGCOGE3UN)
> +/*
> + * Wait for startup OK from mgcoge3ne
> + */
> +int startup_allowed(void)
> +{
> +	unsigned char buf;
> +
> +	/*
> +	 * Read CIRQ16 bit (bit 0)
> +	 */
> +	if (i2c_read(BOCO, REG_IRQ_CIRQ2, 1, &buf, 1) != 0)
> +		printf("%s: Error reading Boco\n", __func__);
> +	else
> +		if ((buf & MASK_RBI_DEFECT_16) == MASK_RBI_DEFECT_16)
> +			return 1;
> +	return 0;
> +}
> +
> +/*
> + * mgcoge3un has always ethernet present. Its connected to the 6061
> switch
> + * and provides ICNev and piggy4 connections.
> + */
> +int ethernet_present(void)
> +{
> +	return 1;
> +}
> +#else
>  int ethernet_present(void)
>  {
>  	uchar	buf;
>  	int	ret = 0;
> 
> -	if (i2c_read(0x10, 2, 1, &buf, 1) != 0) {
> +	if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
>  		printf("%s: Error reading Boco\n", __func__);
>  		return -1;
>  	}
> -	if ((buf & 0x40) == 0x40)
> +	if ((buf & MASK_RBX_PGY_PRESENT) == MASK_RBX_PGY_PRESENT)

You can #if here instead of as done above, it will help to reduce code size and will be more readable.
I am sorry if I missed this in the earlier post.
 
>  		ret = 1;
> 
>  	return ret;
>  }
> +#endif
> 
>  int initialize_unit_leds(void)
>  {
>  	/*
> -	 * init the unit LEDs
> -	 * per default they all are
> +	 * Init the unit LEDs per default they all are
>  	 * ok apart from bootstat
> -	 * LED connected through BOCO
> -	 * BOCO	lies at the address  0x10
> -	 * LEDs are in the block CTRL_H	(addr 0x02)
> -	 * BOOTSTAT LED is the first 0x01
>  	 */
> -	#define BOCO        0x10
> -	#define CTRL_H      0x02
> -	#define APPLEDMASK  0x01
>  	uchar buf;
> 
> -	if (i2c_read(BOCO, CTRL_H, 1, &buf, 1) != 0) {
> +	if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
>  		printf("%s: Error reading Boco\n", __func__);
>  		return -1;
>  	}
> -	buf |= APPLEDMASK;
> -	if (i2c_write(BOCO, CTRL_H, 1, &buf, 1) != 0) {
> +	buf |= MASK_WRL_UNITRUN;
> +	if (i2c_write(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
>  		printf("%s: Error writing Boco\n", __func__);
>  		return -1;
>  	}
> @@ -167,6 +198,27 @@ int misc_init_r(void)
>  		printf("Overwriting MACH_TYPE with %d!!!\n", mach_type);
>  		gd->bd->bi_arch_number = mach_type;
>  	}
> +#if defined(CONFIG_MGCOGE3UN)
> +	char *wait_for_ne;
> +	wait_for_ne = getenv("waitforne");
> +	if (wait_for_ne != NULL) {
> +		if (strcmp(wait_for_ne, "true") == 0) {
> +			int cnt = 0;
> +			puts("NE go: ");
> +			while (startup_allowed() == 0) {
> +				udelay(200000);
> +				cnt++;
> +				if (cnt == 5)
> +					puts("wait\b\b\b\b");
> +				if (cnt == 10) {
> +					cnt = 0;
> +					puts("    \b\b\b\b");
> +				}
> +			}
> +			puts("OK\n");
> +		}
> +	}
> +#endif
> 
>  	initialize_unit_leds();
>  	set_km_env();
> diff --git a/include/configs/mgcoge3un.h b/include/configs/mgcoge3un.h
> index 1c32085..d022c4f 100644
> --- a/include/configs/mgcoge3un.h
> +++ b/include/configs/mgcoge3un.h
> @@ -50,4 +50,29 @@
>  /* we use a new RAM type on mgcoge3un board */
>  #define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-
> memphis.cfg
> 
> +/*
> + * mgcoge3un has a fixed link to the marvell switch
> + * with 100MB full duplex and autoneg off, for this
> + * reason we have to change the default settings
> + */
> +#define PORT_SERIAL_CONTROL_VALUE		( \
> +	MVGBE_FORCE_LINK_PASS			| \
> +	MVGBE_DIS_AUTO_NEG_FOR_DUPLX		| \
> +	MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL	| \
> +	MVGBE_ADV_NO_FLOW_CTRL			| \
> +	MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX	| \
> +	MVGBE_FORCE_BP_MODE_NO_JAM		| \
> +	(1 << 9) /* Reserved bit has to be 1 */	| \
> +	MVGBE_DO_NOT_FORCE_LINK_FAIL		| \
> +	MVGBE_DIS_AUTO_NEG_SPEED_GMII		| \
> +	MVGBE_DTE_ADV_0				| \
> +	MVGBE_MIIPHY_MAC_MODE			| \
> +	MVGBE_AUTO_NEG_NO_CHANGE		| \
> +	MVGBE_MAX_RX_PACKET_1552BYTE		| \
> +	MVGBE_CLR_EXT_LOOPBACK			| \
> +	MVGBE_SET_FULL_DUPLEX_MODE		| \
> +	MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX	|\
> +	MVGBE_SET_GMII_SPEED_TO_10_100	|\
> +	MVGBE_SET_MII_SPEED_TO_100)
> +
>  #endif /* _CONFIG_MGCOGE3UN_H */
> --
> 1.7.0.5

Regards..
Prafulla . .

[U-Boot] [PATCH v3 6/8] arm/km: rename mgcoge2un to mgcoge3un

[Prafulla Wadaskar]

> -----Original Message-----
> From: Valentin Longchamp [mailto:valentin.longchamp at keymile.com]
> Sent: Wednesday, May 04, 2011 9:24 PM
> To: u-boot at lists.denx.de
> Cc: holger.brunck at keymile.com; Prafulla Wadaskar; Valentin Longchamp;
> Wolfgang Denk; Detlev Zundel
> Subject: [PATCH v3 6/8] arm/km: rename mgcoge2un to mgcoge3un
> 
> The mgcoge2un target was only an intermediate step to mgcoge3un.
> For this reason the mgcoge2un support was moved to mgcoge3un,
> because it isn't needed to support both targets.
> 
> We add the BootROM init file for the mgcoge3un memphis RAM.
> 
> We also move the suen3 and suen8 boards into the correct category
> in the MAINTAINERS file.
> 
> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
> Acked-by: Heiko Schocher <hs@denx.de>
> cc: Wolfgang Denk <wd@denx.de>
> cc: Detlev Zundel <dzu@denx.de>
> cc: Prafulla Wadaskar <prafulla@marvell.com>
> ---
> Changes for v2:
>    - split up first large patch series to three independent smaller
>      patch series
> Changes for v3:
>    - taken Prafulla's comments into account, merged with previous 03/08
> patch
>      so that 03/08 does not look like dead code
> 
>  MAINTAINERS                                  |    6 +-
>  board/keymile/km_arm/kwbimage-memphis.cfg    |  197
> ++++++++++++++++++++++++++
>  boards.cfg                                   |    2 +-
>  include/configs/{mgcoge2un.h => mgcoge3un.h} |   15 ++-
>  4 files changed, 210 insertions(+), 10 deletions(-)
>  create mode 100644 board/keymile/km_arm/kwbimage-memphis.cfg
>  rename include/configs/{mgcoge2un.h => mgcoge3un.h} (81%)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index e2a4ba9..39b3e78 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -430,13 +430,10 @@ Heiko Schocher <hs@denx.de>
>  	kmsupx5		MPC8321
>  	mgcoge		MPC8247
>  	mgcoge2ne	MPC8247
> -	mgcoge2un	ARM926EJS (Kirkwood SoC)
>  	mucmc52		MPC5200
>  	muas3001	MPC8270
>  	municse		MPC5200
>  	sc3		PPC405GP
> -	suen3		ARM926EJS (Kirkwood SoC)
> -	suen8		ARM926EJS (Kirkwood SoC)
>  	suvd3		MPC8321
>  	tuda1		MPC8321
>  	tuxa1		MPC8321
> @@ -814,6 +811,9 @@ Jens Scharsig <esw@bus-elektronik.de>
>  Heiko Schocher <hs@denx.de>
> 
>  	magnesium	i.MX27
> +	mgcoge3un	ARM926EJS (Kirkwood SoC)
> +	suen3		ARM926EJS (Kirkwood SoC)
> +	suen8		ARM926EJS (Kirkwood SoC)
> 
>  Robert Schwebel <r.schwebel@pengutronix.de>
> 
> diff --git a/board/keymile/km_arm/kwbimage-memphis.cfg
> b/board/keymile/km_arm/kwbimage-memphis.cfg
> new file mode 100644
> index 0000000..2faaf2b
> --- /dev/null
> +++ b/board/keymile/km_arm/kwbimage-memphis.cfg
> @@ -0,0 +1,197 @@
> +#
> +# (C) Copyright 2010
> +# Heiko Schocher, DENX Software Engineering, hs at denx.de.
> +#
> +# (C) Copyright 2011
> +# Valentin Longchamp, Keymile AG, valentin.longchamp at keymile.com
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> +# MA 02110-1301 USA
> +#
> +# Refer docs/README.kwimage for more details about how-to configure
> +# and create kirkwood boot image
> +#
> +
> +# Boot Media configurations
> +BOOT_FROM	spi	# Boot from SPI flash
> +
> +DATA 0xFFD10000 0x01112222	# MPP Control 0 Register
> +# bit 3-0:   MPPSel0	2, NF_IO[2]
> +# bit 7-4:   MPPSel1	2, NF_IO[3]
> +# bit 12-8:  MPPSel2	2, NF_IO[4]
> +# bit 15-12: MPPSel3	2, NF_IO[5]
> +# bit 19-16: MPPSel4	1, NF_IO[6]
> +# bit 23-20: MPPSel5	1, NF_IO[7]
> +# bit 27-24: MPPSel6	1, SYSRST_O
> +# bit 31-28: MPPSel7	0, GPO[7]
> +
> +DATA 0xFFD10004 0x03303300
> +
> +DATA 0xFFD10008 0x00001100	# MPP Control 2 Register
> +# bit 3-0:   MPPSel16	0, GPIO[16]
> +# bit 7-4:   MPPSel17	0, GPIO[17]
> +# bit 12-8:  MPPSel18	1, NF_IO[0]
> +# bit 15-12: MPPSel19	1, NF_IO[1]
> +# bit 19-16: MPPSel20	0, GPIO[20]
> +# bit 23-20: MPPSel21	0, GPIO[21]
> +# bit 27-24: MPPSel22	0, GPIO[22]
> +# bit 31-28: MPPSel23	0, GPIO[23]
> +
> +DATA 0xFFD100E0 0x1B1B1B1B	# IO Configuration 0 Register
> +DATA 0xFFD20134 0x66666666	# L2 RAM Timing 0 Register
> +DATA 0xFFD20138 0x66666666	# L2 RAM Timing 1 Register
> +DATA 0xFFD20154 0x00000200	# CPU RAM Management Control3 Register
> +DATA 0xFFD2014C 0x00001C00	# CPU RAM Management Control1 Register
> +DATA 0xFFD20148 0x00000001	# CPU RAM Management Control0 Register
> +
> +#Dram initalization
> +DATA 0xFFD01400 0x430004E0	# SDRAM Configuration Register
> +# bit13-0:  0x4E0 (DDR2 clks refresh rate)
> +# bit23-14: zero
> +# bit24: 1= enable exit self refresh mode on DDR access
> +# bit25: 1 required
> +# bit29-26: zero
> +# bit31-30: 01
> +
> +DATA 0xFFD01404 0x38543000	# DDR Controller Control Low
> +# bit 3-0:  0 reserved
> +# bit 4:    0=addr/cmd in smame cycle
> +# bit 5:    0=clk is driven during self refresh, we don't care for APX
> +# bit 6:    0=use recommended falling edge of clk for addr/cmd
> +# bit14:    0=input buffer always powered up
> +# bit18:    1=cpu lock transaction enabled
> +# bit23-20: 5=recommended value for CL=4 and STARTBURST_DEL disabled
> bit31=0
> +# bit27-24: 8= CL+4, STARTBURST sample stages, for freqs 400MHz,
> unbuffered DIMM
> +# bit30-28: 3 required
> +# bit31:    0=no additional STARTBURST delay
> +
> +DATA 0xFFD01408 0x2302433E	# DDR Timing (Low) (active cycles value
> +1)
> +# bit3-0:   TRAS lsbs
> +# bit7-4:   TRCD
> +# bit11- 8: TRP
> +# bit15-12: TWR
> +# bit19-16: TWTR
> +# bit20:    TRAS msb
> +# bit23-21: 0x0
> +# bit27-24: TRRD
> +# bit31-28: TRTP
> +
> +DATA 0xFFD0140C 0x00000A3E	#  DDR Timing (High)
> +# bit6-0:   TRFC
> +# bit8-7:   TR2R
> +# bit10-9:  TR2W
> +# bit12-11: TW2W
> +# bit31-13: zero required
> +
> +DATA 0xFFD01410 0x00000001	#  DDR Address Control
> +# bit1-0:   01, Cs0width=x16
> +# bit3-2:   00, Cs0size=2Gb
> +# bit5-4:   00, Cs2width=nonexistent
> +# bit7-6:   00, Cs1size =nonexistent
> +# bit9-8:   00, Cs2width=nonexistent
> +# bit11-10: 00, Cs2size =nonexistent
> +# bit13-12: 00, Cs3width=nonexistent
> +# bit15-14: 00, Cs3size =nonexistent
> +# bit16:    0,  Cs0AddrSel
> +# bit17:    0,  Cs1AddrSel
> +# bit18:    0,  Cs2AddrSel
> +# bit19:    0,  Cs3AddrSel
> +# bit31-20: 0 required
> +
> +DATA 0xFFD01414 0x00000000	#  DDR Open Pages Control
> +# bit0:    0,  OpenPage enabled
> +# bit31-1: 0 required
> +
> +DATA 0xFFD01418 0x00000000	#  DDR Operation
> +# bit3-0:   0x0, DDR cmd
> +# bit31-4:  0 required
> +
> +DATA 0xFFD0141C 0x00000652	#  DDR Mode
> +DATA 0xFFD01420 0x00000006	#  DDR Extended Mode
> +# bit0:    0,  DDR DLL enabled
> +# bit1:    1,  DDR drive strenght reduced
> +# bit2:    1,  DDR ODT control lsd disabled
> +# bit5-3:  000, required
> +# bit6:    0,  DDR ODT control msb disabled
> +# bit9-7:  000, required
> +# bit10:   0,  differential DQS enabled
> +# bit11:   0, required
> +# bit12:   0, DDR output buffer enabled
> +# bit31-13: 0 required
> +
> +DATA 0xFFD01424 0x0000F17F	#  DDR Controller Control High
> +# bit2-0:  111, required
> +# bit3  :  1  , MBUS Burst Chop disabled
> +# bit6-4:  111, required
> +# bit7  :  0
> +# bit8  :  1  , add a sample stage
> +# bit9  :  0  , no half clock cycle addition to dataout
> +# bit10 :  0  , 1/4 clock cycle skew enabled for addr/ctl signals
> +# bit11 :  0  , 1/4 clock cycle skew disabled for write mesh
> +# bit15-12: 1111 required
> +# bit31-16: 0    required
> +
> +DATA 0xFFD01428 0x00084520	# DDR2 SDRAM Timing Low
> +# bit3-0  : 0000, required
> +# bit7-4  : 0010, M_ODT assertion 2 cycles after read
> +# bit11-8 : 1001, M_ODT de-assertion 5 cycles after read
> +# bit15-12: 0100, internal ODT assertion 4 cycles after read
> +# bit19-16: 1000, internal ODT de-assertion 8 cycles after read
> +# bit31-20: 0   , required
> +
> +DATA 0xFFD0147c 0x00008451	# DDR2 SDRAM Timing High
> +# bit3-0  : 0001, M_ODT assertion same cycle as write
> +# bit7-4  : 0101, M_ODT de-assertion x cycles after write
> +# bit11-8 : 0100, internal ODT assertion x cycles after write
> +# bit15-12: 1000, internal ODT de-assertion x cycles after write
> +
> +DATA 0xFFD01500 0x00000000	# CS[0]n Base address to 0x0
> +DATA 0xFFD01504 0x0FFFFFF1	# CS[0]n Size
> +# bit0:    1,  Window enabled
> +# bit1:    0,  Write Protect disabled
> +# bit3-2:  00, CS0 hit selected
> +# bit23-4: ones, required
> +# bit31-24: 0x0F, Size (i.e. 256MB)
> +
> +DATA 0xFFD0150C 0x00000000	# CS[1]n Size, window disabled
> +DATA 0xFFD01514 0x00000000	# CS[2]n Size, window disabled
> +DATA 0xFFD0151C 0x00000000	# CS[3]n Size, window disabled
> +
> +DATA 0xFFD01494 0x00010000	#  DDR ODT Control (Low)
> +# bit3-0:  0, ODT0Rd, MODT[0] not asserted during read from DRAM CS0
> +# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
> +
> +DATA 0xFFD01498 0x00000000	#  DDR ODT Control (High)
> +# bit1-0:  00, ODT0 controlled by ODT Control (low) register above
> +# bit3-2:  00, ODT1 controlled by register
> +# bit31-4: zero, required
> +
> +DATA 0xFFD0149C 0x0000F801	# CPU ODT Control
> +# bit3-0:  1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
> +# bit7-4:  0, ODT0Wr, Internal ODT not asserted during write to DRAM
> bank0
> +# bit9-8:  0, ODTEn, controlled by ODT0Rd and ODT0Wr
> +# bit11-10:2, DQ_ODTSel. ODT select turned on, 75 ohm
> +# bit13-12:3, STARTBURST ODT buffer selected, 50 ohm
> +# bit14   :1, STARTBURST ODT enabled
> +# bit15   :1, Use ODT Block
> +
> +DATA 0xFFD01480 0x00000001	# DDR Initialization Control
> +# bit0=1, enable DDR init upon this register write
> +
> +# End of Header extension
> +DATA 0x0 0x0
> diff --git a/boards.cfg b/boards.cfg
> index 2b0900a..2d36c52 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -105,7 +105,7 @@ davinci_sffsdr               arm         arm926ejs
> sffsdr              davinci
>  davinci_sonata               arm         arm926ejs   sonata
> davinci        davinci
>  suen3                        arm         arm926ejs   km_arm
> keymile        kirkwood
>  suen8                        arm         arm926ejs   km_arm
> keymile        kirkwood
> -mgcoge2un                    arm         arm926ejs   km_arm
> keymile        kirkwood
> +mgcoge3un                    arm         arm926ejs   km_arm
> keymile        kirkwood
>  guruplug                     arm         arm926ejs   -
> Marvell        kirkwood
>  mv88f6281gtw_ge              arm         arm926ejs   -
> Marvell        kirkwood
>  openrd_base                  arm         arm926ejs   -
> Marvell        kirkwood
> diff --git a/include/configs/mgcoge2un.h b/include/configs/mgcoge3un.h
> similarity index 81%
> rename from include/configs/mgcoge2un.h
> rename to include/configs/mgcoge3un.h
> index 876ac34..1c32085 100644
> --- a/include/configs/mgcoge2un.h
> +++ b/include/configs/mgcoge3un.h
> @@ -31,8 +31,8 @@
>  /* for linking errors see
>   * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html */
> 
> -#ifndef _CONFIG_MGCOGE2UN_H
> -#define _CONFIG_MGCOGE2UN_H
> +#ifndef _CONFIG_MGCOGE3UN_H
> +#define _CONFIG_MGCOGE3UN_H
> 
>  /* include common defines/options for all arm based Keymile boards */
>  #include "km_arm.h"
> @@ -40,11 +40,14 @@
>  /*
>   * Version number information
>   */
> -#define CONFIG_IDENT_STRING	"\nKeymile MGCOGE2UN"
> -
> -#define CONFIG_HOSTNAME			mgcoge2un
> +#define CONFIG_IDENT_STRING	"\nKeymile MGCOGE3UN"
> +#define CONFIG_HOSTNAME		mgcoge3un
> +#define CONFIG_MGCOGE3UN
> 
>  #define KM_IVM_BUS	"pca9547:70:9" /* I2C2 (Mux-Port 1)*/
>  #define KM_ENV_BUS	"pca9547:70:d" /* I2C2 (Mux-Port 5)*/
> 
> -#endif /* _CONFIG_MGCOGE2UN_H */
> +/* we use a new RAM type on mgcoge3un board */
> +#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-
> memphis.cfg
> +
> +#endif /* _CONFIG_MGCOGE3UN_H */

Acked-by: Prafulla Wadaskar <prafulla@marvell.com>

Regards..
Prafulla . .

[U-Boot] [PATCH v3 5/8] arm/km: add second serial interface for kirkwood

[Prafulla Wadaskar]

> -----Original Message-----
> From: Valentin Longchamp [mailto:valentin.longchamp at keymile.com]
> Sent: Wednesday, May 04, 2011 9:24 PM
> To: u-boot at lists.denx.de
> Cc: holger.brunck at keymile.com; Prafulla Wadaskar; Valentin Longchamp;
> Wolfgang Denk; Detlev Zundel
> Subject: [PATCH v3 5/8] arm/km: add second serial interface for kirkwood
> 
> From: Holger Brunck <holger.brunck@keymile.com>
> 
> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
> Acked-by: Heiko Schocher <hs@denx.de>
> cc: Wolfgang Denk <wd@denx.de>
> cc: Detlev Zundel <dzu@denx.de>
> cc: Prafulla Wadaskar <prafulla@marvell.com>
> ---
> Changes for v2:
>    - split up first large patch series to three independent smaller
>      patch series
> 
>  include/configs/km_arm.h |    6 ++++++
>  1 files changed, 6 insertions(+), 0 deletions(-)
> 
> diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h
> index d27a630..d2669d3 100644
> --- a/include/configs/km_arm.h
> +++ b/include/configs/km_arm.h
> @@ -92,6 +92,7 @@
>  #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
>  #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
>  #define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
> +#define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE
> 
>  /*
>   * Serial Port configuration
> @@ -136,7 +137,12 @@
> 
>  #define BOOTFLASH_START		0x0
> 
> +/* Kirkwood has two serial IF */
> +#if (CONFIG_CONS_INDEX == 2)
> +#define CONFIG_KM_CONSOLE_TTY	"ttyS1"
> +#else
>  #define CONFIG_KM_CONSOLE_TTY	"ttyS0"
> +#endif
> 
>  /* size in bytes reserved for initial data */
> 

Acked-By: Prafulla Wadaskar <Prafulla@marvell.com>

Regards..
Prafulla . . .

[U-Boot] [PATCH v3 8/8] arm/km: update mgcoge3un board support

[Holger Brunck]

Hi Prafulla,
thanks for reviewing.

On 05/12/2011 01:01 PM, Prafulla Wadaskar wrote:
> 
> 
>> -----Original Message-----
>> From: Valentin Longchamp [mailto:valentin.longchamp at keymile.com]
>> Sent: Wednesday, May 04, 2011 9:24 PM
>> To: u-boot at lists.denx.de
>> Cc: holger.brunck at keymile.com; Prafulla Wadaskar; Valentin Longchamp;
>> Wolfgang Denk; Detlev Zundel
>> Subject: [PATCH v3 8/8] arm/km: update mgcoge3un board support
>>
>> From: Holger Brunck <holger.brunck@keymile.com>
> 
> This line should be removed or moved to cc/ack/test list, it will appear in commit log
> 

this is only the indication that the patch is not from Valentin and is common
practice or am I wrong? Patch 5/8 in the serie does exactly the same.

>>
>> We change default settings for egiga on mgcoge3un.
>> The reason we need this is that we have the gig port on mgcoge3un
>> connected using a back-to-back pair of PHYs. There are no magnetics and
>> because of that the port has to be run with a fixd configuration and
>> auto-negotiation must be disabled. In the default mode the egiga driver
>> uses autoneg to determine port speed - which defaults to 1G (we need
>> 100M full duplex).
>>
>> Add wait for the GPIO line connected to mgcoge3ne before
>> starting mgcoge3un. A board specific ethernet present function
>> was added, because on this board ethernet is always present.
>> The BOCO FPGA access was enhanced and changed to use register
>> definitions.
>>
>> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
>> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
>> Acked-by: Heiko Schocher <hs@denx.de>
>> cc: Wolfgang Denk <wd@denx.de>
>> cc: Detlev Zundel <dzu@denx.de>
>> cc: Prafulla Wadaskar <prafulla@marvell.com>
>> ---
>> Changes for v2:
>>    - split up first large patch series to three independent smaller
>>      patch series
>> Changes for v3:
>>    - taken Prafulla's comments into account, merged with previous 08/08
>> patch
>>
>>  board/keymile/km_arm/km_arm.c |   80 +++++++++++++++++++++++++++++++++-
>> ------
>>  include/configs/mgcoge3un.h   |   25 +++++++++++++
>>  2 files changed, 91 insertions(+), 14 deletions(-)
>>
>> diff --git a/board/keymile/km_arm/km_arm.c
>> b/board/keymile/km_arm/km_arm.c
>> index 4049a4e..d86acc9 100644
>> --- a/board/keymile/km_arm/km_arm.c
>> +++ b/board/keymile/km_arm/km_arm.c
>> @@ -41,6 +41,16 @@
>>
>>  DECLARE_GLOBAL_DATA_PTR;
>>
>> +/*
>> + * BOCO FPGA definitions
>> + */
>> +#define BOCO		0x10
>> +#define REG_CTRL_H		0x02
>> +#define MASK_WRL_UNITRUN	0x01
>> +#define MASK_RBX_PGY_PRESENT	0x40
>> +#define REG_IRQ_CIRQ2		0x2d
>> +#define MASK_RBI_DEFECT_16	0x01
>> +
>>  /* Multi-Purpose Pins Functionality configuration */
>>  u32 kwmpp_config[] = {
>>  	MPP0_NF_IO2,
>> @@ -102,43 +112,64 @@ u32 kwmpp_config[] = {
>>  	0
>>  };
>>
>> +#if defined(CONFIG_MGCOGE3UN)
>> +/*
>> + * Wait for startup OK from mgcoge3ne
>> + */
>> +int startup_allowed(void)
>> +{
>> +	unsigned char buf;
>> +
>> +	/*
>> +	 * Read CIRQ16 bit (bit 0)
>> +	 */
>> +	if (i2c_read(BOCO, REG_IRQ_CIRQ2, 1, &buf, 1) != 0)
>> +		printf("%s: Error reading Boco\n", __func__);
>> +	else
>> +		if ((buf & MASK_RBI_DEFECT_16) == MASK_RBI_DEFECT_16)
>> +			return 1;
>> +	return 0;
>> +}
>> +
>> +/*
>> + * mgcoge3un has always ethernet present. Its connected to the 6061
>> switch
>> + * and provides ICNev and piggy4 connections.
>> + */
>> +int ethernet_present(void)
>> +{
>> +	return 1;
>> +}
>> +#else
>>  int ethernet_present(void)
>>  {
>>  	uchar	buf;
>>  	int	ret = 0;
>>
>> -	if (i2c_read(0x10, 2, 1, &buf, 1) != 0) {
>> +	if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
>>  		printf("%s: Error reading Boco\n", __func__);
>>  		return -1;
>>  	}
>> -	if ((buf & 0x40) == 0x40)
>> +	if ((buf & MASK_RBX_PGY_PRESENT) == MASK_RBX_PGY_PRESENT)
> 
> You can #if here instead of as done above, it will help to reduce code size and will be more readable.
> I am sorry if I missed this in the earlier post.
>  

hm, #if is evaluated during compile time and buf is a variable determined
runtime. What do you mean exactly?

Best regards
Holger Brunck

[U-Boot] [PATCH v3 8/8] arm/km: update mgcoge3un board support

[Wolfgang Denk]

Dear Holger Brunck,

In message <4DCD3C43.7030901@keymile.com> you wrote:
> 
> >> From: Holger Brunck <holger.brunck@keymile.com>
> > 
> > This line should be removed or moved to cc/ack/test list, it will appear in commit log
> 
> this is only the indication that the patch is not from Valentin and is common
> practice or am I wrong? Patch 5/8 in the serie does exactly the same.

Thisis correct, and git-am handles this nicely.

> >> -	if (i2c_read(0x10, 2, 1, &buf, 1) != 0) {
> >> +	if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
> >>  		printf("%s: Error reading Boco\n", __func__);
> >>  		return -1;
> >>  	}
> >> -	if ((buf & 0x40) == 0x40)
> >> +	if ((buf & MASK_RBX_PGY_PRESENT) == MASK_RBX_PGY_PRESENT)
> > 
> > You can #if here instead of as done above, it will help to reduce code size and will be more readable.
> > I am sorry if I missed this in the earlier post.
> >  
> 
> hm, #if is evaluated during compile time and buf is a variable determined
> runtime. What do you mean exactly?

I think this was a misunderstanding.  The code looks OK with me.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
A Stanford research group advertised for participants in a  study  of
obsessive-compulsive  disorder. They were looking for therapy clients
who had been diagnosed with this disorder. The  response  was  grati-
fying;  they  got  3,000 responses about three days after the ad came
out. All from the same person.

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Valentin Longchamp]

Hi Prafulla,

Prafulla Wadaskar wrote:
> 
>> -----Original Message-----
>> From: Valentin Longchamp [mailto:valentin.longchamp at keymile.com]
>> Sent: Wednesday, May 11, 2011 8:52 PM
>> To: Prafulla Wadaskar
>> Cc: u-boot at lists.denx.de; holger.brunck at keymile.com
>> Subject: Re: [PATCH v3 0/8] keymile arm boards update, part 2
>>
>> Hi Prafulla,
>>
>> Valentin Longchamp wrote:
>>> This series is the second effort of merging the Keymile boards support
>>> back into mainline.
>>>
>>> This series is a subset of the first patch series:
>>> http://lists.denx.de/pipermail/u-boot/2011-April/090013.html
>>> The first large series was split up to three independent series, which
>>> are easier to review and apply for the custodians.
>>>
>>> This series adds the km_arm specific parts of the series. All its
>> changes
>>> concern our marvell based boards and that's why it should go through
>> the
>>> u-boot-marvell git tree.
>>>
>>> Changes for v3: taken Prafulla's comments into account
>> I have posted those one week ago, and I was wondering if you would be
>> able to review/take them in you tree soon ?
> 
> Yes Valentin
> I will review them in this week, sorry for delay.
> 

Thank you for the review. I guess now the series is ready go into mainline. 

With -rc1 to be freezed very soon, we really would like to see it getting pushed before this freeze. This series is the last remaining part of our effort to rationalize our code base for the Keymile boards and integrate it into mainline and thus it would help us for our current/future developments that this series goes as well to mainline for the current approaching release.

Best Regards

-- 
Valentin Longchamp
Embedded Software Engineer
Hardware and Chip Integration
______________________________________ 
KEYMILE AG 
Schwarzenburgstr. 73
CH-3097 Liebefeld
Phone +41 31 377 1318 
Fax   +41 31 377 1212 
valentin.longchamp at keymile.com
www.keymile.com 
______________________________________ 
KEYMILE: A Specialist as a Partner

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Valentin Longchamp]

Hi Albert,

Valentin Longchamp wrote:
> Hi Prafulla,
> 
> Prafulla Wadaskar wrote:
>>> -----Original Message-----
>>> From: Valentin Longchamp [mailto:valentin.longchamp at keymile.com]
>>> Sent: Wednesday, May 11, 2011 8:52 PM
>>> To: Prafulla Wadaskar
>>> Cc: u-boot at lists.denx.de; holger.brunck at keymile.com
>>> Subject: Re: [PATCH v3 0/8] keymile arm boards update, part 2
>>>
>>> Hi Prafulla,
>>>
>>> Valentin Longchamp wrote:
>>>> This series is the second effort of merging the Keymile boards support
>>>> back into mainline.
>>>>
>>>> This series is a subset of the first patch series:
>>>> http://lists.denx.de/pipermail/u-boot/2011-April/090013.html
>>>> The first large series was split up to three independent series, which
>>>> are easier to review and apply for the custodians.
>>>>
>>>> This series adds the km_arm specific parts of the series. All its
>>> changes
>>>> concern our marvell based boards and that's why it should go through
>>> the
>>>> u-boot-marvell git tree.
>>>>
>>>> Changes for v3: taken Prafulla's comments into account
>>> I have posted those one week ago, and I was wondering if you would be
>>> able to review/take them in you tree soon ?
>> Yes Valentin
>> I will review them in this week, sorry for delay.
>>
> 
> Thank you for the review. I guess now the series is ready go into mainline. 
> 
> With -rc1 to be freezed very soon, we really would like to see it getting pushed before this freeze. This series is the last remaining part of our effort to rationalize our code base for the Keymile boards and integrate it into mainline and thus it would help us for our current/future developments that this series goes as well to mainline for the current approaching release.
> 

Since Prafulla does not answer and Wolfgang yesterday tagged -rc1, could you please apply these patches to your ARM tree ?

I have noticed that Prafulla usually asked you for pull requests of his tree, and since he has acked the whole series, maybe they could go directly to your tree, so that they go to Wolfgang's tree rather quickly (because of -rc1).

Wolfgang, what is your opinion on how this should be merged ? The patches have really been posted quite a long time ago (they were split in 3 series in the meantime) and you have applied the other two series already. It would be good for us that the 3 series are able to make it for v2011.06.

Best regards

Valentin

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Wolfgang Denk]

Dear Valentin Longchamp,

In message <4DD65683.60106@keymile.com> you wrote:
> 
> Wolfgang, what is your opinion on how this should be merged ? The
> patches have really been posted quite a long time ago (they were
> split in 3 series in the meantime) and you have applied the other two
> series already. It would be good for us that the 3 series are able to
> make it for v2011.06.

My understanding is that these patches are on Prafulla's desk.

Prafulla, can you please comment?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
You are only young once, but you can stay immature indefinitely.

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Prafulla Wadaskar]

> -----Original Message-----
> From: Wolfgang Denk [mailto:wd at denx.de]
> Sent: Friday, May 20, 2011 6:36 PM
> To: Valentin Longchamp
> Cc: Prafulla Wadaskar; albert.u.boot at aribaud.net; u-boot at lists.denx.de;
> holger.brunck at keymile.com; Ashish Karkare; Prabhanjan Sarnaik; Heiko
> Schocher
> Subject: Re: [PATCH v3 0/8] keymile arm boards update, part 2
> 
> Dear Valentin Longchamp,
> 
> In message <4DD65683.60106@keymile.com> you wrote:
> >
> > Wolfgang, what is your opinion on how this should be merged ? The
> > patches have really been posted quite a long time ago (they were
> > split in 3 series in the meantime) and you have applied the other two
> > series already. It would be good for us that the 3 series are able to
> > make it for v2011.06.
> 
> My understanding is that these patches are on Prafulla's desk.
> 
> Prafulla, can you please comment?

Hi Wolfgang

I was offline, and will have limited network access this week. I'll check and pull them by coming Tuesday.

Regards..
Prafulla . .

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Valentin Longchamp]

Hello everybody,

Prafulla Wadaskar wrote:
> 
>> -----Original Message-----
>> From: Wolfgang Denk [mailto:wd at denx.de]
>> Sent: Friday, May 20, 2011 6:36 PM
>> To: Valentin Longchamp
>> Cc: Prafulla Wadaskar; albert.u.boot at aribaud.net; u-boot at lists.denx.de;
>> holger.brunck at keymile.com; Ashish Karkare; Prabhanjan Sarnaik; Heiko
>> Schocher
>> Subject: Re: [PATCH v3 0/8] keymile arm boards update, part 2
>>
>> Dear Valentin Longchamp,
>>
>> In message <4DD65683.60106@keymile.com> you wrote:
>>> Wolfgang, what is your opinion on how this should be merged ? The
>>> patches have really been posted quite a long time ago (they were
>>> split in 3 series in the meantime) and you have applied the other two
>>> series already. It would be good for us that the 3 series are able to
>>> make it for v2011.06.
>> My understanding is that these patches are on Prafulla's desk.
>>
>> Prafulla, can you please comment?
> 
> Hi Wolfgang
> 
> I was offline, and will have limited network access this week. I'll check and pull them by coming Tuesday.
> 
> Regards..
> Prafulla . .

Albert, what is your current position regarding this series that was acked by Prafulla now that he has sent this message yesterday ? Do you want to apply them in you tree and (and maybe ask for a pull request for the 2011.06 release) or do you think waiting for Prafulla's return on June 1st (here an hint from Wolfgang to know if it's ok to wait until then would be welcome).

Thank you and best regards

-- 
Valentin Longchamp
Embedded Software Engineer
Hardware and Chip Integration
______________________________________ 
KEYMILE AG 
Schwarzenburgstr. 73
CH-3097 Liebefeld
Phone +41 31 377 1318 
Fax   +41 31 377 1212 
valentin.longchamp at keymile.com
www.keymile.com 
______________________________________ 
KEYMILE: A Specialist as a Partner

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Holger Brunck]

Hi Wolfgang,

On 05/26/2011 03:36 PM, Valentin Longchamp wrote:
> Hello everybody,
> 
> Prafulla Wadaskar wrote:
>>
>>> -----Original Message-----
>>> From: Wolfgang Denk [mailto:wd at denx.de]
>>> Sent: Friday, May 20, 2011 6:36 PM
>>> To: Valentin Longchamp
>>> Cc: Prafulla Wadaskar; albert.u.boot at aribaud.net; u-boot at lists.denx.de;
>>> holger.brunck at keymile.com; Ashish Karkare; Prabhanjan Sarnaik; Heiko
>>> Schocher
>>> Subject: Re: [PATCH v3 0/8] keymile arm boards update, part 2
>>>
>>> Dear Valentin Longchamp,
>>>
>>> In message <4DD65683.60106@keymile.com> you wrote:
>>>> Wolfgang, what is your opinion on how this should be merged ? The
>>>> patches have really been posted quite a long time ago (they were
>>>> split in 3 series in the meantime) and you have applied the other two
>>>> series already. It would be good for us that the 3 series are able to
>>>> make it for v2011.06.
>>> My understanding is that these patches are on Prafulla's desk.
>>>
>>> Prafulla, can you please comment?
>>
>> Hi Wolfgang
>>
>> I was offline, and will have limited network access this week. I'll check and pull them by coming Tuesday.
>>
>> Regards..
>> Prafulla . .
> 
> Albert, what is your current position regarding this series that was acked by Prafulla now that he has sent this message yesterday ? Do you want to apply them in you tree and (and maybe ask for a pull request for the 2011.06 release) or do you think waiting for Prafulla's return on June 1st (here an hint from Wolfgang to know if it's ok to wait until then would be welcome).
> 
> Thank you and best regards
> 

could you please give us a short note how to proceed with this patch serie? Do
we wait until Prafulla is back? Is there still a chance for us that these
patches are pulled for rc2?  Even if this is not the case a short note would be
helpfull for us, that we can prepare our updates for u-boot-next.

Thanks.

Best regards
Holger Brunck

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Wolfgang Denk]

Dear Holger Brunck,

In message <4DE3BF02.3060802@keymile.com> you wrote:
> 
> could you please give us a short note how to proceed with this patch serie? Do
> we wait until Prafulla is back? Is there still a chance for us that these
> patches are pulled for rc2?  Even if this is not the case a short note would be
> helpfull for us, that we can prepare our updates for u-boot-next.

Prafulla, Albert and me agreed that Albert will take his patches
directly while Prafulla is not available.

So this is on Albert's plate.  I wait for his pull request.


Albert, is this your understanding, too?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Any sufficiently advanced technology is indistinguishable from magic.
Clarke's Third Law       - _Profiles of the Future_ (1962; rev. 1973)
                  ``Hazards of Prophecy: The Failure of Imagination''

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Albert ARIBAUD]

Le 30/05/2011 21:24, Wolfgang Denk a ?crit :
> Dear Holger Brunck,
>
> In message<4DE3BF02.3060802@keymile.com>  you wrote:
>>
>> could you please give us a short note how to proceed with this patch serie? Do
>> we wait until Prafulla is back? Is there still a chance for us that these
>> patches are pulled for rc2?  Even if this is not the case a short note would be
>> helpfull for us, that we can prepare our updates for u-boot-next.
>
> Prafulla, Albert and me agreed that Albert will take his patches
> directly while Prafulla is not available.
>
> So this is on Albert's plate.  I wait for his pull request.
>
>
> Albert, is this your understanding, too?

Yes. I'll look at the patches and let you know.

> Best regards,
>
> Wolfgang Denk

Amicalement,
-- 
Albert.

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Albert ARIBAUD]

Le 30/05/2011 21:49, Albert ARIBAUD a ?crit :
> Le 30/05/2011 21:24, Wolfgang Denk a ?crit :
>> Dear Holger Brunck,
>>
>> In message<4DE3BF02.3060802@keymile.com>   you wrote:
>>>
>>> could you please give us a short note how to proceed with this patch serie? Do
>>> we wait until Prafulla is back? Is there still a chance for us that these
>>> patches are pulled for rc2?  Even if this is not the case a short note would be
>>> helpfull for us, that we can prepare our updates for u-boot-next.
>>
>> Prafulla, Albert and me agreed that Albert will take his patches
>> directly while Prafulla is not available.
>>
>> So this is on Albert's plate.  I wait for his pull request.
>>
>>
>> Albert, is this your understanding, too?
>
> Yes. I'll look at the patches and let you know.

I'll apply the whole series to u-boot-arm as the first submission was 
within the merge window.

Amicalement,
-- 
Albert.

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Albert ARIBAUD]

Le 30/05/2011 21:57, Albert ARIBAUD a ?crit :
> Le 30/05/2011 21:49, Albert ARIBAUD a ?crit :
>> Le 30/05/2011 21:24, Wolfgang Denk a ?crit :
>>> Dear Holger Brunck,
>>>
>>> In message<4DE3BF02.3060802@keymile.com>    you wrote:
>>>>
>>>> could you please give us a short note how to proceed with this patch serie? Do
>>>> we wait until Prafulla is back? Is there still a chance for us that these
>>>> patches are pulled for rc2?  Even if this is not the case a short note would be
>>>> helpfull for us, that we can prepare our updates for u-boot-next.
>>>
>>> Prafulla, Albert and me agreed that Albert will take his patches
>>> directly while Prafulla is not available.
>>>
>>> So this is on Albert's plate.  I wait for his pull request.
>>>
>>>
>>> Albert, is this your understanding, too?
>>
>> Yes. I'll look at the patches and let you know.
>
> I'll apply the whole series to u-boot-arm as the first submission was
> within the merge window.
>
> Amicalement,

Update: in order to apply the series, I will need to pull the current 
marvell ARM tree master branch into u-boot-arm, and the rebase is not 
trivial. Sorry for the delay, but I will only be able to do this tomorrow.

Amicalement,
-- 
Albert.

[U-Boot] [PATCH v3 0/8] keymile arm boards update, part 2

[Albert ARIBAUD]

Le 30/05/2011 22:15, Albert ARIBAUD a ?crit :
> Le 30/05/2011 21:57, Albert ARIBAUD a ?crit :
>> Le 30/05/2011 21:49, Albert ARIBAUD a ?crit :
>>> Le 30/05/2011 21:24, Wolfgang Denk a ?crit :
>>>> Dear Holger Brunck,
>>>>
>>>> In message<4DE3BF02.3060802@keymile.com>     you wrote:
>>>>>
>>>>> could you please give us a short note how to proceed with this patch serie? Do
>>>>> we wait until Prafulla is back? Is there still a chance for us that these
>>>>> patches are pulled for rc2?  Even if this is not the case a short note would be
>>>>> helpfull for us, that we can prepare our updates for u-boot-next.
>>>>
>>>> Prafulla, Albert and me agreed that Albert will take his patches
>>>> directly while Prafulla is not available.
>>>>
>>>> So this is on Albert's plate.  I wait for his pull request.
>>>>
>>>>
>>>> Albert, is this your understanding, too?
>>>
>>> Yes. I'll look at the patches and let you know.
>>
>> I'll apply the whole series to u-boot-arm as the first submission was
>> within the merge window.
>>
>> Amicalement,
>
> Update: in order to apply the series, I will need to pull the current
> marvell ARM tree master branch into u-boot-arm, and the rebase is not
> trivial. Sorry for the delay, but I will only be able to do this tomorrow.

Update again: actually, there are no new commits on 
u-boot-marvell/master that I did not already have on u-boot-arm/master 
as well -- chalk that up to doing things without enough sleep.

As for the patch series, v3 seems to not apply cleanly since commit 
264eaa0ea967bac32214b87d60cfc86c8b22cac6 (keymile boards: move keymile 
specific header in subdir). Can the series be resubmitted so that it 
applies above the current u-boot-arm/master?

Amicalement,
-- 
Albert.

[U-Boot] [PATCH v3 rebase 0/8] keymile arm boards update, part 2

[Valentin Longchamp]

This series is the second effort of merging the Keymile boards support
back into mainline.

This series is a subset of the first patch series:
http://lists.denx.de/pipermail/u-boot/2011-April/090013.html
The first large series was split up to three independent series, which
are easier to review and apply for the custodians.

This series adds the km_arm specific parts of the series. All its changes
concern our marvell based boards and that's why it should go through the
u-boot-marvell git tree.

Changes for v3: taken Prafulla's comments into account
Changes for v3 rebase: rebased on current u-boot-arm

Holger Brunck (2):
  arm/km: add second serial interface for kirkwood
  arm/km: update mgcoge3un board support

Valentin Longchamp (6):
  arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h
  arm/km: move CONFIG_EXTRA_ENV_SETTINGS from board to km_arm file
  arm/km: introduce bootcount env variable and clean km_arm
  arm/km: disable ls (through jffs2 support)
  arm/km: rename mgcoge2un to mgcoge3un
  mvgbe: enable configurability of PORT_SERIAL_CONTROL_VALUE

 MAINTAINERS                                  |    6 +-
 board/keymile/km_arm/km_arm.c                |  108 +++++++++++----
 board/keymile/km_arm/kwbimage-memphis.cfg    |  197 ++++++++++++++++++++++++++
 boards.cfg                                   |    2 +-
 drivers/net/mvgbe.h                          |    2 +
 include/configs/km/keymile-common.h          |    9 --
 include/configs/km/km_arm.h                  |   25 ++++
 include/configs/{mgcoge2un.h => mgcoge3un.h} |   49 ++++---
 include/configs/suen3.h                      |   15 --
 include/configs/suen8.h                      |   15 --
 10 files changed, 340 insertions(+), 88 deletions(-)
 create mode 100644 board/keymile/km_arm/kwbimage-memphis.cfg
 rename include/configs/{mgcoge2un.h => mgcoge3un.h} (56%)

[U-Boot] [PATCH v3 rebase 1/8] arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h

[Valentin Longchamp]

This define is marvell specific, so it should be present in km_arm.
It is however not needed there either, since we set it to the default
value that is already set in include/asm/arch-kirkwood/config.h

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
---
 include/configs/km/keymile-common.h |    9 ---------
 1 files changed, 0 insertions(+), 9 deletions(-)

diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index f89a2ea..70c9dad 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -31,15 +31,6 @@
 #define CONFIG_BOOTCOUNT_LIMIT
 
 /*
- * By default kwbimage.cfg from board specific folder is used
- * If for some board, different configuration file need to be used,
- * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file
- */
-#ifndef CONFIG_SYS_KWD_CONFIG
-#define	CONFIG_SYS_KWD_CONFIG	$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg
-#endif /* CONFIG_SYS_KWD_CONFIG */
-
-/*
  * Command line configuration.
  */
 #include <config_cmd_default.h>
-- 
1.7.0.5

[U-Boot] [PATCH v3 rebase 2/8] arm/km: move CONFIG_EXTRA_ENV_SETTINGS from board to km_arm file

[Valentin Longchamp]

Since all the boards define the same env settings, this simplifies
the board files.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
 include/configs/km/km_arm.h |   15 +++++++++++++++
 include/configs/mgcoge2un.h |   15 ---------------
 include/configs/suen3.h     |   15 ---------------
 include/configs/suen8.h     |   15 ---------------
 4 files changed, 15 insertions(+), 45 deletions(-)

diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index aa9f1ae..80a56dd 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -239,6 +239,21 @@ int get_scl(void);
 		"sf write ${u-boot_addr_r} 0 ${filesize};"		\
 		"spi off\0"
 
+/*
+ * Default environment variables
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	CONFIG_KM_DEF_ENV						\
+	"newenv=setenv addr 0x100000 && "				\
+		"i2c dev 1; mw.b ${addr} 0 4 && "			\
+		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
+		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
+		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
+		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
+	"rootpath=/opt/eldk/arm\0"					\
+	"EEprom_ivm=" KM_IVM_BUS "\0"					\
+	""
+
 #if defined(CONFIG_SYS_NO_FLASH)
 #define CONFIG_KM_UBI_PARTITION_NAME   "ubi0"
 #undef	CONFIG_FLASH_CFI_MTD
diff --git a/include/configs/mgcoge2un.h b/include/configs/mgcoge2un.h
index 6256035..4e2a774 100644
--- a/include/configs/mgcoge2un.h
+++ b/include/configs/mgcoge2un.h
@@ -47,19 +47,4 @@
 #define KM_IVM_BUS	"pca9547:70:9" /* I2C2 (Mux-Port 1)*/
 #define KM_ENV_BUS	"pca9547:70:d" /* I2C2 (Mux-Port 5)*/
 
-/*
- * Default environment variables
- */
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	CONFIG_KM_DEF_ENV						\
-	"newenv=setenv addr 0x100000 && "				\
-		"i2c dev 1; mw.b ${addr} 0 4 && "			\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
-	"rootpath=/opt/eldk/arm\0"					\
-	"EEprom_ivm=" KM_IVM_BUS "\0"					\
-	""
-
 #endif /* _CONFIG_MGCOGE2UN_H */
diff --git a/include/configs/suen3.h b/include/configs/suen3.h
index aa4d778..0f1b11e 100644
--- a/include/configs/suen3.h
+++ b/include/configs/suen3.h
@@ -46,19 +46,4 @@
 #define KM_IVM_BUS	"pca9544a:70:9"	/* I2C2 (Mux-Port 1)*/
 #define KM_ENV_BUS	"pca9544a:70:d"	/* I2C2 (Mux-Port 5)*/
 
-/*
- * Default environment variables
- */
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	CONFIG_KM_DEF_ENV						\
-	"newenv=setenv addr 0x100000 && "				\
-		"i2c dev 1; mw.b ${addr} 0 4 && "			\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
-	"rootpath=/opt/eldk/arm\0"					\
-	"EEprom_ivm=" KM_IVM_BUS "\0"					\
-	""
-
 #endif /* _CONFIG_SUEN3_H */
diff --git a/include/configs/suen8.h b/include/configs/suen8.h
index b680dfb..78cee75 100644
--- a/include/configs/suen8.h
+++ b/include/configs/suen8.h
@@ -47,19 +47,4 @@
 #define KM_IVM_BUS	"pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
 #define KM_ENV_BUS	"pca9544a:70:d" /* I2C2 (Mux-Port 5)*/
 
-/*
- * Default environment variables
- */
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	CONFIG_KM_DEF_ENV						\
-	"newenv=setenv addr 0x100000 && "				\
-		"i2c dev 1; mw.b ${addr} 0 4 && "			\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
-		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
-		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
-	"rootpath=/opt/eldk/arm\0"					\
-	"EEprom_ivm=" KM_IVM_BUS "\0"					\
-	""
-
 #endif /* _CONFIG_SUEN8_H */
-- 
1.7.0.5

[U-Boot] [PATCH v3 rebase 3/8] arm/km: introduce bootcount env variable and clean km_arm

[Valentin Longchamp]

This environment variable is used to set the bootcount address
for the kernel.

last_stage_init is not available for arm platforms. So the
calls to set_km_var and set_bootcount_addr are done in
misc_init_r.

Additionally some unneeded printouts were removed.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
 board/keymile/km_arm/km_arm.c |   28 +++++++++++++++-------------
 include/configs/km/km_arm.h   |    3 +++
 2 files changed, 18 insertions(+), 13 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index c772ee2..4049a4e 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -145,16 +145,22 @@ int initialize_unit_leds(void)
 	return 0;
 }
 
+#if defined(CONFIG_BOOTCOUNT_LIMIT)
+void set_bootcount_addr(void)
+{
+	uchar buf[32];
+	unsigned int bootcountaddr;
+	bootcountaddr = gd->ram_size - BOOTCOUNT_ADDR;
+	sprintf((char *)buf, "0x%x", bootcountaddr);
+	setenv("bootcountaddr", (char *)buf);
+}
+#endif
+
 int misc_init_r(void)
 {
 	char *str;
 	int mach_type;
 
-	puts("Piggy:");
-	if (ethernet_present() == 0)
-		puts (" not");
-	puts(" present\n");
-
 	str = getenv("mach_type");
 	if (str != NULL) {
 		mach_type = simple_strtoul(str, NULL, 10);
@@ -163,7 +169,10 @@ int misc_init_r(void)
 	}
 
 	initialize_unit_leds();
-
+	set_km_env();
+#if defined(CONFIG_BOOTCOUNT_LIMIT)
+	set_bootcount_addr();
+#endif
 	return 0;
 }
 
@@ -182,7 +191,6 @@ int board_early_init_f(void)
 	writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
 	tmp = readl(KW_GPIO0_BASE + 4);
 	writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE + 4);
-	printf("KM: setting NAND mode\n");
 
 #if defined(CONFIG_SOFT_I2C)
 	/* init the GPIO for I2C Bitbang driver */
@@ -212,12 +220,6 @@ int board_init(void)
 	return 0;
 }
 
-int last_stage_init(void)
-{
-	set_km_env();
-	return 0;
-}
-
 #if defined(CONFIG_CMD_SF)
 int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index 80a56dd..5a915f3 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -64,6 +64,9 @@
 #define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 4096KBytes */
 
 #define CONFIG_KM_DEF_ENV_CPU						\
+	"addbootcount="							\
+		"setenv bootargs ${bootargs} "				\
+		"bootcountaddr=${bootcountaddr}\0"			\
 	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0"		\
 	"boot=bootm ${actual_kernel_addr} - -\0"			\
 	"cramfsloadfdt=true\0"						\
-- 
1.7.0.5

[U-Boot] [PATCH v3 rebase 4/8] arm/km: disable ls (through jffs2 support)

[Valentin Longchamp]

This is not supported on our km-arm boards since we have defined
CONFIG_SYS_NO_FLASH for our NAND Flash chip.

With CONFIG_CMD_JFFS2, the ls command is present and works very badly
on our km-arm boards.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
---
 include/configs/km/km_arm.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index 5a915f3..9c704fc 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -260,6 +260,7 @@ int get_scl(void);
 #if defined(CONFIG_SYS_NO_FLASH)
 #define CONFIG_KM_UBI_PARTITION_NAME   "ubi0"
 #undef	CONFIG_FLASH_CFI_MTD
+#undef	CONFIG_CMD_JFFS2
 #undef	CONFIG_JFFS2_CMDLINE
 #endif
 
-- 
1.7.0.5

[U-Boot] [PATCH v3 rebase 5/8] arm/km: add second serial interface for kirkwood

[Valentin Longchamp]

From: Holger Brunck <holger.brunck@keymile.com>

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
 include/configs/km/km_arm.h |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index 9c704fc..20ee6ea 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -91,6 +91,7 @@
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
 #define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
+#define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE
 
 /*
  * Serial Port configuration
@@ -135,7 +136,12 @@
 
 #define BOOTFLASH_START		0x0
 
+/* Kirkwood has two serial IF */
+#if (CONFIG_CONS_INDEX == 2)
+#define CONFIG_KM_CONSOLE_TTY	"ttyS1"
+#else
 #define CONFIG_KM_CONSOLE_TTY	"ttyS0"
+#endif
 
 /*
  * Other required minimal configurations
-- 
1.7.0.5

[U-Boot] [PATCH v3 rebase 6/8] arm/km: rename mgcoge2un to mgcoge3un

[Valentin Longchamp]

The mgcoge2un target was only an intermediate step to mgcoge3un.
For this reason the mgcoge2un support was moved to mgcoge3un,
because it isn't needed to support both targets.

We add the BootROM init file for the mgcoge3un memphis RAM.

We also move the suen3 and suen8 boards into the correct category
in the MAINTAINERS file.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
 MAINTAINERS                                  |    6 +-
 board/keymile/km_arm/kwbimage-memphis.cfg    |  197 ++++++++++++++++++++++++++
 boards.cfg                                   |    2 +-
 include/configs/{mgcoge2un.h => mgcoge3un.h} |   15 ++-
 4 files changed, 210 insertions(+), 10 deletions(-)
 create mode 100644 board/keymile/km_arm/kwbimage-memphis.cfg
 rename include/configs/{mgcoge2un.h => mgcoge3un.h} (81%)

diff --git a/MAINTAINERS b/MAINTAINERS
index 30c327b..9660459 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -430,13 +430,10 @@ Heiko Schocher <hs@denx.de>
 	kmsupx5		MPC8321
 	mgcoge		MPC8247
 	mgcoge3ne	MPC8247
-	mgcoge2un	ARM926EJS (Kirkwood SoC)
 	mucmc52		MPC5200
 	muas3001	MPC8270
 	municse		MPC5200
 	sc3		PPC405GP
-	suen3		ARM926EJS (Kirkwood SoC)
-	suen8		ARM926EJS (Kirkwood SoC)
 	suvd3		MPC8321
 	tuda1		MPC8321
 	tuxa1		MPC8321
@@ -820,6 +817,9 @@ Jens Scharsig <esw@bus-elektronik.de>
 Heiko Schocher <hs@denx.de>
 
 	magnesium	i.MX27
+	mgcoge3un	ARM926EJS (Kirkwood SoC)
+	suen3		ARM926EJS (Kirkwood SoC)
+	suen8		ARM926EJS (Kirkwood SoC)
 
 Robert Schwebel <r.schwebel@pengutronix.de>
 
diff --git a/board/keymile/km_arm/kwbimage-memphis.cfg b/board/keymile/km_arm/kwbimage-memphis.cfg
new file mode 100644
index 0000000..2faaf2b
--- /dev/null
+++ b/board/keymile/km_arm/kwbimage-memphis.cfg
@@ -0,0 +1,197 @@
+#
+# (C) Copyright 2010
+# Heiko Schocher, DENX Software Engineering, hs at denx.de.
+#
+# (C) Copyright 2011
+# Valentin Longchamp, Keymile AG, valentin.longchamp at keymile.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM	spi	# Boot from SPI flash
+
+DATA 0xFFD10000 0x01112222	# MPP Control 0 Register
+# bit 3-0:   MPPSel0	2, NF_IO[2]
+# bit 7-4:   MPPSel1	2, NF_IO[3]
+# bit 12-8:  MPPSel2	2, NF_IO[4]
+# bit 15-12: MPPSel3	2, NF_IO[5]
+# bit 19-16: MPPSel4	1, NF_IO[6]
+# bit 23-20: MPPSel5	1, NF_IO[7]
+# bit 27-24: MPPSel6	1, SYSRST_O
+# bit 31-28: MPPSel7	0, GPO[7]
+
+DATA 0xFFD10004 0x03303300
+
+DATA 0xFFD10008 0x00001100	# MPP Control 2 Register
+# bit 3-0:   MPPSel16	0, GPIO[16]
+# bit 7-4:   MPPSel17	0, GPIO[17]
+# bit 12-8:  MPPSel18	1, NF_IO[0]
+# bit 15-12: MPPSel19	1, NF_IO[1]
+# bit 19-16: MPPSel20	0, GPIO[20]
+# bit 23-20: MPPSel21	0, GPIO[21]
+# bit 27-24: MPPSel22	0, GPIO[22]
+# bit 31-28: MPPSel23	0, GPIO[23]
+
+DATA 0xFFD100E0 0x1B1B1B1B	# IO Configuration 0 Register
+DATA 0xFFD20134 0x66666666	# L2 RAM Timing 0 Register
+DATA 0xFFD20138 0x66666666	# L2 RAM Timing 1 Register
+DATA 0xFFD20154 0x00000200	# CPU RAM Management Control3 Register
+DATA 0xFFD2014C 0x00001C00	# CPU RAM Management Control1 Register
+DATA 0xFFD20148 0x00000001	# CPU RAM Management Control0 Register
+
+#Dram initalization
+DATA 0xFFD01400 0x430004E0	# SDRAM Configuration Register
+# bit13-0:  0x4E0 (DDR2 clks refresh rate)
+# bit23-14: zero
+# bit24: 1= enable exit self refresh mode on DDR access
+# bit25: 1 required
+# bit29-26: zero
+# bit31-30: 01
+
+DATA 0xFFD01404 0x38543000	# DDR Controller Control Low
+# bit 3-0:  0 reserved
+# bit 4:    0=addr/cmd in smame cycle
+# bit 5:    0=clk is driven during self refresh, we don't care for APX
+# bit 6:    0=use recommended falling edge of clk for addr/cmd
+# bit14:    0=input buffer always powered up
+# bit18:    1=cpu lock transaction enabled
+# bit23-20: 5=recommended value for CL=4 and STARTBURST_DEL disabled bit31=0
+# bit27-24: 8= CL+4, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
+# bit30-28: 3 required
+# bit31:    0=no additional STARTBURST delay
+
+DATA 0xFFD01408 0x2302433E	# DDR Timing (Low) (active cycles value +1)
+# bit3-0:   TRAS lsbs
+# bit7-4:   TRCD
+# bit11- 8: TRP
+# bit15-12: TWR
+# bit19-16: TWTR
+# bit20:    TRAS msb
+# bit23-21: 0x0
+# bit27-24: TRRD
+# bit31-28: TRTP
+
+DATA 0xFFD0140C 0x00000A3E	#  DDR Timing (High)
+# bit6-0:   TRFC
+# bit8-7:   TR2R
+# bit10-9:  TR2W
+# bit12-11: TW2W
+# bit31-13: zero required
+
+DATA 0xFFD01410 0x00000001	#  DDR Address Control
+# bit1-0:   01, Cs0width=x16
+# bit3-2:   00, Cs0size=2Gb
+# bit5-4:   00, Cs2width=nonexistent
+# bit7-6:   00, Cs1size =nonexistent
+# bit9-8:   00, Cs2width=nonexistent
+# bit11-10: 00, Cs2size =nonexistent
+# bit13-12: 00, Cs3width=nonexistent
+# bit15-14: 00, Cs3size =nonexistent
+# bit16:    0,  Cs0AddrSel
+# bit17:    0,  Cs1AddrSel
+# bit18:    0,  Cs2AddrSel
+# bit19:    0,  Cs3AddrSel
+# bit31-20: 0 required
+
+DATA 0xFFD01414 0x00000000	#  DDR Open Pages Control
+# bit0:    0,  OpenPage enabled
+# bit31-1: 0 required
+
+DATA 0xFFD01418 0x00000000	#  DDR Operation
+# bit3-0:   0x0, DDR cmd
+# bit31-4:  0 required
+
+DATA 0xFFD0141C 0x00000652	#  DDR Mode
+DATA 0xFFD01420 0x00000006	#  DDR Extended Mode
+# bit0:    0,  DDR DLL enabled
+# bit1:    1,  DDR drive strenght reduced
+# bit2:    1,  DDR ODT control lsd disabled
+# bit5-3:  000, required
+# bit6:    0,  DDR ODT control msb disabled
+# bit9-7:  000, required
+# bit10:   0,  differential DQS enabled
+# bit11:   0, required
+# bit12:   0, DDR output buffer enabled
+# bit31-13: 0 required
+
+DATA 0xFFD01424 0x0000F17F	#  DDR Controller Control High
+# bit2-0:  111, required
+# bit3  :  1  , MBUS Burst Chop disabled
+# bit6-4:  111, required
+# bit7  :  0
+# bit8  :  1  , add a sample stage
+# bit9  :  0  , no half clock cycle addition to dataout
+# bit10 :  0  , 1/4 clock cycle skew enabled for addr/ctl signals
+# bit11 :  0  , 1/4 clock cycle skew disabled for write mesh
+# bit15-12: 1111 required
+# bit31-16: 0    required
+
+DATA 0xFFD01428 0x00084520	# DDR2 SDRAM Timing Low
+# bit3-0  : 0000, required
+# bit7-4  : 0010, M_ODT assertion 2 cycles after read
+# bit11-8 : 1001, M_ODT de-assertion 5 cycles after read
+# bit15-12: 0100, internal ODT assertion 4 cycles after read
+# bit19-16: 1000, internal ODT de-assertion 8 cycles after read
+# bit31-20: 0   , required
+
+DATA 0xFFD0147c 0x00008451	# DDR2 SDRAM Timing High
+# bit3-0  : 0001, M_ODT assertion same cycle as write
+# bit7-4  : 0101, M_ODT de-assertion x cycles after write
+# bit11-8 : 0100, internal ODT assertion x cycles after write
+# bit15-12: 1000, internal ODT de-assertion x cycles after write
+
+DATA 0xFFD01500 0x00000000	# CS[0]n Base address to 0x0
+DATA 0xFFD01504 0x0FFFFFF1	# CS[0]n Size
+# bit0:    1,  Window enabled
+# bit1:    0,  Write Protect disabled
+# bit3-2:  00, CS0 hit selected
+# bit23-4: ones, required
+# bit31-24: 0x0F, Size (i.e. 256MB)
+
+DATA 0xFFD0150C 0x00000000	# CS[1]n Size, window disabled
+DATA 0xFFD01514 0x00000000	# CS[2]n Size, window disabled
+DATA 0xFFD0151C 0x00000000	# CS[3]n Size, window disabled
+
+DATA 0xFFD01494 0x00010000	#  DDR ODT Control (Low)
+# bit3-0:  0, ODT0Rd, MODT[0] not asserted during read from DRAM CS0
+# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
+
+DATA 0xFFD01498 0x00000000	#  DDR ODT Control (High)
+# bit1-0:  00, ODT0 controlled by ODT Control (low) register above
+# bit3-2:  00, ODT1 controlled by register
+# bit31-4: zero, required
+
+DATA 0xFFD0149C 0x0000F801	# CPU ODT Control
+# bit3-0:  1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
+# bit7-4:  0, ODT0Wr, Internal ODT not asserted during write to DRAM bank0
+# bit9-8:  0, ODTEn, controlled by ODT0Rd and ODT0Wr
+# bit11-10:2, DQ_ODTSel. ODT select turned on, 75 ohm
+# bit13-12:3, STARTBURST ODT buffer selected, 50 ohm
+# bit14   :1, STARTBURST ODT enabled
+# bit15   :1, Use ODT Block
+
+DATA 0xFFD01480 0x00000001	# DDR Initialization Control
+# bit0=1, enable DDR init upon this register write
+
+# End of Header extension
+DATA 0x0 0x0
diff --git a/boards.cfg b/boards.cfg
index ced8788..ea5a850 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -108,7 +108,7 @@ davinci_sffsdr               arm         arm926ejs   sffsdr              davinci
 davinci_sonata               arm         arm926ejs   sonata              davinci        davinci
 suen3                        arm         arm926ejs   km_arm              keymile        kirkwood
 suen8                        arm         arm926ejs   km_arm              keymile        kirkwood
-mgcoge2un                    arm         arm926ejs   km_arm              keymile        kirkwood
+mgcoge3un                    arm         arm926ejs   km_arm              keymile        kirkwood
 guruplug                     arm         arm926ejs   -                   Marvell        kirkwood
 mv88f6281gtw_ge              arm         arm926ejs   -                   Marvell        kirkwood
 openrd_base                  arm         arm926ejs   openrd              Marvell        kirkwood        openrd:BOARD_IS_OPENRD_BASE
diff --git a/include/configs/mgcoge2un.h b/include/configs/mgcoge3un.h
similarity index 81%
rename from include/configs/mgcoge2un.h
rename to include/configs/mgcoge3un.h
index 4e2a774..22d1961 100644
--- a/include/configs/mgcoge2un.h
+++ b/include/configs/mgcoge3un.h
@@ -31,8 +31,8 @@
 /* for linking errors see
  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html */
 
-#ifndef _CONFIG_MGCOGE2UN_H
-#define _CONFIG_MGCOGE2UN_H
+#ifndef _CONFIG_MGCOGE3UN_H
+#define _CONFIG_MGCOGE3UN_H
 
 /* include common defines/options for all arm based Keymile boards */
 #include "km/km_arm.h"
@@ -40,11 +40,14 @@
 /*
  * Version number information
  */
-#define CONFIG_IDENT_STRING	"\nKeymile MGCOGE2UN"
-
-#define CONFIG_HOSTNAME			mgcoge2un
+#define CONFIG_IDENT_STRING	"\nKeymile MGCOGE3UN"
+#define CONFIG_HOSTNAME		mgcoge3un
+#define CONFIG_MGCOGE3UN
 
 #define KM_IVM_BUS	"pca9547:70:9" /* I2C2 (Mux-Port 1)*/
 #define KM_ENV_BUS	"pca9547:70:d" /* I2C2 (Mux-Port 5)*/
 
-#endif /* _CONFIG_MGCOGE2UN_H */
+/* we use a new RAM type on mgcoge3un board */
+#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
+
+#endif /* _CONFIG_MGCOGE3UN_H */
-- 
1.7.0.5

[U-Boot] [PATCH v3 rebase 7/8] mvgbe: enable configurability of PORT_SERIAL_CONTROL_VALUE

[Valentin Longchamp]

This allows this configuration to be defined differently for some
boards that request it.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
 drivers/net/mvgbe.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/net/mvgbe.h b/drivers/net/mvgbe.h
index 3de98d0..d8a5429 100644
--- a/drivers/net/mvgbe.h
+++ b/drivers/net/mvgbe.h
@@ -84,6 +84,7 @@
 	MVGBE_TX_BURST_SIZE_16_64BIT)
 
 /* Default port serial control value */
+#ifndef PORT_SERIAL_CONTROL_VALUE
 #define PORT_SERIAL_CONTROL_VALUE		( \
 	MVGBE_FORCE_LINK_PASS			| \
 	MVGBE_DIS_AUTO_NEG_FOR_DUPLX		| \
@@ -101,6 +102,7 @@
 	MVGBE_CLR_EXT_LOOPBACK			| \
 	MVGBE_SET_FULL_DUPLEX_MODE		| \
 	MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX)
+#endif
 
 /* Tx WRR confoguration macros */
 #define PORT_MAX_TRAN_UNIT	0x24	/* MTU register (default) 9KByte */
-- 
1.7.0.5

[U-Boot] [PATCH v3 rebase 8/8] arm/km: update mgcoge3un board support

[Valentin Longchamp]

From: Holger Brunck <holger.brunck@keymile.com>

We change default settings for egiga on mgcoge3un.
The reason we need this is that we have the gig port on mgcoge3un
connected using a back-to-back pair of PHYs. There are no magnetics and
because of that the port has to be run with a fixd configuration and
auto-negotiation must be disabled. In the default mode the egiga driver
uses autoneg to determine port speed - which defaults to 1G (we need
100M full duplex).

Add wait for the GPIO line connected to mgcoge3ne before
starting mgcoge3un. A board specific ethernet present function
was added, because on this board ethernet is always present.
The BOCO FPGA access was enhanced and changed to use register
definitions.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
---
 board/keymile/km_arm/km_arm.c |   80 +++++++++++++++++++++++++++++++++-------
 include/configs/mgcoge3un.h   |   25 +++++++++++++
 2 files changed, 91 insertions(+), 14 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 4049a4e..d86acc9 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -41,6 +41,16 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/*
+ * BOCO FPGA definitions
+ */
+#define BOCO		0x10
+#define REG_CTRL_H		0x02
+#define MASK_WRL_UNITRUN	0x01
+#define MASK_RBX_PGY_PRESENT	0x40
+#define REG_IRQ_CIRQ2		0x2d
+#define MASK_RBI_DEFECT_16	0x01
+
 /* Multi-Purpose Pins Functionality configuration */
 u32 kwmpp_config[] = {
 	MPP0_NF_IO2,
@@ -102,43 +112,64 @@ u32 kwmpp_config[] = {
 	0
 };
 
+#if defined(CONFIG_MGCOGE3UN)
+/*
+ * Wait for startup OK from mgcoge3ne
+ */
+int startup_allowed(void)
+{
+	unsigned char buf;
+
+	/*
+	 * Read CIRQ16 bit (bit 0)
+	 */
+	if (i2c_read(BOCO, REG_IRQ_CIRQ2, 1, &buf, 1) != 0)
+		printf("%s: Error reading Boco\n", __func__);
+	else
+		if ((buf & MASK_RBI_DEFECT_16) == MASK_RBI_DEFECT_16)
+			return 1;
+	return 0;
+}
+
+/*
+ * mgcoge3un has always ethernet present. Its connected to the 6061 switch
+ * and provides ICNev and piggy4 connections.
+ */
+int ethernet_present(void)
+{
+	return 1;
+}
+#else
 int ethernet_present(void)
 {
 	uchar	buf;
 	int	ret = 0;
 
-	if (i2c_read(0x10, 2, 1, &buf, 1) != 0) {
+	if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
 		printf("%s: Error reading Boco\n", __func__);
 		return -1;
 	}
-	if ((buf & 0x40) == 0x40)
+	if ((buf & MASK_RBX_PGY_PRESENT) == MASK_RBX_PGY_PRESENT)
 		ret = 1;
 
 	return ret;
 }
+#endif
 
 int initialize_unit_leds(void)
 {
 	/*
-	 * init the unit LEDs
-	 * per default they all are
+	 * Init the unit LEDs per default they all are
 	 * ok apart from bootstat
-	 * LED connected through BOCO
-	 * BOCO	lies at the address  0x10
-	 * LEDs are in the block CTRL_H	(addr 0x02)
-	 * BOOTSTAT LED is the first 0x01
 	 */
-	#define BOCO        0x10
-	#define CTRL_H      0x02
-	#define APPLEDMASK  0x01
 	uchar buf;
 
-	if (i2c_read(BOCO, CTRL_H, 1, &buf, 1) != 0) {
+	if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
 		printf("%s: Error reading Boco\n", __func__);
 		return -1;
 	}
-	buf |= APPLEDMASK;
-	if (i2c_write(BOCO, CTRL_H, 1, &buf, 1) != 0) {
+	buf |= MASK_WRL_UNITRUN;
+	if (i2c_write(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
 		printf("%s: Error writing Boco\n", __func__);
 		return -1;
 	}
@@ -167,6 +198,27 @@ int misc_init_r(void)
 		printf("Overwriting MACH_TYPE with %d!!!\n", mach_type);
 		gd->bd->bi_arch_number = mach_type;
 	}
+#if defined(CONFIG_MGCOGE3UN)
+	char *wait_for_ne;
+	wait_for_ne = getenv("waitforne");
+	if (wait_for_ne != NULL) {
+		if (strcmp(wait_for_ne, "true") == 0) {
+			int cnt = 0;
+			puts("NE go: ");
+			while (startup_allowed() == 0) {
+				udelay(200000);
+				cnt++;
+				if (cnt == 5)
+					puts("wait\b\b\b\b");
+				if (cnt == 10) {
+					cnt = 0;
+					puts("    \b\b\b\b");
+				}
+			}
+			puts("OK\n");
+		}
+	}
+#endif
 
 	initialize_unit_leds();
 	set_km_env();
diff --git a/include/configs/mgcoge3un.h b/include/configs/mgcoge3un.h
index 22d1961..6d56d7d 100644
--- a/include/configs/mgcoge3un.h
+++ b/include/configs/mgcoge3un.h
@@ -50,4 +50,29 @@
 /* we use a new RAM type on mgcoge3un board */
 #define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
 
+/*
+ * mgcoge3un has a fixed link to the marvell switch
+ * with 100MB full duplex and autoneg off, for this
+ * reason we have to change the default settings
+ */
+#define PORT_SERIAL_CONTROL_VALUE		( \
+	MVGBE_FORCE_LINK_PASS			| \
+	MVGBE_DIS_AUTO_NEG_FOR_DUPLX		| \
+	MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL	| \
+	MVGBE_ADV_NO_FLOW_CTRL			| \
+	MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX	| \
+	MVGBE_FORCE_BP_MODE_NO_JAM		| \
+	(1 << 9) /* Reserved bit has to be 1 */	| \
+	MVGBE_DO_NOT_FORCE_LINK_FAIL		| \
+	MVGBE_DIS_AUTO_NEG_SPEED_GMII		| \
+	MVGBE_DTE_ADV_0				| \
+	MVGBE_MIIPHY_MAC_MODE			| \
+	MVGBE_AUTO_NEG_NO_CHANGE		| \
+	MVGBE_MAX_RX_PACKET_1552BYTE		| \
+	MVGBE_CLR_EXT_LOOPBACK			| \
+	MVGBE_SET_FULL_DUPLEX_MODE		| \
+	MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX	|\
+	MVGBE_SET_GMII_SPEED_TO_10_100	|\
+	MVGBE_SET_MII_SPEED_TO_100)
+
 #endif /* _CONFIG_MGCOGE3UN_H */
-- 
1.7.0.5

[U-Boot] [PATCH v3 rebase 0/8] keymile arm boards update, part 2

[Albert ARIBAUD]

Hi Valentin,

Le 31/05/2011 14:12, Valentin Longchamp a ?crit :
> This series is the second effort of merging the Keymile boards support
> back into mainline.
>
> This series is a subset of the first patch series:
> http://lists.denx.de/pipermail/u-boot/2011-April/090013.html
> The first large series was split up to three independent series, which
> are easier to review and apply for the custodians.
>
> This series adds the km_arm specific parts of the series. All its changes
> concern our marvell based boards and that's why it should go through the
> u-boot-marvell git tree.
>
> Changes for v3: taken Prafulla's comments into account
> Changes for v3 rebase: rebased on current u-boot-arm


In the future, even for a rebase, please bump up the version numbering, 
i.e. here you should have made a V4 that would have been the rebase of 
V3. However, I'll take it as it is now because we're rather near the 
release and I don't want to delay it any further. So:

Applied to u-boot-arm/master, thanks.

Amicalement,
-- 
Albert.