All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Deepak, M" <m.deepak@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 3/3] drm/i915: Use the ceil value for the additional clk divider
Date: Fri, 4 Dec 2015 16:59:26 +0000	[thread overview]
Message-ID: <FA3CAD94929FEF4DA47A7BF98D8EC0F510D42A0C@BGSMSX104.gar.corp.intel.com> (raw)
In-Reply-To: <20151204115157.GQ4437@intel.com>



> -----Original Message-----
> From: Ville Syrjälä [mailto:ville.syrjala@linux.intel.com]
> Sent: Friday, December 4, 2015 5:22 PM
> To: Deepak, M <m.deepak@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915: Use the ceil value for the
> additional clk divider
> 
> On Fri, Dec 04, 2015 at 07:47:39PM +0530, Deepak M wrote:
> > Additional clock value divider should use the ceil value of the
> > calulation to get the correct divider value.
> >
> > Signed-off-by: Deepak M <m.deepak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dsi_pll.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c
> > b/drivers/gpu/drm/i915/intel_dsi_pll.c
> > index cb3cf39..1322a71 100644
> > --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> > +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> > @@ -454,7 +454,7 @@ static void bxt_dsi_program_clocks(struct
> drm_device *dev, enum port port)
> >  	dsi_rate = (BXT_REF_CLOCK_KHZ * pll_ratio) / 2;
> >
> >  	/* Max possible output of clock is 39.5 MHz, program value -1 */
> > -	divider = (dsi_rate / BXT_MAX_VAR_OUTPUT_KHZ) - 1;
> > +	divider = DIV_ROUND_UP(dsi_rate, BXT_MAX_VAR_OUTPUT_KHZ) -
> 1;
> 
> I can't find anything to support the 39.5 MHz claim above. I do know the tx
> escape clock should be <=20Mhz, so with the /2 extra divider it seems we
> should aim for <=40Mhz here. So yes, round up does make sense, but it
> seems to me that BXT_MAX_VAR_OUTPUT_KHZ should be 40 MHz.
> 
[Deepak, M] Yes, thought about it and me too feel that it should be 40 MHz.  We locally have tried with 2 different MIPI panels with 39.5 Mhz and didn't see any issue. I will confirm with SV teams and will update the patch accordingly. Thanks for pointing it :)

> >  	tmp |= BXT_MIPI_ESCLK_VAR_DIV(port, divider);
> >
> >  	/*
> > --
> > 1.9.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Ville Syrjälä
> Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-12-04 16:59 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-04 14:17 [PATCH 1/3] drm/i915: Add DPI FIFO empty status check Deepak M
2015-12-04  9:49 ` Ville Syrjälä
2015-12-04  9:55   ` Deepak, M
2015-12-04 16:11   ` [PATCH] " Deepak M
2015-12-04 11:26     ` Ville Syrjälä
2015-12-09 11:35       ` Deepak M
2015-12-09 14:34         ` Ville Syrjälä
2015-12-10  9:08           ` Daniel Vetter
2016-01-22  8:31           ` Jani Nikula
2015-12-04 14:17 ` [PATCH 2/3] drm/i915: Correct the Ref clock value for BXT Deepak M
2015-12-04  9:55   ` Ville Syrjälä
2015-12-04 16:22     ` Daniel Vetter
2015-12-04 16:25       ` Deepak, M
2015-12-04 17:20         ` Ville Syrjälä
2015-12-04 14:17 ` [PATCH 3/3] drm/i915: Use the ceil value for the additional clk divider Deepak M
2015-12-04 11:51   ` Ville Syrjälä
2015-12-04 16:59     ` Deepak, M [this message]
2016-01-20 11:06 ` [PATCH 1/3] drm/i915: Add DPI FIFO empty status check Mika Kahola

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=FA3CAD94929FEF4DA47A7BF98D8EC0F510D42A0C@BGSMSX104.gar.corp.intel.com \
    --to=m.deepak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.