[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Goldschmidt Simon]

Hi Clement,

> Did you also test the saveenv and sf unlock ?

Not yet.

> Did you get some strange behaviors after a "warm reboot" from linux ?

Unfortunately, I'm not that far, yet. My Linux image only uses the sd-card for now.

Regards,
Simon

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Clément Péron]

Hi,

My issue is with the eMMC after the boot from linux 3.12 and a warm reboot.
The eMMC is stuck in an infinite loop after CMD8 small trace of the
eMMC cmds sent:

Sending CMD0
Sending CMD8
dwmci_send_cmd: Response Timeout.
Sending CMD55
dwmci_send_cmd: Response Timeout.
Sending CMD0
Sending CMD1
Sending CMD1
Sending CMD0
Sending CMD1
Sending CMD1
Sending CMD2
Sending CMD3
Sending CMD9
Sending CMD7
Sending CMD8

Not sure is someone got the same behavior but i rollback to the
Socfpga v2013.01.01 and everything is fine.

I would investigate more later.

Regards,
Clement


2017-09-29 11:23 GMT+02:00 Goldschmidt Simon
<sgoldschmidt@de.pepperl-fuchs.com>:
> Hi Clement,
>
>> Did you also test the saveenv and sf unlock ?
>
> Not yet.
>
>> Did you get some strange behaviors after a "warm reboot" from linux ?
>
> Unfortunately, I'm not that far, yet. My Linux image only uses the sd-card for now.
>
> Regards,
> Simon
>

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Goldschmidt Simon]

Hi Clémént,

> Did you also test the saveenv and sf unlock ?

I did test saveenv and it works. I did not test sf protection.

> Did you get some strange behaviors after a "warm reboot" from linux ?

Indeed, warm reboot fails. When rebooting via "reboot" command from
linux, the last thing I see is SPL writing "Trying to boot from SPI".

I haven't been able to debug this further, yet.

Also, I still can't sf read without disabling the data cache :-(

Regards,
Simon

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Hannes Schmelzer]

Clément Péron wrote:
Hi,

> Did you get some strange behaviors after a "warm reboot" from linux ?
> A week that i'm using a new u-boot but i catch some strange behavior
> after a reboot from linux.

there may some issue since linux can set the flash into another (4byte)
addressing mode which can cause trouble if u-boot try read with the
standard adressing mode (3byte).

i've seen on some hardware platforms that there is a reset signal wired to
the flash which resets this addressing mode setting on warm restart.

>
> Regards,
> Clement

cheers,
Hannes

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Clément Péron]

Hi Simon,

> Disable the data cache tooI change the "compatible" string of the flash chip
from "n25q00" to "spi-flash".
Yes, missed to mention these steps.

Did you also test the saveenv and sf unlock ?

Did you get some strange behaviors after a "warm reboot" from linux ?
A week that i'm using a new u-boot but i catch some strange behavior
after a reboot from linux.

Regards,
Clement

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Goldschmidt Simon]

On 09/27/2017 06:54 AM, Hannes Schmelzer wrote:
> On 09/22/2017 02:20 PM, Clément Péron wrote:
>> Sorry these are my local commits you can find them here :
>>
>> https://patchwork.ozlabs.org/patch/765992/
>> https://patchwork.ozlabs.org/patch/765996/
>> https://patchwork.ozlabs.org/patch/765997/
>> https://patchwork.ozlabs.org/patch/765998/
> Hi,
> just tested this on my cyclone5 board, but unfortunately without success.
> 
> ---
> U-Boot SPL 2017.09-00354-g824def8 (Sep 27 2017 - 06:47:19)
> (....)
> Hit any key to stop autoboot:  0
> => sf probe
> SF: Detected n25q512 with page size 256 Bytes, erase size 64 KiB, total
> 64 MiB
> ### ERROR ### Please RESET the board ###
> ----
> 
> same behavior as before.

Have you compared your dts to the other socfpga_cyclone5_*.dts files?

I have tested this on the socrates board and it would also give me the
above error until I change the "compatible" string of the flash chip
from "n25q00" to "spi-flash".

Without that, the sf code seems to try to use the first child node as
flash chip which results in a divide-by-zero error because it passes a
frequency of 0 Hz to the set_speed callback of the qspi driver, which
it is not prepared to handle:

If cadence_qspi_apb_config_baudrate_div is called with sclk_hz == 0,
the DIV_ROUND_UP macro fails to check the denominator for zero.

I wonder where this should be fixed: in the core sf code or in this
driver...

Regards,
Simon

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Goldschmidt Simon]

On 09/22/2017 02:20 PM, Clément Péron wrote:
> Sorry these are my local commits you can find them here :
> 
> https://patchwork.ozlabs.org/patch/765992/
> https://patchwork.ozlabs.org/patch/765996/
> https://patchwork.ozlabs.org/patch/765997/
> https://patchwork.ozlabs.org/patch/765998/

Tested on socfpga_cyclone5_socrates by applying these 4 patches to
2017.09. Works as expected.
I had to disable the data cache to actually get the data from qspi to
ram, but that's a totally different issue.

Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

As I'm rather new to this list and project, when can we expect to have
this patch committed?

Regards,
Simon

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Hannes Schmelzer]

On 09/22/2017 02:20 PM, Clément Péron wrote:
> Sorry these are my local commits you can find them here :
>
> https://patchwork.ozlabs.org/patch/765992/
> https://patchwork.ozlabs.org/patch/765996/
> https://patchwork.ozlabs.org/patch/765997/
> https://patchwork.ozlabs.org/patch/765998/
Hi,
just tested this on my cyclone5 board, but unfortunately without success.

---
U-Boot SPL 2017.09-00354-g824def8 (Sep 27 2017 - 06:47:19)
(....)
Hit any key to stop autoboot:  0
=> sf probe
SF: Detected n25q512 with page size 256 Bytes, erase size 64 KiB, total 
64 MiB
### ERROR ### Please RESET the board ###
----

same behavior as before.

But the good news are, that a colleague of mine successfully brought up 
a custom board with this patch.
Prior he had trouble in SPL accessing the flash.

I will poke him to give some "tested-by" credits on this.

cheers,
Hannes

>
> 2017-09-22 14:12 GMT+02:00 Clément Péron <peron.clem@gmail.com>:
>> Hi,
>>
>> I got also somme issue with my QSPI on CycmoneV and u-boot 2017.07
>> I cherry-picked commits from  Jason Rush :
>> b90ce1c29023abe730d2b4174294bdc09acef3e0
>> 836a0278476be94c95ff084f81c2302fc5c0265c
>> b0eac7e0d1e4817388543b58d30b322d0bac49a8
>>
>> Also i forgot to put the
>> "u-boot,dm-pre-reloc;" in my device tree in the qspi node.
>>
>> Now my QSPI is working fine except the sf unlock / lock
>> I have remove the "clear BP# bits" in the mtd/spi/spi_flash.c
>>
>> Hope this can help you
>>
>> Regards,
>> Clement
>>
>> 2017-09-06 8:10 GMT+02:00 Hannes Schmelzer <hannes@schmelzer.or.at>:
>>> Hi Jagan,
>>>
>>>
>>> On 09/04/2017 08:22 AM, Hannes Schmelzer wrote:
>>>> "U-Boot" <u-boot-bounces@lists.denx.de> schrieb am 01.09.2017 16:39:03:
>>>> <hannes@schmelzer.or.at> wrote:
>>>>>> Hi Eldor,
>>>>>>
>>>>>> just found your post in the mailinglist.
>>>>>>
>>>>>> https://lists.denx.de/pipermail/u-boot/2016-December/276491.html
>>>>>>
>>>>>> Reason why i'm searched there is, that i've now excactly same problem
>>>> as
>>>>>> you.
>>>>> Can you give some details, issue came-up while 'sf probe' or 'sf read' ?
>>>> Hi Jagan,
>>>> please have a look into the weblink to the denx mailing list server.
>>>> I have basically same trouble as eldor reported the days ago.
>>>>
>>>> A simple 'sf probe' ends up in a
>>>> ### ERROR ### Please RESET the board ###
>>>> Interesting detail is, that the information about the flash (type, size,
>>>> ...) is printed out quite before the "hang".
>>>>
>>>> On wednesday i have the next time-slot to access the socfpga devkit board.
>>>> So i could bring in more details if necessary.
>>> as told few days ago, i've now again access to my socfpga devkit board.
>>> Here comes the console output:
>>>
>>> ---
>>> U-Boot SPL 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35)
>>> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Preparing to
>>> start memory calibration
>>> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: CALIBRATION
>>> PASSED
>>> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Calibration
>>> complete
>>> Trying to boot from MMC1
>>> spl: partition error
>>>
>>>
>>> U-Boot 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35 +0200)
>>>
>>> CPU:   Altera SoCFPGA Platform
>>> FPGA:  Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0
>>> BOOT:  SD/MMC Internal Transceiver (3.0V)
>>>         Watchdog enabled
>>> I2C:   ready
>>> DRAM:  1 GiB
>>> MMC:   dwmmc0 at ff704000: 0
>>> *** Warning - bad CRC, using default environment
>>>
>>> In:    serial
>>> Out:   serial
>>> Err:   serial
>>> Model: Altera SOCFPGA Cyclone V SoC Development Kit
>>> Net:
>>> Error: ethernet at ff702000 address not set.
>>> No ethernet found.
>>> Hit any key to stop autoboot:  0
>>> => sf probe
>>> SF: Detected n25q512 with page size 256 Bytes, erase size 64 KiB, total 64
>>> MiB
>>> ### ERROR ### Please RESET the board ###
>>> ----
>>>
>>> Afterwards the board does some reset (about 20sec. later).
>>>
>>>
>>> cheers,
>>> Hannes
>>> _______________________________________________
>>> U-Boot mailing list
>>> U-Boot at lists.denx.de
>>> https://lists.denx.de/listinfo/u-boot
>

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Clément Péron]

Sorry these are my local commits you can find them here :

https://patchwork.ozlabs.org/patch/765992/
https://patchwork.ozlabs.org/patch/765996/
https://patchwork.ozlabs.org/patch/765997/
https://patchwork.ozlabs.org/patch/765998/

2017-09-22 14:12 GMT+02:00 Clément Péron <peron.clem@gmail.com>:
> Hi,
>
> I got also somme issue with my QSPI on CycmoneV and u-boot 2017.07
> I cherry-picked commits from  Jason Rush :
> b90ce1c29023abe730d2b4174294bdc09acef3e0
> 836a0278476be94c95ff084f81c2302fc5c0265c
> b0eac7e0d1e4817388543b58d30b322d0bac49a8
>
> Also i forgot to put the
> "u-boot,dm-pre-reloc;" in my device tree in the qspi node.
>
> Now my QSPI is working fine except the sf unlock / lock
> I have remove the "clear BP# bits" in the mtd/spi/spi_flash.c
>
> Hope this can help you
>
> Regards,
> Clement
>
> 2017-09-06 8:10 GMT+02:00 Hannes Schmelzer <hannes@schmelzer.or.at>:
>> Hi Jagan,
>>
>>
>> On 09/04/2017 08:22 AM, Hannes Schmelzer wrote:
>>>
>>> "U-Boot" <u-boot-bounces@lists.denx.de> schrieb am 01.09.2017 16:39:03:
>>> <hannes@schmelzer.or.at> wrote:
>>>>>
>>>>> Hi Eldor,
>>>>>
>>>>> just found your post in the mailinglist.
>>>>>
>>>>> https://lists.denx.de/pipermail/u-boot/2016-December/276491.html
>>>>>
>>>>> Reason why i'm searched there is, that i've now excactly same problem
>>>
>>> as
>>>>>
>>>>> you.
>>>>
>>>> Can you give some details, issue came-up while 'sf probe' or 'sf read' ?
>>>
>>> Hi Jagan,
>>> please have a look into the weblink to the denx mailing list server.
>>> I have basically same trouble as eldor reported the days ago.
>>>
>>> A simple 'sf probe' ends up in a
>>> ### ERROR ### Please RESET the board ###
>>> Interesting detail is, that the information about the flash (type, size,
>>> ...) is printed out quite before the "hang".
>>>
>>> On wednesday i have the next time-slot to access the socfpga devkit board.
>>> So i could bring in more details if necessary.
>>
>> as told few days ago, i've now again access to my socfpga devkit board.
>> Here comes the console output:
>>
>> ---
>> U-Boot SPL 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35)
>> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Preparing to
>> start memory calibration
>> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: CALIBRATION
>> PASSED
>> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Calibration
>> complete
>> Trying to boot from MMC1
>> spl: partition error
>>
>>
>> U-Boot 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35 +0200)
>>
>> CPU:   Altera SoCFPGA Platform
>> FPGA:  Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0
>> BOOT:  SD/MMC Internal Transceiver (3.0V)
>>        Watchdog enabled
>> I2C:   ready
>> DRAM:  1 GiB
>> MMC:   dwmmc0 at ff704000: 0
>> *** Warning - bad CRC, using default environment
>>
>> In:    serial
>> Out:   serial
>> Err:   serial
>> Model: Altera SOCFPGA Cyclone V SoC Development Kit
>> Net:
>> Error: ethernet at ff702000 address not set.
>> No ethernet found.
>> Hit any key to stop autoboot:  0
>> => sf probe
>> SF: Detected n25q512 with page size 256 Bytes, erase size 64 KiB, total 64
>> MiB
>> ### ERROR ### Please RESET the board ###
>> ----
>>
>> Afterwards the board does some reset (about 20sec. later).
>>
>>
>> cheers,
>> Hannes
>> _______________________________________________
>> U-Boot mailing list
>> U-Boot at lists.denx.de
>> https://lists.denx.de/listinfo/u-boot

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Clément Péron]

Hi,

I got also somme issue with my QSPI on CycmoneV and u-boot 2017.07
I cherry-picked commits from  Jason Rush :
b90ce1c29023abe730d2b4174294bdc09acef3e0
836a0278476be94c95ff084f81c2302fc5c0265c
b0eac7e0d1e4817388543b58d30b322d0bac49a8

Also i forgot to put the
"u-boot,dm-pre-reloc;" in my device tree in the qspi node.

Now my QSPI is working fine except the sf unlock / lock
I have remove the "clear BP# bits" in the mtd/spi/spi_flash.c

Hope this can help you

Regards,
Clement

2017-09-06 8:10 GMT+02:00 Hannes Schmelzer <hannes@schmelzer.or.at>:
> Hi Jagan,
>
>
> On 09/04/2017 08:22 AM, Hannes Schmelzer wrote:
>>
>> "U-Boot" <u-boot-bounces@lists.denx.de> schrieb am 01.09.2017 16:39:03:
>> <hannes@schmelzer.or.at> wrote:
>>>>
>>>> Hi Eldor,
>>>>
>>>> just found your post in the mailinglist.
>>>>
>>>> https://lists.denx.de/pipermail/u-boot/2016-December/276491.html
>>>>
>>>> Reason why i'm searched there is, that i've now excactly same problem
>>
>> as
>>>>
>>>> you.
>>>
>>> Can you give some details, issue came-up while 'sf probe' or 'sf read' ?
>>
>> Hi Jagan,
>> please have a look into the weblink to the denx mailing list server.
>> I have basically same trouble as eldor reported the days ago.
>>
>> A simple 'sf probe' ends up in a
>> ### ERROR ### Please RESET the board ###
>> Interesting detail is, that the information about the flash (type, size,
>> ...) is printed out quite before the "hang".
>>
>> On wednesday i have the next time-slot to access the socfpga devkit board.
>> So i could bring in more details if necessary.
>
> as told few days ago, i've now again access to my socfpga devkit board.
> Here comes the console output:
>
> ---
> U-Boot SPL 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35)
> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Preparing to
> start memory calibration
> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: CALIBRATION
> PASSED
> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Calibration
> complete
> Trying to boot from MMC1
> spl: partition error
>
>
> U-Boot 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35 +0200)
>
> CPU:   Altera SoCFPGA Platform
> FPGA:  Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0
> BOOT:  SD/MMC Internal Transceiver (3.0V)
>        Watchdog enabled
> I2C:   ready
> DRAM:  1 GiB
> MMC:   dwmmc0 at ff704000: 0
> *** Warning - bad CRC, using default environment
>
> In:    serial
> Out:   serial
> Err:   serial
> Model: Altera SOCFPGA Cyclone V SoC Development Kit
> Net:
> Error: ethernet at ff702000 address not set.
> No ethernet found.
> Hit any key to stop autoboot:  0
> => sf probe
> SF: Detected n25q512 with page size 256 Bytes, erase size 64 KiB, total 64
> MiB
> ### ERROR ### Please RESET the board ###
> ----
>
> Afterwards the board does some reset (about 20sec. later).
>
>
> cheers,
> Hannes
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Hannes Schmelzer]

Hi Jagan,


On 09/04/2017 08:22 AM, Hannes Schmelzer wrote:
> "U-Boot" <u-boot-bounces@lists.denx.de> schrieb am 01.09.2017 16:39:03:
> <hannes@schmelzer.or.at> wrote:
>>> Hi Eldor,
>>>
>>> just found your post in the mailinglist.
>>>
>>> https://lists.denx.de/pipermail/u-boot/2016-December/276491.html
>>>
>>> Reason why i'm searched there is, that i've now excactly same problem
> as
>>> you.
>> Can you give some details, issue came-up while 'sf probe' or 'sf read' ?
> Hi Jagan,
> please have a look into the weblink to the denx mailing list server.
> I have basically same trouble as eldor reported the days ago.
>
> A simple 'sf probe' ends up in a
> ### ERROR ### Please RESET the board ###
> Interesting detail is, that the information about the flash (type, size,
> ...) is printed out quite before the "hang".
>
> On wednesday i have the next time-slot to access the socfpga devkit board.
> So i could bring in more details if necessary.
as told few days ago, i've now again access to my socfpga devkit board.
Here comes the console output:

---
U-Boot SPL 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35)
/home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Preparing 
to start memory calibration
/home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: CALIBRATION 
PASSED
/home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Calibration 
complete
Trying to boot from MMC1
spl: partition error


U-Boot 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35 +0200)

CPU:   Altera SoCFPGA Platform
FPGA:  Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0
BOOT:  SD/MMC Internal Transceiver (3.0V)
        Watchdog enabled
I2C:   ready
DRAM:  1 GiB
MMC:   dwmmc0 at ff704000: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Model: Altera SOCFPGA Cyclone V SoC Development Kit
Net:
Error: ethernet at ff702000 address not set.
No ethernet found.
Hit any key to stop autoboot:  0
=> sf probe
SF: Detected n25q512 with page size 256 Bytes, erase size 64 KiB, total 
64 MiB
### ERROR ### Please RESET the board ###
----

Afterwards the board does some reset (about 20sec. later).

cheers,
Hannes

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Hannes Schmelzer]

"U-Boot" <u-boot-bounces@lists.denx.de> schrieb am 01.09.2017 16:39:03:

> Von: Jagan Teki <jagannadh.teki@gmail.com>
> An: Hannes Schmelzer <hannes@schmelzer.or.at>
> Kopie: "u-boot at lists.denx.de >> u-boot" <u-boot@lists.denx.de>, 
er at systemsoft.no
> Datum: 01.09.2017 16:39
> Betreff: Re: [U-Boot] QSPI "sf probe ...", "sf read ..." on Altera SoC 
FPGA
> Gesendet von: "U-Boot" <u-boot-bounces@lists.denx.de>
> 
> On Fri, Sep 1, 2017 at 5:23 PM, Hannes Schmelzer 
<hannes@schmelzer.or.at> wrote:
> > Hi Eldor,
> >
> > just found your post in the mailinglist.
> >
> > https://lists.denx.de/pipermail/u-boot/2016-December/276491.html
> >
> > Reason why i'm searched there is, that i've now excactly same problem 
as
> > you.
> 
> Can you give some details, issue came-up while 'sf probe' or 'sf read' ?

Hi Jagan,
please have a look into the weblink to the denx mailing list server.
I have basically same trouble as eldor reported the days ago.

A simple 'sf probe' ends up in a 
### ERROR ### Please RESET the board ###
Interesting detail is, that the information about the flash (type, size, 
...) is printed out quite before the "hang".

On wednesday i have the next time-slot to access the socfpga devkit board.
So i could bring in more details if necessary.

> 
> thanks!
> -- 
> Jagan Teki

cheers,
Hannes