* [U-Boot-Users] u-boot for MPC8266-PCI board
@ 2003-07-25 9:36 Thomas Schäfer
0 siblings, 0 replies; 3+ messages in thread
From: Thomas Schäfer @ 2003-07-25 9:36 UTC (permalink / raw)
To: u-boot
Hi all,
I'm trying to run u-boot on our MPC8266-PCI board. I'm using the latest CVS
tree 0.4.5 from sourceforge. I found MPC8260ADS.h and MPC8266ADS.h in the
configs directory. Trying the MPC8266ADS configuration and starting it ends
with no console output at all. Trying the MPC8260ADS configuration with
CONFIG_ADSTYPE=CFG_8266ADS ends with a bus fault after some console outputs
(see below). What am I doing wrong?
U-Boot 0.4.5 (Jul 25 2003 - 11:18:40)
MPC8260 Reset Status: External Soft, External Hard
MPC8260 Clock Configuration
- Bus-to-Core Mult 3x, VCO Div 2, 60x Bus Freq 33-100, Core Freq 100-300
- dfbrg 1, corecnf 0x08, busdf 3, cpmdf 1, plldf 0, pllmf 1
- vco_out 266666664, scc_clk 66666666, brg_clk 16666666
- cpu_clk 199999998, cpm_clk 133333332, bus_clk 66666666
CPU: MPC8260 (HiP4 Rev 14, Mask A.0(A) 2K25A) at 199.999 MHz
Board: Motorola MPC8266ADS
I2C: ready
DRAM: 16 MB
FLASH: Bus Fault @ 0x00feac3c, fixup 0x00000000
Machine check in kernel mode.
Caused by (from msr): regs 00f71e10 Unknown values in msr
NIP: 00FEAC3C XER: 20000000 LR: 00FD6E94 REGS: 00f71e10 TRAP: 0200 DAR:
00000000MSR: 00003000 E?: 0 PR: 0 FP: 1 ME: 1 IR/DR: 00
GPR00: 00500092 00F71F00 04280112 00000000 00FD6E88 Bus Fault @ 0x00fe73d0,
fixup 0x00000000
Machine check in kernel mode.
Caused by (from msr): regs 00f71af8 Unknown values in msr
NIP: 00FE73D0 XER: 00000000 LR: 00FE7360 REGS: 00f71af8 TRAP: 0200 DAR:
00000000MSR: 00003000 EE: 0 PR: 0 FP: 1 ME: 1 IR/DR: 00
Any hints would be appreciated.
Best regards,
Thomas Sch?fer
____________________________________
GIGA STREAM GmbH
Konrad-Zuse-Str. 7
66115 Saarbr?cken
Tel.: + 49 (0)681 / 95916 - 203
Fax: + 49 (0)681 / 95916 - 100
E-mail: tschaefer at giga-stream.de
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot-Users] u-boot for MPC8266-PCI board
@ 2003-07-28 15:25 Thomas Schäfer
0 siblings, 0 replies; 3+ messages in thread
From: Thomas Schäfer @ 2003-07-28 15:25 UTC (permalink / raw)
To: u-boot
Rune and Yuli,
thank you for your replies. I tried out Rune's hints and found the board
resetting continously after initialization of the SDRAM. I enabled the debug
messages in the SDRAM initialization sequence and found the following memory
controller settings:
U-Boot 0.4.5 (Jul 28 2003 - 14:18:33)
MPC8260 Reset Status: External Soft, External Hard
MPC8260 Clock Configuration
- Bus-to-Core Mult 3x, VCO Div 2, 60x Bus Freq 33-100, Core Freq 100-300
- dfbrg 0, corecnf 0x08, busdf 3, cpmdf 1, plldf 0, pllmf 1
- vco_out 264000000, scc_clk 66000000, brg_clk 66000000
- cpu_clk 198000000, cpm_clk 132000000, bus_clk 66000000
CPU: MPC8260 (HiP4 Rev 14, Mask A.0(A) 2K25A) at 198 MHz
Board: Motorola MPC8266ADS
I2C: ready
DRAM:
memctl->memc_mptpr = 0x00001900
memctl->memc_psrt = 0x00000021
memctl->memc_br2 = 0x00000041
memctl->memc_or2 = 0xff001080
memctl->memc_psdmr = 0xeb6eb493
ramaddr = 0x00000008
memctl->memc_psdmr = 0xcb6eb493
memctl->memc_psdmr = 0xdb6eb493
memctl->memc_psdmr = 0xc36eb493
SDRAM configuration read from SPD
Size per side = 16MB
Organization: 1 sides, 2 banks, 9 Columns, 11 Rows, Data width = 64
bits
Refresh rate = 33, CAS latency = 3
Total size: 16 MB
In the u-boot-0.3.0 source tree I found that the memory controller was
programmed with hard-set values. Trying these values I found that u-boot
started to the prompt without problems. The settings are listed below:
U-Boot 0.4.5 (Jul 28 2003 - 16:44:07)
MPC8260 Reset Status: Software Watchdog, External Soft, External Hard
MPC8260 Clock Configuration
- Bus-to-Core Mult 3x, VCO Div 2, 60x Bus Freq 33-100, Core Freq 100-300
- dfbrg 0, corecnf 0x08, busdf 3, cpmdf 1, plldf 0, pllmf 1
- vco_out 264000000, scc_clk 66000000, brg_clk 66000000
- cpu_clk 198000000, cpm_clk 132000000, bus_clk 66000000
CPU: MPC8260 (HiP4 Rev 14, Mask A.0(A) 2K25A) at 198 MHz
Board: Motorola MPC8266ADS
I2C: ready
DRAM:
memctl->memc_mptpr = 0x00001900
memctl->memc_psrt = 0x00000021
memctl->memc_br2 = 0x00000041
memctl->memc_or2 = 0xff001080
memctl->memc_psdmr = 0x296eb452 <=> 0xeb6eb493
ramaddr = 0x00000008
memctl->memc_psdmr = 0x096eb452 <=> 0xcb6eb493
memctl->memc_psdmr = 0x196eb452 <=> 0xdb6eb493
memctl->memc_psdmr = 0x416eb452 <=> 0xc36eb493
SDRAM configuration read from SPD
Size per side = 16MB
Organization: 1 sides, 2 banks, 9 Columns, 11 Rows, Data width = 64
bits
Refresh rate = 33, CAS latency = 3
Total size: 16 MB
FLASH: 8 MB
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: FCC2 ETHERNET
Hit any key to stop autoboot
=>
Playing with the parameters I found that the problem is located in the SDAM
bits of the PSDMR register which have to be programmed for my board as shown
in the second setting. Any ideas?
I have another question according the CIP and BMS settings of the HRCW. They
are both set to '1' which means that exceptions are vectored to 0x000n_nnnn
and boot memory region is located at 0x0000_0000. I tried out to set those
bits to '0', it didn't work. Why?
Best regards,
Thomas Sch?fer
____________________________________
GIGA STREAM GmbH
Konrad-Zuse-Str. 7
66115 Saarbr?cken
Tel.: + 49 (0)681 / 95916 - 203
Fax: + 49 (0)681 / 95916 - 100
E-mail: tschaefer at giga-stream.de
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot-Users] u-boot for MPC8266-PCI board
@ 2003-07-25 18:01 Rune Torgersen
0 siblings, 0 replies; 3+ messages in thread
From: Rune Torgersen @ 2003-07-25 18:01 UTC (permalink / raw)
To: u-boot
First off.
The MPC8260ADS config files will not run on a MPC8266ADS.
Most likely culprit here (Remember seeing the same thing when dd ther
initial port) is that it hangs when trying to initialise the (nonexisting)
4MB og SDRAM on the local bus that the MPC8260 has, and the MPC8266 doesn't.
The reason the config file for the MPC8266ADS don't give any output is most
likely because it loads at adifferent initial configuration address. (See
top of include/configs/MPC8266ADS.h for details)
To get it to work the way it is; Write the whole image to the start of the
FLASH (on a board with JP3 in 2-3 position this is 0xFF800000). Then set JP3
in the 1-2 position. The flash start and boot at 0xFE000000.
> -----Original Message-----
> From: Thomas Sch?fer [mailto:tschaefer at giga-stream.de]
> Sent: Friday, July 25, 2003 04:37
> To: u-boot-users at lists.sourceforge.net
> Subject: [U-Boot-Users] u-boot for MPC8266-PCI board
>
>
> Hi all,
>
> I'm trying to run u-boot on our MPC8266-PCI board. I'm using
> the latest CVS tree 0.4.5 from sourceforge. I found
> MPC8260ADS.h and MPC8266ADS.h in the configs directory.
> Trying the MPC8266ADS configuration and starting it ends with
> no console output at all. Trying the MPC8260ADS configuration
> with CONFIG_ADSTYPE=CFG_8266ADS ends with a bus fault after
> some console outputs (see below). What am I doing wrong?
>
> U-Boot 0.4.5 (Jul 25 2003 - 11:18:40)
>
> MPC8260 Reset Status: External Soft, External Hard
>
> MPC8260 Clock Configuration
> - Bus-to-Core Mult 3x, VCO Div 2, 60x Bus Freq 33-100, Core
> Freq 100-300
> - dfbrg 1, corecnf 0x08, busdf 3, cpmdf 1, plldf 0, pllmf 1
> - vco_out 266666664, scc_clk 66666666, brg_clk 16666666
> - cpu_clk 199999998, cpm_clk 133333332, bus_clk 66666666
>
> CPU: MPC8260 (HiP4 Rev 14, Mask A.0(A) 2K25A) at 199.999 MHz
> Board: Motorola MPC8266ADS
> I2C: ready
> DRAM: 16 MB
> FLASH: Bus Fault @ 0x00feac3c, fixup 0x00000000
> Machine check in kernel mode.
> Caused by (from msr): regs 00f71e10 Unknown values in msr
> NIP: 00FEAC3C XER: 20000000 LR: 00FD6E94 REGS: 00f71e10 TRAP:
> 0200 DAR:
> 00000000MSR: 00003000 E?: 0 PR: 0 FP: 1 ME: 1 IR/DR: 00
>
> GPR00: 00500092 00F71F00 04280112 00000000 00FD6E88 Bus Fault
> @ 0x00fe73d0, fixup 0x00000000 Machine check in kernel mode.
> Caused by (from msr): regs 00f71af8 Unknown values in msr
> NIP: 00FE73D0 XER: 00000000 LR: 00FE7360 REGS: 00f71af8 TRAP:
> 0200 DAR:
> 00000000MSR: 00003000 EE: 0 PR: 0 FP: 1 ME: 1 IR/DR: 00
>
> Any hints would be appreciated.
>
> Best regards,
>
> Thomas Sch?fer
>
> ____________________________________
>
> GIGA STREAM GmbH
>
> Konrad-Zuse-Str. 7
> 66115 Saarbr?cken
>
> Tel.: + 49 (0)681 / 95916 - 203
> Fax: + 49 (0)681 / 95916 - 100
> E-mail: tschaefer at giga-stream.de
>
>
>
>
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_072303_01/01
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2003-07-25 9:36 [U-Boot-Users] u-boot for MPC8266-PCI board Thomas Schäfer
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2003-07-28 15:25 Thomas Schäfer
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