From: Z.q. Hou <zhiqiang.hou@nxp.com>
To: u-boot@lists.denx.de
Subject: [PATCHv3 15/15] configs: P2020RDB: Enable DM_ETH config
Date: Mon, 15 Jun 2020 08:51:52 +0000 [thread overview]
Message-ID: <HE1PR0402MB3371062137C9771B11BB70FC849C0@HE1PR0402MB3371.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <CA+h21hqE4X_-qaE=rxHjvn7=6xeFMPMk5UxydZL_XLzK76KVtg@mail.gmail.com>
Hi Vladimir,
Thanks a lot for your review!
Regards,
Zhiqiang
> -----Original Message-----
> From: Vladimir Oltean <olteanv@gmail.com>
> Sent: 2020?6?13? 4:17
> To: Z.q. Hou <zhiqiang.hou@nxp.com>
> Cc: u-boot <u-boot@lists.denx.de>; Priyanka Jain <priyanka.jain@nxp.com>;
> Bin Meng <bmeng.cn@gmail.com>
> Subject: Re: [PATCHv3 15/15] configs: P2020RDB: Enable DM_ETH config
>
> On Fri, 12 Jun 2020 at 18:23, Zhiqiang Hou <Zhiqiang.Hou@nxp.com> wrote:
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Enable the DM_ETH and DM_MDIO config.
> >
> > On P2020RDB, the eTSEC1 is connecting with a switch VSC7385, so also
> > enable the fixed PHY support.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
>
> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
>
> > V3:
> > - Rebase the patch, no change intended.
> >
> > configs/P2020RDB-PC_36BIT_NAND_defconfig | 3 +++
> > configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 3 +++
> > configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 3 +++
> > configs/P2020RDB-PC_36BIT_defconfig | 3 +++
> > configs/P2020RDB-PC_NAND_defconfig | 3 +++
> > configs/P2020RDB-PC_SDCARD_defconfig | 3 +++
> > configs/P2020RDB-PC_SPIFLASH_defconfig | 3 +++
> > configs/P2020RDB-PC_defconfig | 3 +++
> > 8 files changed, 24 insertions(+)
> >
> > diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig
> > b/configs/P2020RDB-PC_36BIT_NAND_defconfig
> > index 3e6ea64ee3..4cd689f55d 100644
> > --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
> > +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
> > @@ -66,6 +66,7 @@ CONFIG_SPI_FLASH=y
> > CONFIG_SF_DEFAULT_MODE=0
> > CONFIG_SF_DEFAULT_SPEED=10000000
> > CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> > CONFIG_PHY_ATHEROS=y
> > CONFIG_PHY_BROADCOM=y
> > CONFIG_PHY_DAVICOM=y
> > @@ -77,8 +78,10 @@ CONFIG_PHY_SMSC=y
> > CONFIG_PHY_VITESSE=y
> > CONFIG_PHY_GIGE=y
> > CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> > CONFIG_MII=y
> > CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> > CONFIG_DM_PCI=y
> > CONFIG_DM_PCI_COMPAT=y
> > CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> > b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> > index 187cbee0d6..f46463a297 100644
> > --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> > +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> > @@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y
> > CONFIG_SF_DEFAULT_MODE=0
> > CONFIG_SF_DEFAULT_SPEED=10000000
> > CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> > CONFIG_PHY_ATHEROS=y
> > CONFIG_PHY_BROADCOM=y
> > CONFIG_PHY_DAVICOM=y
> > @@ -72,8 +73,10 @@ CONFIG_PHY_SMSC=y
> > CONFIG_PHY_VITESSE=y
> > CONFIG_PHY_GIGE=y
> > CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> > CONFIG_MII=y
> > CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> > CONFIG_DM_PCI=y
> > CONFIG_DM_PCI_COMPAT=y
> > CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> > b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> > index 88c9224001..73d1be1013 100644
> > --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> > +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> > @@ -63,6 +63,7 @@ CONFIG_SPI_FLASH=y
> > CONFIG_SF_DEFAULT_MODE=0
> > CONFIG_SF_DEFAULT_SPEED=10000000
> > CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> > CONFIG_PHY_ATHEROS=y
> > CONFIG_PHY_BROADCOM=y
> > CONFIG_PHY_DAVICOM=y
> > @@ -74,8 +75,10 @@ CONFIG_PHY_SMSC=y
> > CONFIG_PHY_VITESSE=y
> > CONFIG_PHY_GIGE=y
> > CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> > CONFIG_MII=y
> > CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> > CONFIG_DM_PCI=y
> > CONFIG_DM_PCI_COMPAT=y
> > CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_36BIT_defconfig
> > b/configs/P2020RDB-PC_36BIT_defconfig
> > index 88e24c30ba..21a0e85f98 100644
> > --- a/configs/P2020RDB-PC_36BIT_defconfig
> > +++ b/configs/P2020RDB-PC_36BIT_defconfig
> > @@ -50,6 +50,7 @@ CONFIG_SPI_FLASH=y
> > CONFIG_SF_DEFAULT_MODE=0
> > CONFIG_SF_DEFAULT_SPEED=10000000
> > CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> > CONFIG_PHY_ATHEROS=y
> > CONFIG_PHY_BROADCOM=y
> > CONFIG_PHY_DAVICOM=y
> > @@ -61,8 +62,10 @@ CONFIG_PHY_SMSC=y
> > CONFIG_PHY_VITESSE=y
> > CONFIG_PHY_GIGE=y
> > CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> > CONFIG_MII=y
> > CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> > CONFIG_DM_PCI=y
> > CONFIG_DM_PCI_COMPAT=y
> > CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_NAND_defconfig
> > b/configs/P2020RDB-PC_NAND_defconfig
> > index dda34dd43e..800c728ed3 100644
> > --- a/configs/P2020RDB-PC_NAND_defconfig
> > +++ b/configs/P2020RDB-PC_NAND_defconfig
> > @@ -65,6 +65,7 @@ CONFIG_SPI_FLASH=y
> > CONFIG_SF_DEFAULT_MODE=0
> > CONFIG_SF_DEFAULT_SPEED=10000000
> > CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> > CONFIG_PHY_ATHEROS=y
> > CONFIG_PHY_BROADCOM=y
> > CONFIG_PHY_DAVICOM=y
> > @@ -76,8 +77,10 @@ CONFIG_PHY_SMSC=y
> > CONFIG_PHY_VITESSE=y
> > CONFIG_PHY_GIGE=y
> > CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> > CONFIG_MII=y
> > CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> > CONFIG_DM_PCI=y
> > CONFIG_DM_PCI_COMPAT=y
> > CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_SDCARD_defconfig
> > b/configs/P2020RDB-PC_SDCARD_defconfig
> > index c2b6ad5f32..81cbac2fe8 100644
> > --- a/configs/P2020RDB-PC_SDCARD_defconfig
> > +++ b/configs/P2020RDB-PC_SDCARD_defconfig
> > @@ -60,6 +60,7 @@ CONFIG_SPI_FLASH=y
> > CONFIG_SF_DEFAULT_MODE=0
> > CONFIG_SF_DEFAULT_SPEED=10000000
> > CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> > CONFIG_PHY_ATHEROS=y
> > CONFIG_PHY_BROADCOM=y
> > CONFIG_PHY_DAVICOM=y
> > @@ -71,8 +72,10 @@ CONFIG_PHY_SMSC=y
> > CONFIG_PHY_VITESSE=y
> > CONFIG_PHY_GIGE=y
> > CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> > CONFIG_MII=y
> > CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> > CONFIG_DM_PCI=y
> > CONFIG_DM_PCI_COMPAT=y
> > CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig
> > b/configs/P2020RDB-PC_SPIFLASH_defconfig
> > index 3ec208ee00..89308a503b 100644
> > --- a/configs/P2020RDB-PC_SPIFLASH_defconfig
> > +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
> > @@ -62,6 +62,7 @@ CONFIG_SPI_FLASH=y
> > CONFIG_SF_DEFAULT_MODE=0
> > CONFIG_SF_DEFAULT_SPEED=10000000
> > CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> > CONFIG_PHY_ATHEROS=y
> > CONFIG_PHY_BROADCOM=y
> > CONFIG_PHY_DAVICOM=y
> > @@ -73,8 +74,10 @@ CONFIG_PHY_SMSC=y
> > CONFIG_PHY_VITESSE=y
> > CONFIG_PHY_GIGE=y
> > CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> > CONFIG_MII=y
> > CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> > CONFIG_DM_PCI=y
> > CONFIG_DM_PCI_COMPAT=y
> > CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_defconfig
> > b/configs/P2020RDB-PC_defconfig index 0f0a6ad810..66fc3b0a14 100644
> > --- a/configs/P2020RDB-PC_defconfig
> > +++ b/configs/P2020RDB-PC_defconfig
> > @@ -49,6 +49,7 @@ CONFIG_SPI_FLASH=y
> > CONFIG_SF_DEFAULT_MODE=0
> > CONFIG_SF_DEFAULT_SPEED=10000000
> > CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> > CONFIG_PHY_ATHEROS=y
> > CONFIG_PHY_BROADCOM=y
> > CONFIG_PHY_DAVICOM=y
> > @@ -60,8 +61,10 @@ CONFIG_PHY_SMSC=y
> > CONFIG_PHY_VITESSE=y
> > CONFIG_PHY_GIGE=y
> > CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> > CONFIG_MII=y
> > CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> > CONFIG_DM_PCI=y
> > CONFIG_DM_PCI_COMPAT=y
> > CONFIG_PCIE_FSL=y
> > --
> > 2.25.1
> >
prev parent reply other threads:[~2020-06-15 8:51 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-12 15:17 [PATCHv3 00/13] powerpc: covert p1010, p1020 and p2020 RDB board to DM_ETH Zhiqiang Hou
2020-06-12 15:17 ` [PATCHv3 01/15] net: fsl_mdio: Change to use virtual address Zhiqiang Hou
2020-06-12 20:28 ` Vladimir Oltean
2020-06-15 8:54 ` Z.q. Hou
2020-06-12 15:17 ` [PATCHv3 02/15] net: fsl_mdio: Correct the MII management register block address Zhiqiang Hou
2020-06-12 15:17 ` [PATCHv3 03/15] net: tsec: convert to use DM_MDIO when DM_ETH enabled Zhiqiang Hou
2020-06-12 20:31 ` Vladimir Oltean
2020-06-15 8:56 ` Z.q. Hou
2020-06-12 15:17 ` [PATCHv3 04/15] net: tsec: Add the compatible string "gianfar" support Zhiqiang Hou
2020-06-12 20:40 ` Vladimir Oltean
2020-06-15 8:56 ` Z.q. Hou
2020-06-12 15:17 ` [PATCHv3 05/15] powerpc: mpc8xxx: Don't compile cpu_eth_init() when DM_ETH enabled Zhiqiang Hou
2020-06-12 15:17 ` [PATCHv3 06/15] fsl: p1_p2_rdb: Move vsc7835 firmware uploading to board_early_init_r() Zhiqiang Hou
2020-06-12 20:36 ` Vladimir Oltean
2020-06-15 8:56 ` Z.q. Hou
2020-06-12 15:17 ` [PATCHv3 07/15] configs: p1_p2_rdb: Add the default address of vsc7385 firmware Zhiqiang Hou
2020-06-12 15:17 ` [PATCHv3 08/15] dts: powerpc: p1020rdb: Add eTSEC DT nodes Zhiqiang Hou
2020-06-12 20:15 ` Vladimir Oltean
2020-06-15 8:50 ` Z.q. Hou
2020-06-12 15:17 ` [PATCHv3 09/15] powerpc: p1_p2_rdb: Don't compile board_eth_init() when DM_ETH enabled Zhiqiang Hou
2020-06-12 15:17 ` [PATCHv3 10/15] configs: P1020RDB: Enable DM_ETH config Zhiqiang Hou
2020-06-12 15:17 ` [PATCHv3 11/15] dts: powerpc: p1010rdb: Add eTSEC DT nodes Zhiqiang Hou
2020-06-12 15:17 ` [PATCHv3 12/15] powerpc: p1010rdb: Compile legacy ethernet init function when no DM_ETH Zhiqiang Hou
2020-06-12 20:24 ` Vladimir Oltean
2020-06-15 8:54 ` Z.q. Hou
2020-06-12 15:17 ` [PATCHv3 13/15] configs: P1010RDB: Enable DM_ETH config Zhiqiang Hou
2020-06-12 20:20 ` Vladimir Oltean
2020-06-15 8:53 ` Z.q. Hou
2020-06-12 15:17 ` [PATCHv3 14/15] dts: powerpc: p2020rdb: Add eTSEC DT nodes Zhiqiang Hou
2020-06-12 15:17 ` [PATCHv3 15/15] configs: P2020RDB: Enable DM_ETH config Zhiqiang Hou
2020-06-12 20:17 ` Vladimir Oltean
2020-06-15 8:51 ` Z.q. Hou [this message]
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