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From: Inochi Amaoto <inochiama@outlook.com>
To: Chao Wei <chao.wei@sophgo.com>,
	Chen Wang <unicorn_wang@outlook.com>,
	Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: Jisheng Zhang <jszhang@kernel.org>,
	Inochi Amaoto <inochiama@outlook.com>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v4 6/7] riscv: dts: sophgo: add initial CV1812H SoC device tree
Date: Thu, 19 Oct 2023 07:18:53 +0800	[thread overview]
Message-ID: <IA1PR20MB49537B6A093A491116442709BBD5A@IA1PR20MB4953.namprd20.prod.outlook.com> (raw)
In-Reply-To: <IA1PR20MB495399CAF2EEECC206ADA7ABBBD5A@IA1PR20MB4953.namprd20.prod.outlook.com>

Add initial device tree for the CV1812H RISC-V SoC by SOPHGO.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
---
 arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h.dtsi

diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
new file mode 100644
index 000000000000..3e7a942f5c1a
--- /dev/null
+++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "cv18xx.dtsi"
+
+/ {
+	compatible = "sophgo,cv1812h";
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 0x10000000>;
+	};
+};
+
+&plic {
+	compatible = "sophgo,cv1812h-plic", "thead,c900-plic";
+};
+
+&clint {
+	compatible = "sophgo,cv1812h-clint", "thead,c900-clint";
+};
--
2.42.0


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WARNING: multiple messages have this Message-ID (diff)
From: Inochi Amaoto <inochiama@outlook.com>
To: Chao Wei <chao.wei@sophgo.com>,
	Chen Wang <unicorn_wang@outlook.com>,
	Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: Jisheng Zhang <jszhang@kernel.org>,
	Inochi Amaoto <inochiama@outlook.com>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v4 6/7] riscv: dts: sophgo: add initial CV1812H SoC device tree
Date: Thu, 19 Oct 2023 07:18:53 +0800	[thread overview]
Message-ID: <IA1PR20MB49537B6A093A491116442709BBD5A@IA1PR20MB4953.namprd20.prod.outlook.com> (raw)
In-Reply-To: <IA1PR20MB495399CAF2EEECC206ADA7ABBBD5A@IA1PR20MB4953.namprd20.prod.outlook.com>

Add initial device tree for the CV1812H RISC-V SoC by SOPHGO.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
---
 arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h.dtsi

diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
new file mode 100644
index 000000000000..3e7a942f5c1a
--- /dev/null
+++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "cv18xx.dtsi"
+
+/ {
+	compatible = "sophgo,cv1812h";
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 0x10000000>;
+	};
+};
+
+&plic {
+	compatible = "sophgo,cv1812h-plic", "thead,c900-plic";
+};
+
+&clint {
+	compatible = "sophgo,cv1812h-clint", "thead,c900-clint";
+};
--
2.42.0


  parent reply	other threads:[~2023-10-18 23:19 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-18 23:18 [PATCH v4 0/7] Add Huashan Pi board support Inochi Amaoto
2023-10-18 23:18 ` Inochi Amaoto
2023-10-18 23:18 ` [PATCH v4 1/7] dt-bindings: interrupt-controller: Add SOPHGO CV1812H plic Inochi Amaoto
2023-10-18 23:18   ` Inochi Amaoto
2023-10-18 23:18 ` [PATCH v4 2/7] dt-bindings: timer: Add SOPHGO CV1812H clint Inochi Amaoto
2023-10-18 23:18   ` Inochi Amaoto
2023-10-18 23:18 ` [PATCH v4 3/7] dt-bindings: riscv: Add SOPHGO Huashan Pi board compatibles Inochi Amaoto
2023-10-18 23:18   ` Inochi Amaoto
2023-10-18 23:18 ` [PATCH v4 4/7] riscv: dts: sophgo: Separate compatible specific for CV1800B soc Inochi Amaoto
2023-10-18 23:18   ` Inochi Amaoto
2023-10-19 12:04   ` Chen Wang
2023-10-19 12:04     ` Chen Wang
2023-10-18 23:18 ` [PATCH v4 5/7] riscv: dts: sophgo: cv18xx: Add gpio devices Inochi Amaoto
2023-10-18 23:18   ` Inochi Amaoto
2023-10-19 12:02   ` Chen Wang
2023-10-19 12:02     ` Chen Wang
2023-10-18 23:18 ` Inochi Amaoto [this message]
2023-10-18 23:18   ` [PATCH v4 6/7] riscv: dts: sophgo: add initial CV1812H SoC device tree Inochi Amaoto
2023-10-19 12:01   ` Chen Wang
2023-10-19 12:01     ` Chen Wang
2023-10-18 23:18 ` [PATCH v4 7/7] riscv: dts: sophgo: add Huashan Pi board " Inochi Amaoto
2023-10-18 23:18   ` Inochi Amaoto
2023-10-19 12:00   ` Chen Wang
2023-10-19 12:00     ` Chen Wang
2023-10-19 14:04 ` [PATCH v4 0/7] Add Huashan Pi board support Conor Dooley
2023-10-19 14:04   ` Conor Dooley
2023-11-30 12:51 ` Conor Dooley
2023-11-30 12:51   ` Conor Dooley
2023-11-30 23:21   ` Inochi Amaoto
2023-11-30 23:21     ` Inochi Amaoto
2023-12-01  0:41     ` Conor Dooley
2023-12-01  0:41       ` Conor Dooley
2023-12-01  1:02       ` Inochi Amaoto
2023-12-01  1:02         ` Inochi Amaoto
2023-12-01  8:14         ` Conor Dooley
2023-12-01  8:14           ` Conor Dooley
2023-12-01  8:31           ` Inochi Amaoto
2023-12-01  8:31             ` Inochi Amaoto
2023-12-01 16:21             ` Conor Dooley
2023-12-01 16:21               ` Conor Dooley
2023-12-02  0:22               ` Inochi Amaoto
2023-12-02  0:22                 ` Inochi Amaoto
2023-12-02  1:11               ` Chen Wang
2023-12-02  1:11                 ` Chen Wang
2023-12-03 11:51                 ` Conor Dooley
2023-12-03 11:51                   ` Conor Dooley
2023-12-03 23:32                 ` Inochi Amaoto
2023-12-03 23:32                   ` Inochi Amaoto
2023-12-04  9:15                   ` Chen Wang
2023-12-04  9:15                     ` Chen Wang
2023-12-04  9:32                     ` Conor Dooley
2023-12-04  9:32                       ` Conor Dooley
2023-12-04 12:25                       ` Chen Wang
2023-12-04 12:25                         ` Chen Wang
2023-12-04 12:28                         ` Conor Dooley
2023-12-04 12:28                           ` Conor Dooley

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