[PATCH 1/3] drm/amd/pm: update the smu v11.5 smc header for vangogh

[PATCH 1/3] drm/amd/pm: update the smu v11.5 smc header for vangogh

[Xiaomeng Hou]

Add new PMFW message to notify RLC engine status.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Change-Id: I7d714f8f245835cacb25e7cc4b248ddf183aebc1
---
 drivers/gpu/drm/amd/pm/inc/smu_types.h       | 2 +-
 drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/inc/smu_types.h b/drivers/gpu/drm/amd/pm/inc/smu_types.h
index 4a6d1381df16..41a49c1c0302 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_types.h
@@ -178,7 +178,7 @@
 	__SMU_DUMMY_MAP(SET_DRIVER_DUMMY_TABLE_DRAM_ADDR_LOW), \
 	__SMU_DUMMY_MAP(GET_UMC_FW_WA), \
 	__SMU_DUMMY_MAP(Mode1Reset), \
-	__SMU_DUMMY_MAP(Spare),                          \
+	__SMU_DUMMY_MAP(RlcPowerNotify),                 \
 	__SMU_DUMMY_MAP(SetHardMinIspiclkByFreq),        \
 	__SMU_DUMMY_MAP(SetHardMinIspxclkByFreq),        \
 	__SMU_DUMMY_MAP(SetSoftMinSocclkByFreq),         \
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h
index 7e69b3bd311b..55d7892e4e0e 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h
@@ -41,7 +41,7 @@
 #define PPSMC_MSG_PowerUpIspByTile                     0x7
 #define PPSMC_MSG_PowerDownVcn                         0x8 // VCN is power gated by default
 #define PPSMC_MSG_PowerUpVcn                           0x9
-#define PPSMC_MSG_spare                                0xA
+#define PPSMC_MSG_RlcPowerNotify                       0xA
 #define PPSMC_MSG_SetHardMinVcn                        0xB // For wireless display
 #define PPSMC_MSG_SetSoftMinGfxclk                     0xC //Sets SoftMin for GFXCLK. Arg is in MHz
 #define PPSMC_MSG_ActiveProcessNotify                  0xD
-- 
2.17.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 2/3] drm/amd/pm: add interface to notify RLC status for vangogh

[Xiaomeng Hou]

Add this interface to notify PMFW the status (Normal/Off) of RLC engine.

Before notify RLC status normal, need check its current status first. Send the
message only when current status is still off.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Change-Id: I2f1a7de23df7315a7b220ba6d0a4bcaa75c93fea
---
 drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h       |  1 +
 .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c  | 24 ++++++++++++++++++-
 .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h  |  4 ++++
 drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c        | 13 ++++++++++
 drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h        |  2 ++
 drivers/gpu/drm/amd/pm/swsmu/smu_internal.h   |  1 +
 6 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 89be49a43500..0da00a92b478 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -583,6 +583,7 @@ struct pptable_funcs {
 	int (*gpo_control)(struct smu_context *smu, bool enablement);
 	int (*gfx_state_change_set)(struct smu_context *smu, uint32_t state);
 	int (*set_fine_grain_gfx_freq_parameters)(struct smu_context *smu);
+	int (*notify_rlc_status)(struct smu_context *smu, uint32_t status);
 };
 
 typedef enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index ddaa6a705fa6..03c2cd7a52a9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -64,7 +64,7 @@ static struct cmn2asic_msg_mapping vangogh_message_map[SMU_MSG_MAX_COUNT] = {
 	MSG_MAP(PowerUpIspByTile,               PPSMC_MSG_PowerUpIspByTile,		0),
 	MSG_MAP(PowerDownVcn,                   PPSMC_MSG_PowerDownVcn,			0),
 	MSG_MAP(PowerUpVcn,                     PPSMC_MSG_PowerUpVcn,			0),
-	MSG_MAP(Spare,                          PPSMC_MSG_spare,				0),
+	MSG_MAP(RlcPowerNotify,                 PPSMC_MSG_RlcPowerNotify,		0),
 	MSG_MAP(SetHardMinVcn,                  PPSMC_MSG_SetHardMinVcn,		0),
 	MSG_MAP(SetSoftMinGfxclk,               PPSMC_MSG_SetSoftMinGfxclk,		0),
 	MSG_MAP(ActiveProcessNotify,            PPSMC_MSG_ActiveProcessNotify,		0),
@@ -722,6 +722,27 @@ static int vangogh_set_fine_grain_gfx_freq_parameters(struct smu_context *smu)
 	return 0;
 }
 
+static int vangogh_notify_rlc_status(struct smu_context *smu, uint32_t status)
+{
+	int ret = 0;
+
+	switch (status)
+	{
+	case RLC_STATUS_OFF:
+		ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_RlcPowerNotify, status, NULL);
+		break;
+	case RLC_STATUS_NORMAL:
+		if (smu_cmn_get_rlc_status(smu) == 0)
+			ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_RlcPowerNotify, status, NULL);
+		break;
+	default:
+		dev_err(smu->adev->dev, "Unknown rlc status\n");
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
 static const struct pptable_funcs vangogh_ppt_funcs = {
 
 	.check_fw_status = smu_v11_0_check_fw_status,
@@ -750,6 +771,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = {
 	.print_clk_levels = vangogh_print_fine_grain_clk,
 	.set_default_dpm_table = vangogh_set_default_dpm_tables,
 	.set_fine_grain_gfx_freq_parameters = vangogh_set_fine_grain_gfx_freq_parameters,
+	.notify_rlc_status = vangogh_notify_rlc_status,
 };
 
 void vangogh_set_ppt_funcs(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h
index 8756766296cd..eab455493076 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h
@@ -32,4 +32,8 @@ extern void vangogh_set_ppt_funcs(struct smu_context *smu);
 #define VANGOGH_UMD_PSTATE_SOCCLK       678
 #define VANGOGH_UMD_PSTATE_FCLK         800
 
+/* RLC Power Status */
+#define RLC_STATUS_OFF          0
+#define RLC_STATUS_NORMAL       1
+
 #endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index f8260769061c..2f3e66b03dd2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -42,6 +42,9 @@
  * They share the same definitions and values. That makes common
  * APIs for SMC messages issuing for all ASICs possible.
  */
+#define mmMP1_SMN_C2PMSG_63                                                                            0x027f
+#define mmMP1_SMN_C2PMSG_63_BASE_IDX                                                                   0
+
 #define mmMP1_SMN_C2PMSG_66                                                                            0x0282
 #define mmMP1_SMN_C2PMSG_66_BASE_IDX                                                                   0
 
@@ -731,3 +734,13 @@ int smu_cmn_get_metrics_table(struct smu_context *smu,
 
 	return ret;
 }
+
+int smu_cmn_get_rlc_status(struct smu_context *smu)
+{
+	struct amdgpu_device *adev = smu->adev;
+	uint32_t val;
+
+	val = RREG32_SOC15_NO_KIQ(MP1, 0, mmMP1_SMN_C2PMSG_63);
+
+	return val;
+}
\ No newline at end of file
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
index 01e825d83d8d..7584089ef15f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
@@ -95,5 +95,7 @@ int smu_cmn_get_metrics_table(struct smu_context *smu,
 			      void *metrics_table,
 			      bool bypass_cache);
 
+int smu_cmn_get_rlc_status(struct smu_context *smu);
+
 #endif
 #endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
index 68d9464ababc..8ef3713f7f3c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
@@ -91,6 +91,7 @@
 #define smu_post_init(smu)						smu_ppt_funcs(post_init, 0, smu)
 #define smu_gpo_control(smu, enablement)				smu_ppt_funcs(gpo_control, 0, smu, enablement)
 #define smu_set_fine_grain_gfx_freq_parameters(smu)					smu_ppt_funcs(set_fine_grain_gfx_freq_parameters, 0, smu)
+#define smu_notify_rlc_status(smu, status)					smu_ppt_funcs(notify_rlc_status, 0, smu, status)
 
 #endif
 #endif
-- 
2.17.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 3/3] drm/amdgpu/pm: inform PMFW rlc status before start/stop rlc for vangogh

[Xiaomeng Hou]

RLC is halted when system suspend/shutdown. However, due to DPM enabled, PMFM is
unaware of RLC being halted and will continue sending messages, which would
eventually caused ACPI related hang. So send message to inform PMFM the rlc
status before start/stop rlc.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Change-Id: I7b1a04f6e249ac6753109079ecb3019c99161d9f
---
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index cf999b7a2164..42a32c0e5bab 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -920,6 +920,14 @@ static int smu_smc_hw_setup(struct smu_context *smu)
 	uint32_t pcie_gen = 0, pcie_width = 0;
 	int ret = 0;
 
+	if (adev->in_suspend && smu->is_apu) {
+		ret = smu_notify_rlc_status(smu, 1);
+		if (ret) {
+			dev_info(adev->dev, "Failed to notify rlc status!\n");
+			return ret;
+		}
+	}
+
 	if (adev->in_suspend && smu_is_dpm_running(smu)) {
 		dev_info(adev->dev, "dpm has been enabled\n");
 		/* this is needed specifically */
@@ -1213,6 +1221,14 @@ static int smu_disable_dpms(struct smu_context *smu)
 			dev_err(adev->dev, "Failed to disable smu features.\n");
 	}
 
+	if (smu->is_apu) {
+		ret = smu_notify_rlc_status(smu, 0);
+		if (ret) {
+			dev_info(adev->dev, "Failed to notify rlc status!\n");
+			return ret;
+		}
+	}
+
 	if (adev->asic_type >= CHIP_NAVI10 &&
 	    adev->gfx.rlc.funcs->stop)
 		adev->gfx.rlc.funcs->stop(adev);
-- 
2.17.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/3] drm/amd/pm: add interface to notify RLC status for vangogh

[Wang, Kevin(Yang)]

[-- Attachment #1.1: Type: text/plain, Size: 7998 bytes --]

[AMD Official Use Only - Internal Distribution Only]


________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Sent: Tuesday, December 8, 2020 7:19 PM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Huang, Ray <Ray.Huang@amd.com>; Hou, Xiaomeng (Matthew) <Xiaomeng.Hou@amd.com>; Quan, Evan <Evan.Quan@amd.com>
Subject: [PATCH 2/3] drm/amd/pm: add interface to notify RLC status for vangogh

Add this interface to notify PMFW the status (Normal/Off) of RLC engine.

Before notify RLC status normal, need check its current status first. Send the
message only when current status is still off.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Change-Id: I2f1a7de23df7315a7b220ba6d0a4bcaa75c93fea
---
 drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h       |  1 +
 .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c  | 24 ++++++++++++++++++-
 .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h  |  4 ++++
 drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c        | 13 ++++++++++
 drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h        |  2 ++
 drivers/gpu/drm/amd/pm/swsmu/smu_internal.h   |  1 +
 6 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 89be49a43500..0da00a92b478 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -583,6 +583,7 @@ struct pptable_funcs {
         int (*gpo_control)(struct smu_context *smu, bool enablement);
         int (*gfx_state_change_set)(struct smu_context *smu, uint32_t state);
         int (*set_fine_grain_gfx_freq_parameters)(struct smu_context *smu);
+       int (*notify_rlc_status)(struct smu_context *smu, uint32_t status);
 };

 typedef enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index ddaa6a705fa6..03c2cd7a52a9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -64,7 +64,7 @@ static struct cmn2asic_msg_mapping vangogh_message_map[SMU_MSG_MAX_COUNT] = {
         MSG_MAP(PowerUpIspByTile,               PPSMC_MSG_PowerUpIspByTile,             0),
         MSG_MAP(PowerDownVcn,                   PPSMC_MSG_PowerDownVcn,                 0),
         MSG_MAP(PowerUpVcn,                     PPSMC_MSG_PowerUpVcn,                   0),
-       MSG_MAP(Spare,                          PPSMC_MSG_spare,                                0),
+       MSG_MAP(RlcPowerNotify,                 PPSMC_MSG_RlcPowerNotify,               0),
         MSG_MAP(SetHardMinVcn,                  PPSMC_MSG_SetHardMinVcn,                0),
         MSG_MAP(SetSoftMinGfxclk,               PPSMC_MSG_SetSoftMinGfxclk,             0),
         MSG_MAP(ActiveProcessNotify,            PPSMC_MSG_ActiveProcessNotify,          0),
@@ -722,6 +722,27 @@ static int vangogh_set_fine_grain_gfx_freq_parameters(struct smu_context *smu)
         return 0;
 }

+static int vangogh_notify_rlc_status(struct smu_context *smu, uint32_t status)
+{
+       int ret = 0;
+
+       switch (status)
+       {
+       case RLC_STATUS_OFF:
+               ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_RlcPowerNotify, status, NULL);
+               break;
+       case RLC_STATUS_NORMAL:
+               if (smu_cmn_get_rlc_status(smu) == 0)
+                       ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_RlcPowerNotify, status, NULL);
+               break;
+       default:
+               dev_err(smu->adev->dev, "Unknown rlc status\n");
+               return -EINVAL;
+       }
+
+       return ret;
+}
+
 static const struct pptable_funcs vangogh_ppt_funcs = {

         .check_fw_status = smu_v11_0_check_fw_status,
@@ -750,6 +771,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = {
         .print_clk_levels = vangogh_print_fine_grain_clk,
         .set_default_dpm_table = vangogh_set_default_dpm_tables,
         .set_fine_grain_gfx_freq_parameters = vangogh_set_fine_grain_gfx_freq_parameters,
+       .notify_rlc_status = vangogh_notify_rlc_status,
 };

 void vangogh_set_ppt_funcs(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h
index 8756766296cd..eab455493076 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h
@@ -32,4 +32,8 @@ extern void vangogh_set_ppt_funcs(struct smu_context *smu);
 #define VANGOGH_UMD_PSTATE_SOCCLK       678
 #define VANGOGH_UMD_PSTATE_FCLK         800

+/* RLC Power Status */
+#define RLC_STATUS_OFF          0
+#define RLC_STATUS_NORMAL       1
+
 #endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index f8260769061c..2f3e66b03dd2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -42,6 +42,9 @@
  * They share the same definitions and values. That makes common
  * APIs for SMC messages issuing for all ASICs possible.
  */
+#define mmMP1_SMN_C2PMSG_63                                                                            0x027f
+#define mmMP1_SMN_C2PMSG_63_BASE_IDX                                                                   0
+
 #define mmMP1_SMN_C2PMSG_66                                                                            0x0282
 #define mmMP1_SMN_C2PMSG_66_BASE_IDX                                                                   0

@@ -731,3 +734,13 @@ int smu_cmn_get_metrics_table(struct smu_context *smu,

         return ret;
 }
+
+int smu_cmn_get_rlc_status(struct smu_context *smu)
+{
+       struct amdgpu_device *adev = smu->adev;
+       uint32_t val;
+
+       val = RREG32_SOC15_NO_KIQ(MP1, 0, mmMP1_SMN_C2PMSG_63);
+
+       return val;
+}

[kevin]:

these are not common code for whole smu driver, please move it to ppt.c file.

\ No newline at end of file
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
index 01e825d83d8d..7584089ef15f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
@@ -95,5 +95,7 @@ int smu_cmn_get_metrics_table(struct smu_context *smu,
                               void *metrics_table,
                               bool bypass_cache);

+int smu_cmn_get_rlc_status(struct smu_context *smu);
+
 #endif
 #endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
index 68d9464ababc..8ef3713f7f3c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
@@ -91,6 +91,7 @@
 #define smu_post_init(smu)                                              smu_ppt_funcs(post_init, 0, smu)
 #define smu_gpo_control(smu, enablement)                                smu_ppt_funcs(gpo_control, 0, smu, enablement)
 #define smu_set_fine_grain_gfx_freq_parameters(smu)                                     smu_ppt_funcs(set_fine_grain_gfx_freq_parameters, 0, smu)
+#define smu_notify_rlc_status(smu, status)                                     smu_ppt_funcs(notify_rlc_status, 0, smu, status)

 #endif
 #endif
--
2.17.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CKevin1.Wang%40amd.com%7Cf740746f29d14d4777e808d89b6b4971%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637430232414406734%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=VPGv9GuTb22ZkzKp98iG3ibpG7BSwKaw%2FBT%2F6DFDnSs%3D&amp;reserved=0

[-- Attachment #1.2: Type: text/html, Size: 15944 bytes --]

[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 3/3] drm/amdgpu/pm: inform PMFW rlc status before start/stop rlc for vangogh

[Wang, Kevin(Yang)]

[-- Attachment #1.1: Type: text/plain, Size: 3192 bytes --]

[AMD Official Use Only - Internal Distribution Only]



________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Sent: Tuesday, December 8, 2020 7:19 PM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Huang, Ray <Ray.Huang@amd.com>; Hou, Xiaomeng (Matthew) <Xiaomeng.Hou@amd.com>; Quan, Evan <Evan.Quan@amd.com>
Subject: [PATCH 3/3] drm/amdgpu/pm: inform PMFW rlc status before start/stop rlc for vangogh

RLC is halted when system suspend/shutdown. However, due to DPM enabled, PMFM is
unaware of RLC being halted and will continue sending messages, which would
eventually caused ACPI related hang. So send message to inform PMFM the rlc
status before start/stop rlc.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Change-Id: I7b1a04f6e249ac6753109079ecb3019c99161d9f
---
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index cf999b7a2164..42a32c0e5bab 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -920,6 +920,14 @@ static int smu_smc_hw_setup(struct smu_context *smu)
         uint32_t pcie_gen = 0, pcie_width = 0;
         int ret = 0;

+       if (adev->in_suspend && smu->is_apu) {
+               ret = smu_notify_rlc_status(smu, 1);
[kevin]:
for 2nd parameter of '1',  why not use the macro to replace it which is defined in previous patch ?
and why not put these codes into smu_resume/suspend functions?

+               if (ret) {
+                       dev_info(adev->dev, "Failed to notify rlc status!\n");
+                       return ret;
+               }
+       }
+
         if (adev->in_suspend && smu_is_dpm_running(smu)) {
                 dev_info(adev->dev, "dpm has been enabled\n");
                 /* this is needed specifically */
@@ -1213,6 +1221,14 @@ static int smu_disable_dpms(struct smu_context *smu)
                         dev_err(adev->dev, "Failed to disable smu features.\n");
         }

+       if (smu->is_apu) {
+               ret = smu_notify_rlc_status(smu, 0);
+               if (ret) {
+                       dev_info(adev->dev, "Failed to notify rlc status!\n");
+                       return ret;
+               }
+       }
+
         if (adev->asic_type >= CHIP_NAVI10 &&
             adev->gfx.rlc.funcs->stop)
                 adev->gfx.rlc.funcs->stop(adev);
--
2.17.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CKevin1.Wang%40amd.com%7Cb3afedc0e8a34992b17408d89b6b4f02%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637430232491676693%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=2gyWC0ytrVqLqNX2OappS8ALSyWkNa0xKYp96vMpxfk%3D&amp;reserved=0

[-- Attachment #1.2: Type: text/html, Size: 6731 bytes --]

[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 3/3] drm/amdgpu/pm: inform PMFW rlc status before start/stop rlc for vangogh

[Huang Rui]

On Tue, Dec 08, 2020 at 07:19:42PM +0800, Hou, Xiaomeng (Matthew) wrote:
> RLC is halted when system suspend/shutdown. However, due to DPM enabled, PMFM is
> unaware of RLC being halted and will continue sending messages, which would
> eventually caused ACPI related hang. So send message to inform PMFM the rlc
> status before start/stop rlc.
> 
> Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
> Change-Id: I7b1a04f6e249ac6753109079ecb3019c99161d9f
> ---
>  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index cf999b7a2164..42a32c0e5bab 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -920,6 +920,14 @@ static int smu_smc_hw_setup(struct smu_context *smu)
>  	uint32_t pcie_gen = 0, pcie_width = 0;
>  	int ret = 0;
>  
> +	if (adev->in_suspend && smu->is_apu) {
> +		ret = smu_notify_rlc_status(smu, 1);

You can create two new callbacks in ppt_funcs->inform_rlc(smu, on), and set
on as bool type.

Then you can use below macros to implement this callback with RLC notify
SMC message.

/* RLC Power Status */
#define RLC_STATUS_OFF          0
#define RLC_STATUS_NORMAL       1

Others look good for me.

Thanks,
Ray

> +		if (ret) {
> +			dev_info(adev->dev, "Failed to notify rlc status!\n");
> +			return ret;
> +		}
> +	}
> +
>  	if (adev->in_suspend && smu_is_dpm_running(smu)) {
>  		dev_info(adev->dev, "dpm has been enabled\n");
>  		/* this is needed specifically */
> @@ -1213,6 +1221,14 @@ static int smu_disable_dpms(struct smu_context *smu)
>  			dev_err(adev->dev, "Failed to disable smu features.\n");
>  	}
>  
> +	if (smu->is_apu) {
> +		ret = smu_notify_rlc_status(smu, 0);
> +		if (ret) {
> +			dev_info(adev->dev, "Failed to notify rlc status!\n");
> +			return ret;
> +		}
> +	}
> +
>  	if (adev->asic_type >= CHIP_NAVI10 &&
>  	    adev->gfx.rlc.funcs->stop)
>  		adev->gfx.rlc.funcs->stop(adev);
> -- 
> 2.17.1
> 
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

RE: [PATCH 3/3] drm/amdgpu/pm: inform PMFW rlc status before start/stop rlc for vangogh

[Lazar, Lijo]

[AMD Public Use]

> You can create two new callbacks in ppt_funcs->inform_rlc(smu, on), and set on as bool type

We can't keep adding ASIC specific workarounds as ppt_funcs. We should make use of the existing ones or have something generic to handle these quirks. System features control is one generic place in the logic which is used to control features. It's used in dGPU context only now, but it may be repurposed for FW notifications.

Thanks,
Lijo

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Huang Rui
Sent: Tuesday, December 8, 2020 6:39 PM
To: Hou, Xiaomeng (Matthew) <Xiaomeng.Hou@amd.com>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Quan, Evan <Evan.Quan@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/3] drm/amdgpu/pm: inform PMFW rlc status before start/stop rlc for vangogh

[CAUTION: External Email]

On Tue, Dec 08, 2020 at 07:19:42PM +0800, Hou, Xiaomeng (Matthew) wrote:
> RLC is halted when system suspend/shutdown. However, due to DPM 
> enabled, PMFM is unaware of RLC being halted and will continue sending 
> messages, which would eventually caused ACPI related hang. So send 
> message to inform PMFM the rlc status before start/stop rlc.
>
> Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
> Change-Id: I7b1a04f6e249ac6753109079ecb3019c99161d9f
> ---
>  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index cf999b7a2164..42a32c0e5bab 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -920,6 +920,14 @@ static int smu_smc_hw_setup(struct smu_context *smu)
>       uint32_t pcie_gen = 0, pcie_width = 0;
>       int ret = 0;
>
> +     if (adev->in_suspend && smu->is_apu) {
> +             ret = smu_notify_rlc_status(smu, 1);

You can create two new callbacks in ppt_funcs->inform_rlc(smu, on), and set on as bool type.

Then you can use below macros to implement this callback with RLC notify SMC message.

/* RLC Power Status */
#define RLC_STATUS_OFF          0
#define RLC_STATUS_NORMAL       1

Others look good for me.

Thanks,
Ray

> +             if (ret) {
> +                     dev_info(adev->dev, "Failed to notify rlc status!\n");
> +                     return ret;
> +             }
> +     }
> +
>       if (adev->in_suspend && smu_is_dpm_running(smu)) {
>               dev_info(adev->dev, "dpm has been enabled\n");
>               /* this is needed specifically */ @@ -1213,6 +1221,14 @@ 
> static int smu_disable_dpms(struct smu_context *smu)
>                       dev_err(adev->dev, "Failed to disable smu features.\n");
>       }
>
> +     if (smu->is_apu) {
> +             ret = smu_notify_rlc_status(smu, 0);
> +             if (ret) {
> +                     dev_info(adev->dev, "Failed to notify rlc status!\n");
> +                     return ret;
> +             }
> +     }
> +
>       if (adev->asic_type >= CHIP_NAVI10 &&
>           adev->gfx.rlc.funcs->stop)
>               adev->gfx.rlc.funcs->stop(adev);
> --
> 2.17.1
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7Clijo.lazar%40amd.com%7C346c5521a1e848a40efe08d89b7a6ca7%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637430297401242320%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=6t589ueoS0x26%2FdpzSdtQmjkRygo4ez11t0GuBMacyg%3D&amp;reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 3/3] drm/amdgpu/pm: inform PMFW rlc status before start/stop rlc for vangogh

[Huang Rui]

On Tue, Dec 08, 2020 at 09:39:18PM +0800, Lazar, Lijo wrote:
> [AMD Public Use]
> 
> > You can create two new callbacks in ppt_funcs->inform_rlc(smu, on), and set on as bool type
> 
> We can't keep adding ASIC specific workarounds as ppt_funcs. We should make use of the existing ones or have something generic to handle these quirks. System features control is one generic place in the logic which is used to control features. It's used in dGPU context only now, but it may be repurposed for FW notifications.

Actually, it's the new API for all future APUs (gfx10 and later). So we
want to add the callbacks. APU don't have the API to disable/enable DPM
like dGPU because it's handled by sbios. Once we do suspend, before we stop
RLC, we have to inform SMU to stop issuing the DPM request with this
message.

And yes, I am fine to move it into system feature control. Because it
noifies SMU to re-enable RLC again.

> 
> Thanks,
> Lijo
> 
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Huang Rui
> Sent: Tuesday, December 8, 2020 6:39 PM
> To: Hou, Xiaomeng (Matthew) <Xiaomeng.Hou@amd.com>
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Quan, Evan <Evan.Quan@amd.com>; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 3/3] drm/amdgpu/pm: inform PMFW rlc status before start/stop rlc for vangogh
> 
> [CAUTION: External Email]
> 
> On Tue, Dec 08, 2020 at 07:19:42PM +0800, Hou, Xiaomeng (Matthew) wrote:
> > RLC is halted when system suspend/shutdown. However, due to DPM 
> > enabled, PMFM is unaware of RLC being halted and will continue sending 
> > messages, which would eventually caused ACPI related hang. So send 
> > message to inform PMFM the rlc status before start/stop rlc.
> >
> > Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
> > Change-Id: I7b1a04f6e249ac6753109079ecb3019c99161d9f
> > ---
> >  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 16 ++++++++++++++++
> >  1 file changed, 16 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
> > b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> > index cf999b7a2164..42a32c0e5bab 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> > @@ -920,6 +920,14 @@ static int smu_smc_hw_setup(struct smu_context *smu)
> >       uint32_t pcie_gen = 0, pcie_width = 0;
> >       int ret = 0;
> >
> > +     if (adev->in_suspend && smu->is_apu) {
> > +             ret = smu_notify_rlc_status(smu, 1);
> 
> You can create two new callbacks in ppt_funcs->inform_rlc(smu, on), and set on as bool type.
> 
> Then you can use below macros to implement this callback with RLC notify SMC message.
> 
> /* RLC Power Status */
> #define RLC_STATUS_OFF          0
> #define RLC_STATUS_NORMAL       1
> 
> Others look good for me.
> 
> Thanks,
> Ray
> 
> > +             if (ret) {
> > +                     dev_info(adev->dev, "Failed to notify rlc status!\n");
> > +                     return ret;
> > +             }
> > +     }
> > +
> >       if (adev->in_suspend && smu_is_dpm_running(smu)) {
> >               dev_info(adev->dev, "dpm has been enabled\n");
> >               /* this is needed specifically */ @@ -1213,6 +1221,14 @@ 
> > static int smu_disable_dpms(struct smu_context *smu)
> >                       dev_err(adev->dev, "Failed to disable smu features.\n");
> >       }
> >
> > +     if (smu->is_apu) {
> > +             ret = smu_notify_rlc_status(smu, 0);
> > +             if (ret) {
> > +                     dev_info(adev->dev, "Failed to notify rlc status!\n");
> > +                     return ret;
> > +             }
> > +     }
> > +
> >       if (adev->asic_type >= CHIP_NAVI10 &&
> >           adev->gfx.rlc.funcs->stop)
> >               adev->gfx.rlc.funcs->stop(adev);
> > --
> > 2.17.1
> >
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7Clijo.lazar%40amd.com%7C346c5521a1e848a40efe08d89b7a6ca7%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637430297401242320%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=6t589ueoS0x26%2FdpzSdtQmjkRygo4ez11t0GuBMacyg%3D&amp;reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx