* [PATCH] drm/amd/powerplay: sort feature status index by asic feature id for smu
@ 2019-07-31 7:51 Wang, Kevin(Yang)
[not found] ` <20190731075035.32068-1-kevin1.wang-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 4+ messages in thread
From: Wang, Kevin(Yang) @ 2019-07-31 7:51 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Deucher, Alexander, Huang, Ray, Feng, Kenneth, Wang, Kevin(Yang)
before this change, the pp_feature sysfs show feature enable state by
logic feature id, it is not easy to read.
this change will sort pp_features show index by asic feature id.
before:
features high: 0x00000623 low: 0xb3cdaffb
00. DPM_PREFETCHER ( 0) : enabeld
01. DPM_GFXCLK ( 1) : enabeld
02. DPM_UCLK ( 3) : enabeld
03. DPM_SOCCLK ( 4) : enabeld
04. DPM_MP0CLK ( 5) : enabeld
05. DPM_LINK ( 6) : enabeld
06. DPM_DCEFCLK ( 7) : enabeld
07. DS_GFXCLK (10) : enabeld
08. DS_SOCCLK (11) : enabeld
09. DS_LCLK (12) : disabled
10. PPT (23) : enabeld
11. TDC (24) : enabeld
12. THERMAL (33) : enabeld
13. RM (35) : disabled
......
after:
features high: 0x00000623 low: 0xb3cdaffb
00. DPM_PREFETCHER ( 0) : enabeld
01. DPM_GFXCLK ( 1) : enabeld
02. DPM_GFX_PACE ( 2) : disabled
03. DPM_UCLK ( 3) : enabeld
04. DPM_SOCCLK ( 4) : enabeld
05. DPM_MP0CLK ( 5) : enabeld
06. DPM_LINK ( 6) : enabeld
07. DPM_DCEFCLK ( 7) : enabeld
08. MEM_VDDCI_SCALING ( 8) : enabeld
09. MEM_MVDD_SCALING ( 9) : enabeld
10. DS_GFXCLK (10) : enabeld
11. DS_SOCCLK (11) : enabeld
12. DS_LCLK (12) : disabled
13. DS_DCEFCLK (13) : enabeld
......
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index eabe8a6d0eb7..9e256aa3b357 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -62,6 +62,8 @@ size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf)
uint32_t feature_mask[2] = { 0 };
int32_t feature_index = 0;
uint32_t count = 0;
+ uint32_t sort_feature[SMU_FEATURE_COUNT];
+ uint64_t hw_feature_count = 0;
ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);
if (ret)
@@ -74,11 +76,17 @@ size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf)
feature_index = smu_feature_get_index(smu, i);
if (feature_index < 0)
continue;
+ sort_feature[feature_index] = i;
+ hw_feature_count++;
+ }
+
+ for (i = 0; i < hw_feature_count; i++) {
size += sprintf(buf + size, "%02d. %-20s (%2d) : %s\n",
count++,
- smu_get_feature_name(smu, i),
- feature_index,
- !!smu_feature_is_enabled(smu, i) ? "enabeld" : "disabled");
+ smu_get_feature_name(smu, sort_feature[i]),
+ i,
+ !!smu_feature_is_enabled(smu, sort_feature[i]) ?
+ "enabeld" : "disabled");
}
failed:
--
2.22.0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread[parent not found: <20190731075035.32068-1-kevin1.wang-5C7GfCeVMHo@public.gmane.org>]
* Re: [PATCH] drm/amd/powerplay: sort feature status index by asic feature id for smu [not found] ` <20190731075035.32068-1-kevin1.wang-5C7GfCeVMHo@public.gmane.org> @ 2019-08-01 2:43 ` Kevin Wang [not found] ` <2ad27a68-2b1c-ad70-d1e7-330e6f3c2496-5C7GfCeVMHo@public.gmane.org> 0 siblings, 1 reply; 4+ messages in thread From: Kevin Wang @ 2019-08-01 2:43 UTC (permalink / raw) To: Wang, Kevin(Yang), amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Cc: Deucher, Alexander, Huang, Ray, Feng, Kenneth ping... please help me review it , thanks. BR Kevin On 7/31/19 3:51 PM, Wang, Kevin(Yang) wrote: > before this change, the pp_feature sysfs show feature enable state by > logic feature id, it is not easy to read. > this change will sort pp_features show index by asic feature id. > > before: > features high: 0x00000623 low: 0xb3cdaffb > 00. DPM_PREFETCHER ( 0) : enabeld > 01. DPM_GFXCLK ( 1) : enabeld > 02. DPM_UCLK ( 3) : enabeld > 03. DPM_SOCCLK ( 4) : enabeld > 04. DPM_MP0CLK ( 5) : enabeld > 05. DPM_LINK ( 6) : enabeld > 06. DPM_DCEFCLK ( 7) : enabeld > 07. DS_GFXCLK (10) : enabeld > 08. DS_SOCCLK (11) : enabeld > 09. DS_LCLK (12) : disabled > 10. PPT (23) : enabeld > 11. TDC (24) : enabeld > 12. THERMAL (33) : enabeld > 13. RM (35) : disabled > ...... > > after: > features high: 0x00000623 low: 0xb3cdaffb > 00. DPM_PREFETCHER ( 0) : enabeld > 01. DPM_GFXCLK ( 1) : enabeld > 02. DPM_GFX_PACE ( 2) : disabled > 03. DPM_UCLK ( 3) : enabeld > 04. DPM_SOCCLK ( 4) : enabeld > 05. DPM_MP0CLK ( 5) : enabeld > 06. DPM_LINK ( 6) : enabeld > 07. DPM_DCEFCLK ( 7) : enabeld > 08. MEM_VDDCI_SCALING ( 8) : enabeld > 09. MEM_MVDD_SCALING ( 9) : enabeld > 10. DS_GFXCLK (10) : enabeld > 11. DS_SOCCLK (11) : enabeld > 12. DS_LCLK (12) : disabled > 13. DS_DCEFCLK (13) : enabeld > ...... > > Signed-off-by: Kevin Wang <kevin1.wang@amd.com> > --- > drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > index eabe8a6d0eb7..9e256aa3b357 100644 > --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > @@ -62,6 +62,8 @@ size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf) > uint32_t feature_mask[2] = { 0 }; > int32_t feature_index = 0; > uint32_t count = 0; > + uint32_t sort_feature[SMU_FEATURE_COUNT]; > + uint64_t hw_feature_count = 0; > > ret = smu_feature_get_enabled_mask(smu, feature_mask, 2); > if (ret) > @@ -74,11 +76,17 @@ size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf) > feature_index = smu_feature_get_index(smu, i); > if (feature_index < 0) > continue; > + sort_feature[feature_index] = i; > + hw_feature_count++; > + } > + > + for (i = 0; i < hw_feature_count; i++) { > size += sprintf(buf + size, "%02d. %-20s (%2d) : %s\n", > count++, > - smu_get_feature_name(smu, i), > - feature_index, > - !!smu_feature_is_enabled(smu, i) ? "enabeld" : "disabled"); > + smu_get_feature_name(smu, sort_feature[i]), > + i, > + !!smu_feature_is_enabled(smu, sort_feature[i]) ? > + "enabeld" : "disabled"); > } > > failed: _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 4+ messages in thread
[parent not found: <2ad27a68-2b1c-ad70-d1e7-330e6f3c2496-5C7GfCeVMHo@public.gmane.org>]
* RE: [PATCH] drm/amd/powerplay: sort feature status index by asic feature id for smu [not found] ` <2ad27a68-2b1c-ad70-d1e7-330e6f3c2496-5C7GfCeVMHo@public.gmane.org> @ 2019-08-01 3:24 ` Quan, Evan 2019-08-01 3:43 ` Feng, Kenneth 1 sibling, 0 replies; 4+ messages in thread From: Quan, Evan @ 2019-08-01 3:24 UTC (permalink / raw) To: Wang, Kevin(Yang); +Cc: Deucher, Alexander, Huang, Ray, Feng, Kenneth Reviewed-by: Evan Quan <evan.quan@amd.com> > -----Original Message----- > From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of > Kevin Wang > Sent: Thursday, August 01, 2019 10:44 AM > To: Wang, Kevin(Yang) <Kevin1.Wang@amd.com>; amd- > gfx@lists.freedesktop.org > Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Huang, Ray > <Ray.Huang@amd.com>; Feng, Kenneth <Kenneth.Feng@amd.com> > Subject: Re: [PATCH] drm/amd/powerplay: sort feature status index by asic > feature id for smu > > ping... > > please help me review it , thanks. > > BR > Kevin > > On 7/31/19 3:51 PM, Wang, Kevin(Yang) wrote: > > before this change, the pp_feature sysfs show feature enable state by > > logic feature id, it is not easy to read. > > this change will sort pp_features show index by asic feature id. > > > > before: > > features high: 0x00000623 low: 0xb3cdaffb > > 00. DPM_PREFETCHER ( 0) : enabeld > > 01. DPM_GFXCLK ( 1) : enabeld > > 02. DPM_UCLK ( 3) : enabeld > > 03. DPM_SOCCLK ( 4) : enabeld > > 04. DPM_MP0CLK ( 5) : enabeld > > 05. DPM_LINK ( 6) : enabeld > > 06. DPM_DCEFCLK ( 7) : enabeld > > 07. DS_GFXCLK (10) : enabeld > > 08. DS_SOCCLK (11) : enabeld > > 09. DS_LCLK (12) : disabled > > 10. PPT (23) : enabeld > > 11. TDC (24) : enabeld > > 12. THERMAL (33) : enabeld > > 13. RM (35) : disabled > > ...... > > > > after: > > features high: 0x00000623 low: 0xb3cdaffb > > 00. DPM_PREFETCHER ( 0) : enabeld > > 01. DPM_GFXCLK ( 1) : enabeld > > 02. DPM_GFX_PACE ( 2) : disabled > > 03. DPM_UCLK ( 3) : enabeld > > 04. DPM_SOCCLK ( 4) : enabeld > > 05. DPM_MP0CLK ( 5) : enabeld > > 06. DPM_LINK ( 6) : enabeld > > 07. DPM_DCEFCLK ( 7) : enabeld > > 08. MEM_VDDCI_SCALING ( 8) : enabeld > > 09. MEM_MVDD_SCALING ( 9) : enabeld > > 10. DS_GFXCLK (10) : enabeld > > 11. DS_SOCCLK (11) : enabeld > > 12. DS_LCLK (12) : disabled > > 13. DS_DCEFCLK (13) : enabeld > > ...... > > > > Signed-off-by: Kevin Wang <kevin1.wang@amd.com> > > --- > > drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 14 +++++++++++--- > > 1 file changed, 11 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > > b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > > index eabe8a6d0eb7..9e256aa3b357 100644 > > --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > > +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > > @@ -62,6 +62,8 @@ size_t smu_sys_get_pp_feature_mask(struct > smu_context *smu, char *buf) > > uint32_t feature_mask[2] = { 0 }; > > int32_t feature_index = 0; > > uint32_t count = 0; > > + uint32_t sort_feature[SMU_FEATURE_COUNT]; > > + uint64_t hw_feature_count = 0; > > > > ret = smu_feature_get_enabled_mask(smu, feature_mask, 2); > > if (ret) > > @@ -74,11 +76,17 @@ size_t smu_sys_get_pp_feature_mask(struct > smu_context *smu, char *buf) > > feature_index = smu_feature_get_index(smu, i); > > if (feature_index < 0) > > continue; > > + sort_feature[feature_index] = i; > > + hw_feature_count++; > > + } > > + > > + for (i = 0; i < hw_feature_count; i++) { > > size += sprintf(buf + size, "%02d. %-20s (%2d) : %s\n", > > count++, > > - smu_get_feature_name(smu, i), > > - feature_index, > > - !!smu_feature_is_enabled(smu, i) ? "enabeld" : > "disabled"); > > + smu_get_feature_name(smu, sort_feature[i]), > > + i, > > + !!smu_feature_is_enabled(smu, sort_feature[i]) ? > > + "enabeld" : "disabled"); > > } > > > > failed: > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH] drm/amd/powerplay: sort feature status index by asic feature id for smu [not found] ` <2ad27a68-2b1c-ad70-d1e7-330e6f3c2496-5C7GfCeVMHo@public.gmane.org> 2019-08-01 3:24 ` Quan, Evan @ 2019-08-01 3:43 ` Feng, Kenneth 1 sibling, 0 replies; 4+ messages in thread From: Feng, Kenneth @ 2019-08-01 3:43 UTC (permalink / raw) To: Wang, Kevin(Yang), amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Cc: Deucher, Alexander, Huang, Ray Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> -----Original Message----- From: Wang, Kevin(Yang) Sent: Thursday, August 01, 2019 10:44 AM To: Wang, Kevin(Yang) <Kevin1.Wang@amd.com>; amd-gfx@lists.freedesktop.org Cc: Feng, Kenneth <Kenneth.Feng@amd.com>; Huang, Ray <Ray.Huang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com> Subject: Re: [PATCH] drm/amd/powerplay: sort feature status index by asic feature id for smu ping... please help me review it , thanks. BR Kevin On 7/31/19 3:51 PM, Wang, Kevin(Yang) wrote: > before this change, the pp_feature sysfs show feature enable state by > logic feature id, it is not easy to read. > this change will sort pp_features show index by asic feature id. > > before: > features high: 0x00000623 low: 0xb3cdaffb > 00. DPM_PREFETCHER ( 0) : enabeld > 01. DPM_GFXCLK ( 1) : enabeld > 02. DPM_UCLK ( 3) : enabeld > 03. DPM_SOCCLK ( 4) : enabeld > 04. DPM_MP0CLK ( 5) : enabeld > 05. DPM_LINK ( 6) : enabeld > 06. DPM_DCEFCLK ( 7) : enabeld > 07. DS_GFXCLK (10) : enabeld > 08. DS_SOCCLK (11) : enabeld > 09. DS_LCLK (12) : disabled > 10. PPT (23) : enabeld > 11. TDC (24) : enabeld > 12. THERMAL (33) : enabeld > 13. RM (35) : disabled > ...... > > after: > features high: 0x00000623 low: 0xb3cdaffb > 00. DPM_PREFETCHER ( 0) : enabeld > 01. DPM_GFXCLK ( 1) : enabeld > 02. DPM_GFX_PACE ( 2) : disabled > 03. DPM_UCLK ( 3) : enabeld > 04. DPM_SOCCLK ( 4) : enabeld > 05. DPM_MP0CLK ( 5) : enabeld > 06. DPM_LINK ( 6) : enabeld > 07. DPM_DCEFCLK ( 7) : enabeld > 08. MEM_VDDCI_SCALING ( 8) : enabeld > 09. MEM_MVDD_SCALING ( 9) : enabeld > 10. DS_GFXCLK (10) : enabeld > 11. DS_SOCCLK (11) : enabeld > 12. DS_LCLK (12) : disabled > 13. DS_DCEFCLK (13) : enabeld > ...... > > Signed-off-by: Kevin Wang <kevin1.wang@amd.com> > --- > drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > index eabe8a6d0eb7..9e256aa3b357 100644 > --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > @@ -62,6 +62,8 @@ size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf) > uint32_t feature_mask[2] = { 0 }; > int32_t feature_index = 0; > uint32_t count = 0; > + uint32_t sort_feature[SMU_FEATURE_COUNT]; > + uint64_t hw_feature_count = 0; > > ret = smu_feature_get_enabled_mask(smu, feature_mask, 2); > if (ret) > @@ -74,11 +76,17 @@ size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf) > feature_index = smu_feature_get_index(smu, i); > if (feature_index < 0) > continue; > + sort_feature[feature_index] = i; > + hw_feature_count++; > + } > + > + for (i = 0; i < hw_feature_count; i++) { > size += sprintf(buf + size, "%02d. %-20s (%2d) : %s\n", > count++, > - smu_get_feature_name(smu, i), > - feature_index, > - !!smu_feature_is_enabled(smu, i) ? "enabeld" : "disabled"); > + smu_get_feature_name(smu, sort_feature[i]), > + i, > + !!smu_feature_is_enabled(smu, sort_feature[i]) ? > + "enabeld" : "disabled"); > } > > failed: _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2019-08-01 3:43 UTC | newest]
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2019-07-31 7:51 [PATCH] drm/amd/powerplay: sort feature status index by asic feature id for smu Wang, Kevin(Yang)
[not found] ` <20190731075035.32068-1-kevin1.wang-5C7GfCeVMHo@public.gmane.org>
2019-08-01 2:43 ` Kevin Wang
[not found] ` <2ad27a68-2b1c-ad70-d1e7-330e6f3c2496-5C7GfCeVMHo@public.gmane.org>
2019-08-01 3:24 ` Quan, Evan
2019-08-01 3:43 ` Feng, Kenneth
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