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From: Pragnesh Patel <pragnesh.patel@sifive.com>
To: u-boot@lists.denx.de
Subject: [PATCH v3 10/17] mtd: spi-nor-core: Get command opcode extension type from BFPT
Date: Mon, 18 May 2020 14:31:26 +0000	[thread overview]
Message-ID: <MN2PR13MB2797A9A14A24AB1C837A132FE5B80@MN2PR13MB2797.namprd13.prod.outlook.com> (raw)
In-Reply-To: <20200330154550.21179-11-p.yadav@ti.com>

Hi Pratyush,

>-----Original Message-----
>From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Pratyush Yadav
>Sent: 30 March 2020 21:16
>To: Jagan Teki <jagan@amarulasolutions.com>; Vignesh Raghavendra
><vigneshr@ti.com>
>Cc: Pratyush Yadav <p.yadav@ti.com>; u-boot at lists.denx.de; Sekhar Nori
><nsekhar@ti.com>
>Subject: [PATCH v3 10/17] mtd: spi-nor-core: Get command opcode extension
>type from BFPT
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>Some devices in DTR mode expect an extra command byte called the
>extension. The extension can either be same as the opcode, bitwise inverse of
>the opcode, or another additional byte forming a 16-byte opcode. Get the
>extension type from the BFPT. For now, only flashes with "repeat" and
>"inverse" extensions are supported.
>
>As of JESD216D.01, BFPT is 20 DWORDs, so update the table size to reflect
>that.
>
>Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
>---
> drivers/mtd/spi/spi-nor-core.c | 28 ++++++++++++++++++++++++++--
> 1 file changed, 26 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
>index d3f05e1ded..684a8c3216 100644
>--- a/drivers/mtd/spi/spi-nor-core.c
>+++ b/drivers/mtd/spi/spi-nor-core.c
>@@ -75,11 +75,11 @@ struct sfdp_header {
> /* Basic Flash Parameter Table */
>
> /*
>- * JESD216 rev B defines a Basic Flash Parameter Table of 16 DWORDs.
>+ * JESD216 rev D defines a Basic Flash Parameter Table of 20 DWORDs.
>  * They are indexed from 1 but C arrays are indexed from 0.
>  */
> #define BFPT_DWORD(i)          ((i) - 1)
>-#define BFPT_DWORD_MAX         16
>+#define BFPT_DWORD_MAX         20

If we will change this according to rev D then you should also consider other revisions (rev B) because
below condition will return 0 for revisions lower than rev D.

static int spi_nor_parse_bfpt() {
......
	1943         /* Stop here if not JESD216 rev A or later. */
	1944         if (bfpt_header->length < BFPT_DWORD_MAX)
	1945                 return 0;
.....
}

For flashes which does not support rev D will return from here.

>
> /* The first version of JESB216 defined only 9 DWORDs. */
> #define BFPT_DWORD_MAX_JESD216                 9
>@@ -144,6 +144,12 @@ struct sfdp_header {
> #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD                (0x4UL << 20)
> #define BFPT_DWORD15_QER_SR2_BIT1              (0x5UL << 20) /* Spansion */
>
>+#define BFPT_DWORD18_CMD_EXT_MASK              GENMASK(30, 29)
>+#define BFPT_DWORD18_CMD_EXT_REP               (0x0UL << 29) /* Repeat */
>+#define BFPT_DWORD18_CMD_EXT_INV               (0x1UL << 29) /* Invert */
>+#define BFPT_DWORD18_CMD_EXT_RES               (0x2UL << 29) /* Reserved
>*/
>+#define BFPT_DWORD18_CMD_EXT_16B               (0x3UL << 29) /* 16-bit
>opcode */
>+
> struct sfdp_bfpt {
>        u32     dwords[BFPT_DWORD_MAX];
> };
>@@ -2021,6 +2027,24 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
>                return -EINVAL;
>        }
>
>+       /* 8D-8D-8D command extension. */
>+       switch (bfpt.dwords[BFPT_DWORD(18)] &
>BFPT_DWORD18_CMD_EXT_MASK) {
>+       case BFPT_DWORD18_CMD_EXT_REP:
>+               nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
>+               break;
>+
>+       case BFPT_DWORD18_CMD_EXT_INV:
>+               nor->cmd_ext_type = SPI_NOR_EXT_INVERT;
>+               break;
>+
>+       case BFPT_DWORD18_CMD_EXT_RES:
>+               return -EINVAL;
>+
>+       case BFPT_DWORD18_CMD_EXT_16B:
>+               dev_err(nor->dev, "16-bit opcodes not supported\n");
>+               return -ENOTSUPP;
>+       }
>+
>        return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params);  }
>
>--
>2.25.0

  reply	other threads:[~2020-05-18 14:31 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-30 15:45 [PATCH v3 00/17] mtd: spi-nor-core: add xSPI Octal DTR support Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 01/17] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 02/17] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 03/17] spi: cadence-qspi: Do not calibrate when device tree sets read delay Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 04/17] spi: cadence-qspi: Add support for octal DTR flashes Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 05/17] mtd: spi-nor-core: Add a ->setup() hook Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 06/17] mtd: spi-nor-core: Move SFDP related declarations to top Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 07/17] mtd: spi-nor-core: Introduce flash-specific fixup hooks Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 08/17] mtd: spi-nor-core: Rework hwcaps selection Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 09/17] mtd: spi-nor-core: Add support for DTR protocol Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 10/17] mtd: spi-nor-core: Get command opcode extension type from BFPT Pratyush Yadav
2020-05-18 14:31   ` Pragnesh Patel [this message]
2020-05-18 18:33     ` Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 11/17] mtd: spi-nor-core: Parse xSPI Profile 1.0 table Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 12/17] mtd: spi-nor-core: Prepare Read SR and FSR for Octal DTR mode Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 13/17] mtd: spi-nor-core: Enable octal DTR mode when possible Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 14/17] mtd: spi-nor-core: Perform a Soft Reset on shutdown Pratyush Yadav
2020-05-13  6:44   ` Jagan Teki
2020-05-19 15:09     ` Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 15/17] mtd: spi-nor-core: Perform a Soft Reset on boot Pratyush Yadav
2020-05-13  6:47   ` Jagan Teki
2020-05-13  8:54     ` Pratyush Yadav
2020-05-13  9:56       ` Jagan Teki
2020-05-13 11:04         ` Pratyush Yadav
2020-05-15  7:42           ` Jagan Teki
2020-05-19 15:33             ` Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 16/17] mtd: spi-nor-core: Add support for Cypress Semper flash Pratyush Yadav
2020-03-30 15:45 ` [PATCH v3 17/17] mtd: spi-nor-core: Allow using Micron mt35xu512aba in Octal DTR mode Pratyush Yadav
2020-04-21  7:49 ` [PATCH v3 00/17] mtd: spi-nor-core: add xSPI Octal DTR support Pratyush Yadav
2020-04-21  8:09   ` Jagan Teki
2020-05-05  7:58   ` Vignesh Raghavendra
2020-05-12 16:43 ` Jagan Teki
2020-05-12 18:23   ` Pratyush Yadav

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