All of lore.kernel.org
 help / color / mirror / Atom feed
From: Corey Wharton <coreyw7@fb.com>
To: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>
Cc: Alistair Francis <Alistair.Francis@wdc.com>,
	Bin Meng <bmeng.cn@gmail.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Subject: Re: [PATCH v2 0/2] Support different CPU types for the sifive_e machine
Date: Mon, 6 Apr 2020 17:20:15 +0000	[thread overview]
Message-ID: <MW3PR15MB40416B8789C2C1C63997DF8793C20@MW3PR15MB4041.namprd15.prod.outlook.com> (raw)
In-Reply-To: <20200313193429.8035-1-coreyw7@fb.com>

[-- Attachment #1: Type: text/plain, Size: 1312 bytes --]

ping

https://patchwork.kernel.org/patch/11437661/
https://patchwork.kernel.org/patch/11437665/

________________________________
From: Corey Wharton <coreyw7@fb.com>
Sent: Friday, March 13, 2020 12:35 PM
To: qemu-devel@nongnu.org <qemu-devel@nongnu.org>; qemu-riscv@nongnu.org <qemu-riscv@nongnu.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>; Alistair Francis <Alistair.Francis@wdc.com>; Sagar Karandikar <sagark@eecs.berkeley.edu>; Bastian Koppelmann <kbastian@mail.uni-paderborn.de>; Bin Meng <bmeng.cn@gmail.com>; Corey Wharton <coreyw7@fb.com>
Subject: [PATCH v2 0/2] Support different CPU types for the sifive_e machine

The purpose of this patch set is to allow the sifive_e machine to run
with different CPU targets to enable different ISA entensions. To that
end it also introduces a new sifive-e34 CPU type which provides the
same ISA as sifive-e31, with the addition of the single precision
floating-point extension (f). The default CPU for the sifive_e machine
is unchanged.

v2: Added missing RVU flag

Corey Wharton (2):
  riscv: sifive_e: Support changing CPU type
  target/riscv: Add a sifive-e34 cpu type

 hw/riscv/sifive_e.c |  3 ++-
 target/riscv/cpu.c  | 10 ++++++++++
 target/riscv/cpu.h  |  1 +
 3 files changed, 13 insertions(+), 1 deletion(-)

--
2.21.1


[-- Attachment #2: Type: text/html, Size: 2527 bytes --]

WARNING: multiple messages have this Message-ID (diff)
From: Corey Wharton <coreyw7@fb.com>
To: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	Bin Meng <bmeng.cn@gmail.com>
Subject: Re: [PATCH v2 0/2] Support different CPU types for the sifive_e machine
Date: Mon, 6 Apr 2020 17:20:15 +0000	[thread overview]
Message-ID: <MW3PR15MB40416B8789C2C1C63997DF8793C20@MW3PR15MB4041.namprd15.prod.outlook.com> (raw)
In-Reply-To: <20200313193429.8035-1-coreyw7@fb.com>

[-- Attachment #1: Type: text/plain, Size: 1312 bytes --]

ping

https://patchwork.kernel.org/patch/11437661/
https://patchwork.kernel.org/patch/11437665/

________________________________
From: Corey Wharton <coreyw7@fb.com>
Sent: Friday, March 13, 2020 12:35 PM
To: qemu-devel@nongnu.org <qemu-devel@nongnu.org>; qemu-riscv@nongnu.org <qemu-riscv@nongnu.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>; Alistair Francis <Alistair.Francis@wdc.com>; Sagar Karandikar <sagark@eecs.berkeley.edu>; Bastian Koppelmann <kbastian@mail.uni-paderborn.de>; Bin Meng <bmeng.cn@gmail.com>; Corey Wharton <coreyw7@fb.com>
Subject: [PATCH v2 0/2] Support different CPU types for the sifive_e machine

The purpose of this patch set is to allow the sifive_e machine to run
with different CPU targets to enable different ISA entensions. To that
end it also introduces a new sifive-e34 CPU type which provides the
same ISA as sifive-e31, with the addition of the single precision
floating-point extension (f). The default CPU for the sifive_e machine
is unchanged.

v2: Added missing RVU flag

Corey Wharton (2):
  riscv: sifive_e: Support changing CPU type
  target/riscv: Add a sifive-e34 cpu type

 hw/riscv/sifive_e.c |  3 ++-
 target/riscv/cpu.c  | 10 ++++++++++
 target/riscv/cpu.h  |  1 +
 3 files changed, 13 insertions(+), 1 deletion(-)

--
2.21.1


[-- Attachment #2: Type: text/html, Size: 2527 bytes --]

  parent reply	other threads:[~2020-04-06 17:21 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-13 19:34 [PATCH v2 0/2] Support different CPU types for the sifive_e machine Corey Wharton
2020-03-13 19:34 ` Corey Wharton
2020-03-13 19:34 ` [PATCH v2 1/2] riscv: sifive_e: Support changing CPU type Corey Wharton
2020-03-13 19:34   ` Corey Wharton
2020-03-13 19:46   ` Philippe Mathieu-Daudé
2020-03-13 19:46     ` Philippe Mathieu-Daudé
2020-04-24 16:03   ` Alistair Francis
2020-04-24 16:03     ` Alistair Francis
2020-04-24 19:12     ` Corey Wharton
2020-04-24 19:40       ` Alistair Francis
2020-04-24 19:40         ` Alistair Francis
2020-03-13 19:34 ` [PATCH v2 2/2] target/riscv: Add a sifive-e34 cpu type Corey Wharton
2020-03-13 19:34   ` Corey Wharton
2020-03-13 20:00   ` Alistair Francis
2020-03-13 20:00     ` Alistair Francis
2020-03-14  2:47   ` Bin Meng
2020-03-14  2:47     ` Bin Meng
2020-04-06 17:20 ` Corey Wharton [this message]
2020-04-06 17:20   ` [PATCH v2 0/2] Support different CPU types for the sifive_e machine Corey Wharton
2020-04-20 19:22 ` Alistair Francis
2020-04-20 19:22   ` Alistair Francis

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=MW3PR15MB40416B8789C2C1C63997DF8793C20@MW3PR15MB4041.namprd15.prod.outlook.com \
    --to=coreyw7@fb.com \
    --cc=Alistair.Francis@wdc.com \
    --cc=bmeng.cn@gmail.com \
    --cc=kbastian@mail.uni-paderborn.de \
    --cc=palmer@dabbelt.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=sagark@eecs.berkeley.edu \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.