[PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

[PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

[Zeng, Oak]

Different ASIC has different sdma doorbell range. Add
a per device sdma_doorbell_range field and initialize
it.

Change-Id: Idd980db1a72cfb373e24ac23ba3e48bb329ed4ad
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 2 ++
 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 1 +
 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 1 +
 3 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
index 35a0c05..1cfec06 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
@@ -72,6 +72,8 @@ struct amdgpu_doorbell_index {
 		} uvd_vce;
 	};
 	uint32_t max_assignment;
+	/* Per engine SDMA doorbell size in dword */
+	uint32_t sdma_doorbell_range;
 };
 
 typedef enum _AMDGPU_DOORBELL_ASSIGNMENT
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
index b75d17b..4b5d60e 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
@@ -83,5 +83,6 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
 	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
 	/* In unit of dword doorbell */
 	adev->doorbell_index.max_assignment = AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1;
+	adev->doorbell_index.sdma_doorbell_range = 4;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
index 63c542c..53716c5 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
@@ -86,5 +86,6 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
 	adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5;
 	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7;
 	adev->doorbell_index.max_assignment = AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1;
+	adev->doorbell_index.sdma_doorbell_range = 20;
 }
 
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 2/2] drm/amdgpu: Fix sdma doorbell range setting

[Zeng, Oak]

Different ASIC has different SDMA queues so different
SDMA doorbell range. Introduce an extra parameter
to sdma_doorbell_range function and set sdma doorbell
range correctly.

Change-Id: I9b8d75b04f5a47ef1c6fd7cc1caaefd98dd2ff2b
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h    | 2 +-
 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 ++-
 5 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index bcef6ea..5a7907b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -634,7 +634,7 @@ struct amdgpu_nbio_funcs {
 	void (*hdp_flush)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
 	u32 (*get_memsize)(struct amdgpu_device *adev);
 	void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance,
-				    bool use_doorbell, int doorbell_index);
+			bool use_doorbell, int doorbell_index, int doorbell_size);
 	void (*enable_doorbell_aperture)(struct amdgpu_device *adev,
 					 bool enable);
 	void (*enable_doorbell_selfring_aperture)(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
index 6f9c549..1eeb318 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
@@ -71,7 +71,7 @@ static u32 nbio_v6_1_get_memsize(struct amdgpu_device *adev)
 }
 
 static void nbio_v6_1_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
-				  bool use_doorbell, int doorbell_index)
+			bool use_doorbell, int doorbell_index, int doorbell_size)
 {
 	u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
 			SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
@@ -80,7 +80,7 @@ static void nbio_v6_1_sdma_doorbell_range(struct amdgpu_device *adev, int instan
 
 	if (use_doorbell) {
 		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
-		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 2);
+		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
 	} else
 		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
index df34dc7..d80413d 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
@@ -69,7 +69,7 @@ static u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev)
 }
 
 static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
-					  bool use_doorbell, int doorbell_index)
+			bool use_doorbell, int doorbell_index, int doorbell_size)
 {
 	u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
 			SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
@@ -78,7 +78,7 @@ static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instan
 
 	if (use_doorbell) {
 		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
-		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 2);
+		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
 	} else
 		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index f8cee95..27976b3 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
@@ -67,7 +67,7 @@ static u32 nbio_v7_4_get_memsize(struct amdgpu_device *adev)
 }
 
 static void nbio_v7_4_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
-					  bool use_doorbell, int doorbell_index)
+			bool use_doorbell, int doorbell_index, int doorbell_size)
 {
 	u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
 			SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
@@ -76,7 +76,7 @@ static void nbio_v7_4_sdma_doorbell_range(struct amdgpu_device *adev, int instan
 
 	if (use_doorbell) {
 		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
-		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 2);
+		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
 	} else
 		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 42b419d..96b160d 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -834,7 +834,8 @@ static void sdma_v4_0_gfx_resume(struct amdgpu_device *adev, unsigned int i)
 	WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL, doorbell);
 	WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL_OFFSET, doorbell_offset);
 	adev->nbio_funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,
-					      ring->doorbell_index);
+					      ring->doorbell_index,
+					      adev->doorbell_index.sdma_doorbell_range);
 
 	sdma_v4_0_ring_set_wptr(ring);
 
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

[Yang, Philip]

On 2018-12-17 9:12 p.m., Zeng, Oak wrote:
> Different ASIC has different sdma doorbell range. Add
> a per device sdma_doorbell_range field and initialize
> it.
> 
> Change-Id: Idd980db1a72cfb373e24ac23ba3e48bb329ed4ad
> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 2 ++
>   drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 1 +
>   drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 1 +
>   3 files changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> index 35a0c05..1cfec06 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> @@ -72,6 +72,8 @@ struct amdgpu_doorbell_index {
>   		} uvd_vce;
>   	};
>   	uint32_t max_assignment;
> +	/* Per engine SDMA doorbell size in dword */
> +	uint32_t sdma_doorbell_range;
>   };
>   
>   typedef enum _AMDGPU_DOORBELL_ASSIGNMENT
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> index b75d17b..4b5d60e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> @@ -83,5 +83,6 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
>   	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
>   	/* In unit of dword doorbell */
>   	adev->doorbell_index.max_assignment = AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1;
> +	adev->doorbell_index.sdma_doorbell_range = 4;
Vega10 doorbell range was 2 dwords (one 64bit doorbell), change to 4 
dwords may not work under SRIOV
>   }
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> index 63c542c..53716c5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> @@ -86,5 +86,6 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
>   	adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5;
>   	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7;
>   	adev->doorbell_index.max_assignment = AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1;
> +	adev->doorbell_index.sdma_doorbell_range = 20;
>   }
>   
> 
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

RE: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

[Zeng, Oak]

Thanks Philip.

For vega10, sdma doorbells are defined to be windows sriov compatible. Two qwords doorbell are defined for each sdma engine. See amdgpu_doorbell.h line 192. So program nbio sdma doorbell routing range to 4 (dwords) is correct. I am not sure why previously the doorbell range was programmed to 2, even though it is defined 4. @Partap Singh Rana, Dhirendra what value windows does host driver program BIF_SDMA0_DOORBELL_RANGE.SIZE for vega10? 

@Deng, Emily I saw previously you changed the vega10 doorbell assignment for sriov. Did you copy the assignment from windows host driver? If yes, I assume windows host should set the bif doorbell range to 4 dwords, according to the assignment. Does changing bif doorbell range to 4 conflict with windows host driver?

People might wonder why programming it to 2 also worked before. The reason is, currently amdgpu only use one sdma ring per sdma engine. So it never used the "HI_PRI" ring and doorbell. Kfd uses two sdma rings per sdma engine, but for the second ring, it uses a doorbell with the same in page offset (0xf0) but mapped to the second doorbell page of the process.

So my understanding is, setting the doorbell range to 4 (see patch 2 of this series) is more consistent and no harm for current usage model. If we use it in the future, it should be fine. But let's see what is the windows host driver setting. 

Regards,
Oak

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Yang, Philip
Sent: Tuesday, December 18, 2018 9:57 AM
To: Zeng, Oak <Oak.Zeng@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field



On 2018-12-17 9:12 p.m., Zeng, Oak wrote:
> Different ASIC has different sdma doorbell range. Add a per device 
> sdma_doorbell_range field and initialize it.
> 
> Change-Id: Idd980db1a72cfb373e24ac23ba3e48bb329ed4ad
> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 2 ++
>   drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 1 +
>   drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 1 +
>   3 files changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> index 35a0c05..1cfec06 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> @@ -72,6 +72,8 @@ struct amdgpu_doorbell_index {
>   		} uvd_vce;
>   	};
>   	uint32_t max_assignment;
> +	/* Per engine SDMA doorbell size in dword */
> +	uint32_t sdma_doorbell_range;
>   };
>   
>   typedef enum _AMDGPU_DOORBELL_ASSIGNMENT diff --git 
> a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c 
> b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> index b75d17b..4b5d60e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> @@ -83,5 +83,6 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
>   	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
>   	/* In unit of dword doorbell */
>   	adev->doorbell_index.max_assignment = 
> AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1;
> +	adev->doorbell_index.sdma_doorbell_range = 4;
Vega10 doorbell range was 2 dwords (one 64bit doorbell), change to 4 dwords may not work under SRIOV
>   }
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c 
> b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> index 63c542c..53716c5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> @@ -86,5 +86,6 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
>   	adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5;
>   	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7;
>   	adev->doorbell_index.max_assignment = 
> AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1;
> +	adev->doorbell_index.sdma_doorbell_range = 20;
>   }
>   
> 
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

RE: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

[Partap Singh Rana, Dhirendra]

Hi Oak,

Windows will set 4 dwords for both sdma0 and 1.

Thanks,
Dhiren

-----Original Message-----
From: Zeng, Oak 
Sent: Tuesday, December 18, 2018 10:52 AM
To: Yang, Philip <Philip.Yang@amd.com>; amd-gfx@lists.freedesktop.org; Partap Singh Rana, Dhirendra <Dhirendra.PartapSinghRana@amd.com>; Deng, Emily <Emily.Deng@amd.com>
Subject: RE: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

Thanks Philip.

For vega10, sdma doorbells are defined to be windows sriov compatible. Two qwords doorbell are defined for each sdma engine. See amdgpu_doorbell.h line 192. So program nbio sdma doorbell routing range to 4 (dwords) is correct. I am not sure why previously the doorbell range was programmed to 2, even though it is defined 4. @Partap Singh Rana, Dhirendra what value windows does host driver program BIF_SDMA0_DOORBELL_RANGE.SIZE for vega10? 

@Deng, Emily I saw previously you changed the vega10 doorbell assignment for sriov. Did you copy the assignment from windows host driver? If yes, I assume windows host should set the bif doorbell range to 4 dwords, according to the assignment. Does changing bif doorbell range to 4 conflict with windows host driver?

People might wonder why programming it to 2 also worked before. The reason is, currently amdgpu only use one sdma ring per sdma engine. So it never used the "HI_PRI" ring and doorbell. Kfd uses two sdma rings per sdma engine, but for the second ring, it uses a doorbell with the same in page offset (0xf0) but mapped to the second doorbell page of the process.

So my understanding is, setting the doorbell range to 4 (see patch 2 of this series) is more consistent and no harm for current usage model. If we use it in the future, it should be fine. But let's see what is the windows host driver setting. 

Regards,
Oak

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Yang, Philip
Sent: Tuesday, December 18, 2018 9:57 AM
To: Zeng, Oak <Oak.Zeng@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field



On 2018-12-17 9:12 p.m., Zeng, Oak wrote:
> Different ASIC has different sdma doorbell range. Add a per device 
> sdma_doorbell_range field and initialize it.
> 
> Change-Id: Idd980db1a72cfb373e24ac23ba3e48bb329ed4ad
> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 2 ++
>   drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 1 +
>   drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 1 +
>   3 files changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> index 35a0c05..1cfec06 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> @@ -72,6 +72,8 @@ struct amdgpu_doorbell_index {
>   		} uvd_vce;
>   	};
>   	uint32_t max_assignment;
> +	/* Per engine SDMA doorbell size in dword */
> +	uint32_t sdma_doorbell_range;
>   };
>   
>   typedef enum _AMDGPU_DOORBELL_ASSIGNMENT diff --git 
> a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> index b75d17b..4b5d60e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> @@ -83,5 +83,6 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
>   	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
>   	/* In unit of dword doorbell */
>   	adev->doorbell_index.max_assignment = 
> AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1;
> +	adev->doorbell_index.sdma_doorbell_range = 4;
Vega10 doorbell range was 2 dwords (one 64bit doorbell), change to 4 dwords may not work under SRIOV
>   }
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> index 63c542c..53716c5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> @@ -86,5 +86,6 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
>   	adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5;
>   	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7;
>   	adev->doorbell_index.max_assignment = 
> AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1;
> +	adev->doorbell_index.sdma_doorbell_range = 20;
>   }
>   
> 
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

RE: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

[Zeng, Oak]

Thank you Dhiren. So we will also set it to 4 in Linux device driver.

BTW, patch 2 set the doorbell range for vega20 from 2 to 20. With previous setting of 2, I believe only the first two user space sdma queues work. The rest 6 queues won't work because the doorbell ringing won't be routed to sdma engine due to previous bif doorbell range setting. 

Regards,
Oak

-----Original Message-----
From: Partap Singh Rana, Dhirendra <Dhirendra.PartapSinghRana@amd.com> 
Sent: Tuesday, December 18, 2018 11:34 AM
To: Zeng, Oak <Oak.Zeng@amd.com>; Yang, Philip <Philip.Yang@amd.com>; amd-gfx@lists.freedesktop.org; Deng, Emily <Emily.Deng@amd.com>
Subject: RE: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

Hi Oak,

Windows will set 4 dwords for both sdma0 and 1.

Thanks,
Dhiren

-----Original Message-----
From: Zeng, Oak
Sent: Tuesday, December 18, 2018 10:52 AM
To: Yang, Philip <Philip.Yang@amd.com>; amd-gfx@lists.freedesktop.org; Partap Singh Rana, Dhirendra <Dhirendra.PartapSinghRana@amd.com>; Deng, Emily <Emily.Deng@amd.com>
Subject: RE: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

Thanks Philip.

For vega10, sdma doorbells are defined to be windows sriov compatible. Two qwords doorbell are defined for each sdma engine. See amdgpu_doorbell.h line 192. So program nbio sdma doorbell routing range to 4 (dwords) is correct. I am not sure why previously the doorbell range was programmed to 2, even though it is defined 4. @Partap Singh Rana, Dhirendra what value windows does host driver program BIF_SDMA0_DOORBELL_RANGE.SIZE for vega10? 

@Deng, Emily I saw previously you changed the vega10 doorbell assignment for sriov. Did you copy the assignment from windows host driver? If yes, I assume windows host should set the bif doorbell range to 4 dwords, according to the assignment. Does changing bif doorbell range to 4 conflict with windows host driver?

People might wonder why programming it to 2 also worked before. The reason is, currently amdgpu only use one sdma ring per sdma engine. So it never used the "HI_PRI" ring and doorbell. Kfd uses two sdma rings per sdma engine, but for the second ring, it uses a doorbell with the same in page offset (0xf0) but mapped to the second doorbell page of the process.

So my understanding is, setting the doorbell range to 4 (see patch 2 of this series) is more consistent and no harm for current usage model. If we use it in the future, it should be fine. But let's see what is the windows host driver setting. 

Regards,
Oak

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Yang, Philip
Sent: Tuesday, December 18, 2018 9:57 AM
To: Zeng, Oak <Oak.Zeng@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field



On 2018-12-17 9:12 p.m., Zeng, Oak wrote:
> Different ASIC has different sdma doorbell range. Add a per device 
> sdma_doorbell_range field and initialize it.
> 
> Change-Id: Idd980db1a72cfb373e24ac23ba3e48bb329ed4ad
> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 2 ++
>   drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 1 +
>   drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 1 +
>   3 files changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> index 35a0c05..1cfec06 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> @@ -72,6 +72,8 @@ struct amdgpu_doorbell_index {
>   		} uvd_vce;
>   	};
>   	uint32_t max_assignment;
> +	/* Per engine SDMA doorbell size in dword */
> +	uint32_t sdma_doorbell_range;
>   };
>   
>   typedef enum _AMDGPU_DOORBELL_ASSIGNMENT diff --git 
> a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> index b75d17b..4b5d60e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> @@ -83,5 +83,6 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
>   	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
>   	/* In unit of dword doorbell */
>   	adev->doorbell_index.max_assignment = 
> AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1;
> +	adev->doorbell_index.sdma_doorbell_range = 4;
Vega10 doorbell range was 2 dwords (one 64bit doorbell), change to 4 dwords may not work under SRIOV
>   }
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> index 63c542c..53716c5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> @@ -86,5 +86,6 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
>   	adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5;
>   	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7;
>   	adev->doorbell_index.max_assignment = 
> AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1;
> +	adev->doorbell_index.sdma_doorbell_range = 20;
>   }
>   
> 
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

[Yang, Philip]

Thanks Oak for the clarification for Vega10.

For Vega20, 8 user space sdma queues should set doorbell range to 16, 
maybe you add gfx and page queue doorbell together to become 20? But gfx 
and page queue doorbell is on kernel space, user space sdma queues 
doorbell mapping is on user space, they can overlap and share same 
doorbell range.

Regards,
Philip

On 2018-12-18 11:43 a.m., Zeng, Oak wrote:
> Thank you Dhiren. So we will also set it to 4 in Linux device driver.
> 
> BTW, patch 2 set the doorbell range for vega20 from 2 to 20. With previous setting of 2, I believe only the first two user space sdma queues work. The rest 6 queues won't work because the doorbell ringing won't be routed to sdma engine due to previous bif doorbell range setting.
> 
> Regards,
> Oak
> 
> -----Original Message-----
> From: Partap Singh Rana, Dhirendra <Dhirendra.PartapSinghRana@amd.com>
> Sent: Tuesday, December 18, 2018 11:34 AM
> To: Zeng, Oak <Oak.Zeng@amd.com>; Yang, Philip <Philip.Yang@amd.com>; amd-gfx@lists.freedesktop.org; Deng, Emily <Emily.Deng@amd.com>
> Subject: RE: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field
> 
> Hi Oak,
> 
> Windows will set 4 dwords for both sdma0 and 1.
> 
> Thanks,
> Dhiren
> 
> -----Original Message-----
> From: Zeng, Oak
> Sent: Tuesday, December 18, 2018 10:52 AM
> To: Yang, Philip <Philip.Yang@amd.com>; amd-gfx@lists.freedesktop.org; Partap Singh Rana, Dhirendra <Dhirendra.PartapSinghRana@amd.com>; Deng, Emily <Emily.Deng@amd.com>
> Subject: RE: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field
> 
> Thanks Philip.
> 
> For vega10, sdma doorbells are defined to be windows sriov compatible. Two qwords doorbell are defined for each sdma engine. See amdgpu_doorbell.h line 192. So program nbio sdma doorbell routing range to 4 (dwords) is correct. I am not sure why previously the doorbell range was programmed to 2, even though it is defined 4. @Partap Singh Rana, Dhirendra what value windows does host driver program BIF_SDMA0_DOORBELL_RANGE.SIZE for vega10?
> 
> @Deng, Emily I saw previously you changed the vega10 doorbell assignment for sriov. Did you copy the assignment from windows host driver? If yes, I assume windows host should set the bif doorbell range to 4 dwords, according to the assignment. Does changing bif doorbell range to 4 conflict with windows host driver?
> 
> People might wonder why programming it to 2 also worked before. The reason is, currently amdgpu only use one sdma ring per sdma engine. So it never used the "HI_PRI" ring and doorbell. Kfd uses two sdma rings per sdma engine, but for the second ring, it uses a doorbell with the same in page offset (0xf0) but mapped to the second doorbell page of the process.
> 
> So my understanding is, setting the doorbell range to 4 (see patch 2 of this series) is more consistent and no harm for current usage model. If we use it in the future, it should be fine. But let's see what is the windows host driver setting.
> 
> Regards,
> Oak
> 
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Yang, Philip
> Sent: Tuesday, December 18, 2018 9:57 AM
> To: Zeng, Oak <Oak.Zeng@amd.com>; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field
> 
> 
> 
> On 2018-12-17 9:12 p.m., Zeng, Oak wrote:
>> Different ASIC has different sdma doorbell range. Add a per device
>> sdma_doorbell_range field and initialize it.
>>
>> Change-Id: Idd980db1a72cfb373e24ac23ba3e48bb329ed4ad
>> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
>> ---
>>    drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 2 ++
>>    drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 1 +
>>    drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 1 +
>>    3 files changed, 4 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> index 35a0c05..1cfec06 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> @@ -72,6 +72,8 @@ struct amdgpu_doorbell_index {
>>    		} uvd_vce;
>>    	};
>>    	uint32_t max_assignment;
>> +	/* Per engine SDMA doorbell size in dword */
>> +	uint32_t sdma_doorbell_range;
>>    };
>>    
>>    typedef enum _AMDGPU_DOORBELL_ASSIGNMENT diff --git
>> a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
>> b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
>> index b75d17b..4b5d60e 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
>> @@ -83,5 +83,6 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
>>    	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
>>    	/* In unit of dword doorbell */
>>    	adev->doorbell_index.max_assignment =
>> AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1;
>> +	adev->doorbell_index.sdma_doorbell_range = 4;
> Vega10 doorbell range was 2 dwords (one 64bit doorbell), change to 4 dwords may not work under SRIOV
>>    }
>>    
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
>> b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
>> index 63c542c..53716c5 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
>> @@ -86,5 +86,6 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
>>    	adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5;
>>    	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7;
>>    	adev->doorbell_index.max_assignment =
>> AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1;
>> +	adev->doorbell_index.sdma_doorbell_range = 20;
>>    }
>>    
>>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> 
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

RE: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

[Zeng, Oak]

The reason I set it to 20 is we reserved 10 doorbells for each sdma engine. See definition in amdgpu_doorbell.h, line 118. But setting it to 16 is fine as vega20 only have 8 sdma queues per engine. Since the vega20 doorbell layout will be reused for future asics. So setting it to 20 will cover asics which have 10 queues per engine, if there. 

Gfx and paging queue use the first and second doorbell page. Both of them can use up to 10 doorbells if they want.  

Regards,
Oak

-----Original Message-----
From: Yang, Philip <Philip.Yang@amd.com> 
Sent: Tuesday, December 18, 2018 12:02 PM
To: Zeng, Oak <Oak.Zeng@amd.com>; Partap Singh Rana, Dhirendra <Dhirendra.PartapSinghRana@amd.com>; amd-gfx@lists.freedesktop.org; Deng, Emily <Emily.Deng@amd.com>
Subject: Re: [PATCH 1/2] drm/amdgpu: Add per device sdma_doorbell_range field

Thanks Oak for the clarification for Vega10.

For Vega20, 8 user space sdma queues should set doorbell range to 16, maybe you add gfx and page queue doorbell together to become 20? But gfx and page queue doorbell is on kernel space, user space sdma queues doorbell mapping is on user space, they can overlap and share same doorbell range.

Regards,
Philip

On 2018-12-18 11:43 a.m., Zeng, Oak wrote:
> Thank you Dhiren. So we will also set it to 4 in Linux device driver.
> 
> BTW, patch 2 set the doorbell range for vega20 from 2 to 20. With previous setting of 2, I believe only the first two user space sdma queues work. The rest 6 queues won't work because the doorbell ringing won't be routed to sdma engine due to previous bif doorbell range setting.
> 
> Regards,
> Oak
> 
> -----Original Message-----
> From: Partap Singh Rana, Dhirendra <Dhirendra.PartapSinghRana@amd.com>
> Sent: Tuesday, December 18, 2018 11:34 AM
> To: Zeng, Oak <Oak.Zeng@amd.com>; Yang, Philip <Philip.Yang@amd.com>; 
> amd-gfx@lists.freedesktop.org; Deng, Emily <Emily.Deng@amd.com>
> Subject: RE: [PATCH 1/2] drm/amdgpu: Add per device 
> sdma_doorbell_range field
> 
> Hi Oak,
> 
> Windows will set 4 dwords for both sdma0 and 1.
> 
> Thanks,
> Dhiren
> 
> -----Original Message-----
> From: Zeng, Oak
> Sent: Tuesday, December 18, 2018 10:52 AM
> To: Yang, Philip <Philip.Yang@amd.com>; amd-gfx@lists.freedesktop.org; 
> Partap Singh Rana, Dhirendra <Dhirendra.PartapSinghRana@amd.com>; 
> Deng, Emily <Emily.Deng@amd.com>
> Subject: RE: [PATCH 1/2] drm/amdgpu: Add per device 
> sdma_doorbell_range field
> 
> Thanks Philip.
> 
> For vega10, sdma doorbells are defined to be windows sriov compatible. Two qwords doorbell are defined for each sdma engine. See amdgpu_doorbell.h line 192. So program nbio sdma doorbell routing range to 4 (dwords) is correct. I am not sure why previously the doorbell range was programmed to 2, even though it is defined 4. @Partap Singh Rana, Dhirendra what value windows does host driver program BIF_SDMA0_DOORBELL_RANGE.SIZE for vega10?
> 
> @Deng, Emily I saw previously you changed the vega10 doorbell assignment for sriov. Did you copy the assignment from windows host driver? If yes, I assume windows host should set the bif doorbell range to 4 dwords, according to the assignment. Does changing bif doorbell range to 4 conflict with windows host driver?
> 
> People might wonder why programming it to 2 also worked before. The reason is, currently amdgpu only use one sdma ring per sdma engine. So it never used the "HI_PRI" ring and doorbell. Kfd uses two sdma rings per sdma engine, but for the second ring, it uses a doorbell with the same in page offset (0xf0) but mapped to the second doorbell page of the process.
> 
> So my understanding is, setting the doorbell range to 4 (see patch 2 of this series) is more consistent and no harm for current usage model. If we use it in the future, it should be fine. But let's see what is the windows host driver setting.
> 
> Regards,
> Oak
> 
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of 
> Yang, Philip
> Sent: Tuesday, December 18, 2018 9:57 AM
> To: Zeng, Oak <Oak.Zeng@amd.com>; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 1/2] drm/amdgpu: Add per device 
> sdma_doorbell_range field
> 
> 
> 
> On 2018-12-17 9:12 p.m., Zeng, Oak wrote:
>> Different ASIC has different sdma doorbell range. Add a per device 
>> sdma_doorbell_range field and initialize it.
>>
>> Change-Id: Idd980db1a72cfb373e24ac23ba3e48bb329ed4ad
>> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
>> ---
>>    drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 2 ++
>>    drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 1 +
>>    drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 1 +
>>    3 files changed, 4 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> index 35a0c05..1cfec06 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> @@ -72,6 +72,8 @@ struct amdgpu_doorbell_index {
>>    		} uvd_vce;
>>    	};
>>    	uint32_t max_assignment;
>> +	/* Per engine SDMA doorbell size in dword */
>> +	uint32_t sdma_doorbell_range;
>>    };
>>    
>>    typedef enum _AMDGPU_DOORBELL_ASSIGNMENT diff --git 
>> a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
>> b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
>> index b75d17b..4b5d60e 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
>> @@ -83,5 +83,6 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
>>    	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
>>    	/* In unit of dword doorbell */
>>    	adev->doorbell_index.max_assignment = 
>> AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1;
>> +	adev->doorbell_index.sdma_doorbell_range = 4;
> Vega10 doorbell range was 2 dwords (one 64bit doorbell), change to 4 
> dwords may not work under SRIOV
>>    }
>>    
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
>> b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
>> index 63c542c..53716c5 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
>> @@ -86,5 +86,6 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
>>    	adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5;
>>    	adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7;
>>    	adev->doorbell_index.max_assignment = 
>> AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1;
>> +	adev->doorbell_index.sdma_doorbell_range = 20;
>>    }
>>    
>>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> 
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/2] drm/amdgpu: Fix sdma doorbell range setting

[Yang, Philip]

The series is Reviewed-by: Philip Yang <Philip.Yang@amd.com>

On 2018-12-17 9:12 p.m., Zeng, Oak wrote:
> Different ASIC has different SDMA queues so different
> SDMA doorbell range. Introduce an extra parameter
> to sdma_doorbell_range function and set sdma doorbell
> range correctly.
> 
> Change-Id: I9b8d75b04f5a47ef1c6fd7cc1caaefd98dd2ff2b
> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h    | 2 +-
>   drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 4 ++--
>   drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 4 ++--
>   drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 4 ++--
>   drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 ++-
>   5 files changed, 9 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index bcef6ea..5a7907b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -634,7 +634,7 @@ struct amdgpu_nbio_funcs {
>   	void (*hdp_flush)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
>   	u32 (*get_memsize)(struct amdgpu_device *adev);
>   	void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance,
> -				    bool use_doorbell, int doorbell_index);
> +			bool use_doorbell, int doorbell_index, int doorbell_size);
>   	void (*enable_doorbell_aperture)(struct amdgpu_device *adev,
>   					 bool enable);
>   	void (*enable_doorbell_selfring_aperture)(struct amdgpu_device *adev,
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
> index 6f9c549..1eeb318 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
> @@ -71,7 +71,7 @@ static u32 nbio_v6_1_get_memsize(struct amdgpu_device *adev)
>   }
>   
>   static void nbio_v6_1_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
> -				  bool use_doorbell, int doorbell_index)
> +			bool use_doorbell, int doorbell_index, int doorbell_size)
>   {
>   	u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
>   			SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
> @@ -80,7 +80,7 @@ static void nbio_v6_1_sdma_doorbell_range(struct amdgpu_device *adev, int instan
>   
>   	if (use_doorbell) {
>   		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
> -		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 2);
> +		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
>   	} else
>   		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
> index df34dc7..d80413d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
> @@ -69,7 +69,7 @@ static u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev)
>   }
>   
>   static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
> -					  bool use_doorbell, int doorbell_index)
> +			bool use_doorbell, int doorbell_index, int doorbell_size)
>   {
>   	u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
>   			SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
> @@ -78,7 +78,7 @@ static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instan
>   
>   	if (use_doorbell) {
>   		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
> -		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 2);
> +		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
>   	} else
>   		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
> index f8cee95..27976b3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
> @@ -67,7 +67,7 @@ static u32 nbio_v7_4_get_memsize(struct amdgpu_device *adev)
>   }
>   
>   static void nbio_v7_4_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
> -					  bool use_doorbell, int doorbell_index)
> +			bool use_doorbell, int doorbell_index, int doorbell_size)
>   {
>   	u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
>   			SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
> @@ -76,7 +76,7 @@ static void nbio_v7_4_sdma_doorbell_range(struct amdgpu_device *adev, int instan
>   
>   	if (use_doorbell) {
>   		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
> -		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 2);
> +		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
>   	} else
>   		doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 42b419d..96b160d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -834,7 +834,8 @@ static void sdma_v4_0_gfx_resume(struct amdgpu_device *adev, unsigned int i)
>   	WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL, doorbell);
>   	WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL_OFFSET, doorbell_offset);
>   	adev->nbio_funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,
> -					      ring->doorbell_index);
> +					      ring->doorbell_index,
> +					      adev->doorbell_index.sdma_doorbell_range);
>   
>   	sdma_v4_0_ring_set_wptr(ring);
>   
> 
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx