* MPC834x global timers question
@ 2007-02-24 1:20 Bruce_Leonard
2007-02-24 2:16 ` Bruce_Leonard
2007-02-24 3:13 ` MPC834x global timers question Ben Warren
0 siblings, 2 replies; 7+ messages in thread
From: Bruce_Leonard @ 2007-02-24 1:20 UTC (permalink / raw)
To: linuxppc-embedded
I know this isn't the right forum for this but I can't seem to find a
generic PPC mailing list.
I'm trying to get a global timer going on an MPC834x, and the way I learn
is to just play with HW, so I've got an Abatron BDI2K hooked up to my
processor so I can just manipulate registers without having to deal with
writing code. However, I seem to be unable to modify certain registers in
the global timers with this set up and I don't understand why.
Specifically, if a register has a bit that's a '1' following a reset, I
can't change that bit to a '0'. This is happening with the Global Timers
Reference Registers (GTRFR1 - 4) and the Global Timers Prescale Registers
(GTPSR1 - 4). The reset state of the GTRFRs is 0xFFFF and I can't change
it to any other value. The reset state of the GTPSRs is 0x3 and I can't
clear the 2 LSB. I can change any other bits in the prescale registers,
but not the two which are a '1' at reset.
Has anyone else seen this behavior?
Bruce
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: MPC834x global timers question
2007-02-24 1:20 MPC834x global timers question Bruce_Leonard
@ 2007-02-24 2:16 ` Bruce_Leonard
2007-02-24 21:17 ` using gdb/kgdb Charles Krinke
2007-02-24 3:13 ` MPC834x global timers question Ben Warren
1 sibling, 1 reply; 7+ messages in thread
From: Bruce_Leonard @ 2007-02-24 2:16 UTC (permalink / raw)
To: Bruce_Leonard
Cc: linuxppc-embedded-bounces+brucle=selinc.com, linuxppc-embedded
Never mind, I answered my own question. Sorry for the noise.
Bruce
linuxppc-embedded-bounces+brucle=selinc.com@ozlabs.org wrote on 02/23/2007
05:20:14 PM:
> I know this isn't the right forum for this but I can't seem to find a
> generic PPC mailing list.
>
> I'm trying to get a global timer going on an MPC834x, and the way I
learn
> is to just play with HW, so I've got an Abatron BDI2K hooked up to my
> processor so I can just manipulate registers without having to deal with
> writing code. However, I seem to be unable to modify certain registers
in
> the global timers with this set up and I don't understand why.
> Specifically, if a register has a bit that's a '1' following a reset, I
> can't change that bit to a '0'. This is happening with the Global
Timers
> Reference Registers (GTRFR1 - 4) and the Global Timers Prescale
Registers
> (GTPSR1 - 4). The reset state of the GTRFRs is 0xFFFF and I can't
change
> it to any other value. The reset state of the GTPSRs is 0x3 and I can't
> clear the 2 LSB. I can change any other bits in the prescale registers,
> but not the two which are a '1' at reset.
>
> Has anyone else seen this behavior?
>
> Bruce
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: MPC834x global timers question
2007-02-24 1:20 MPC834x global timers question Bruce_Leonard
2007-02-24 2:16 ` Bruce_Leonard
@ 2007-02-24 3:13 ` Ben Warren
1 sibling, 0 replies; 7+ messages in thread
From: Ben Warren @ 2007-02-24 3:13 UTC (permalink / raw)
To: Bruce_Leonard, linuxppc-embedded
Bruce,
--- Bruce_Leonard@selinc.com wrote:
> I know this isn't the right forum for this but I
> can't seem to find a
> generic PPC mailing list.
>
> I'm trying to get a global timer going on an
> MPC834x, and the way I learn
> is to just play with HW, so I've got an Abatron
> BDI2K hooked up to my
> processor so I can just manipulate registers without
> having to deal with
> writing code. However, I seem to be unable to
> modify certain registers in
> the global timers with this set up and I don't
> understand why.
> Specifically, if a register has a bit that's a '1'
> following a reset, I
> can't change that bit to a '0'. This is happening
> with the Global Timers
> Reference Registers (GTRFR1 - 4) and the Global
> Timers Prescale Registers
> (GTPSR1 - 4). The reset state of the GTRFRs is
> 0xFFFF and I can't change
> it to any other value. The reset state of the
> GTPSRs is 0x3 and I can't
> clear the 2 LSB. I can change any other bits in the
> prescale registers,
> but not the two which are a '1' at reset.
There's a sequence that needs to be followed. You
need to enable the timer first, then set the mode,
then set the prescaler. I've attached some expect
code for U-boot that generates a 1Hz output from timer
3 on an MCP8349. It's not quite what you have, but
hopefully close enough for you to figure it out. I
also have a simple char driver for Linux if you need
it later on.
COMMENT "Set SICLR so that GPIO1_8 becomes TOUT3"
send "mm.w e0000114\r"
expect $mmPrompt
send "8001\r"
expect $mmPrompt
send "q\r"
expect $mainPrompt
COMMENT "Enable timer 3"
send "mm.b e0000504\r"
expect $mmPrompt
send "01\r"
expect $mmPrompt
send "q\r"
expect $mainPrompt
COMMENT "Set mode register"
send "mm.w e0000520\r"
expect $mmPrompt
send "ff0c\r"
expect $mmPrompt
send "q\r"
COMMENT "Set frequency to 1Hz"
send "mm.w e0000524\r"
expect $mmPrompt
send "1f77\r"
expect $mmPrompt
send "q\r"
expect $mainPrompt
Hope this helps
regards,
Ben
^ permalink raw reply [flat|nested] 7+ messages in thread
* using gdb/kgdb
2007-02-24 2:16 ` Bruce_Leonard
@ 2007-02-24 21:17 ` Charles Krinke
2007-02-24 22:19 ` CPM FCC1 & FCC2 Charles Krinke
2007-02-26 9:51 ` using gdb/kgdb Jenkins, Clive
0 siblings, 2 replies; 7+ messages in thread
From: Charles Krinke @ 2007-02-24 21:17 UTC (permalink / raw)
To: linuxppc-embedded
I am having a little trouble with kgdb in an 8541 kernel.=20
The kernel is compiled with CONFIG_DEBUG_KERNEL, CONFIG_KGDB, =
CONFIG_KGDB_TTYS1 all defined and I can boot it to the point where it is =
waiting for a gdb connection and it does make a connection. I have =
kernel command line that contains "kgdb=3DttyS1,115200,halt kgdbwait" in =
it and this appears to be working fine and the output looks like this.
MMU:enterJCSSU'=EB=81init
MMU:mapin
MMU:setio
MMU:exit
begin start_kernel
setup_arch: enter
setup_arch: kgdb breakpoint
At this point, from the cross-compiled gdb on a host, if I invoke gdb =
with vmlinux as an argument, the PC is zero.
$ ppc-gdb vmlinux
(gdb)set remotebaud 115200
(gdb)target remote /dev/ttyUSB0
(gdb)0x00000000 in ?? ()
If I invoke the cross-compiled gdb without vmlinux as an argument, I get =
a better looking pc, like this
$ ppc-gdb=20
(gdb)set remotebaud 115200
(gdb)target remote /dev/ttyUSB0
(gdb)0xc00071f4 in ?? ()
But in neither case can I 'step' or 'next' as gdb merely replies
Cannot find bounds of current function.
Can someone offer a spot of advice to this despicable condition?
Charles
p.s. I apologize if this comes out html as I am using the companies =
webmail interface from home.
=20
=20
^ permalink raw reply [flat|nested] 7+ messages in thread
* CPM FCC1 & FCC2
2007-02-24 21:17 ` using gdb/kgdb Charles Krinke
@ 2007-02-24 22:19 ` Charles Krinke
2007-02-26 12:45 ` Pantelis Antoniou
2007-02-26 9:51 ` using gdb/kgdb Jenkins, Clive
1 sibling, 1 reply; 7+ messages in thread
From: Charles Krinke @ 2007-02-24 22:19 UTC (permalink / raw)
To: linuxppc-embedded
In our design for an 8541 board, we are going to be using FCC1 & FCC2 in =
addition to the FAST controller.
=20
I have been looking through the Linux-2.6.17.11 source we are using and =
although I can find some references to MPC85xx_CPM_FCC1, I cannot quite =
identify the driver used with the 85xx in Linux.
=20
Can someone help me determine the name of the appropriate driver for the =
two FCC sections of the 8541 please?
=20
Charles
=20
=20
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: using gdb/kgdb
2007-02-24 21:17 ` using gdb/kgdb Charles Krinke
2007-02-24 22:19 ` CPM FCC1 & FCC2 Charles Krinke
@ 2007-02-26 9:51 ` Jenkins, Clive
1 sibling, 0 replies; 7+ messages in thread
From: Jenkins, Clive @ 2007-02-26 9:51 UTC (permalink / raw)
To: Charles Krinke, linuxppc-embedded
Hi Charles
> The kernel is compiled with CONFIG_DEBUG_KERNEL, CONFIG_KGDB,
> CONFIG_KGDB_TTYS1 all defined and I can boot it to the point
> where it is waiting for a gdb connection and it does make a
> connection. I have kernel command line that contains
> "kgdb=3DttyS1,115200,halt kgdbwait" in it and this appears to
> be working fine and the output looks like this.
>=20
> MMU:enterJCSSU'=EB=81init
> MMU:mapin
> MMU:setio
> MMU:exit
> begin start_kernel
> setup_arch: enter
> setup_arch: kgdb breakpoint
>=20
> At this point, from the cross-compiled gdb on a host, if I
> invoke gdb with vmlinux as an argument, the PC is zero.
>=20
> $ ppc-gdb vmlinux
>=20
> (gdb)set remotebaud 115200
>=20
At this point, try setting the architecture as below (you can
show the current architecture first, to check that it is
wrongly set to "e500", which doesn't work properly)
(gdb) show architecture
The target architecture is set automatically (currently powerpc:e500)
(gdb) set architecture powerpc:common
The target architecture is assumed to be powerpc:common
> (gdb)target remote /dev/ttyUSB0
> ...
More explanation can be found here:
http://www.ultsol.com/faq_p311.htm
[I would prefer to reference an explanation on this
mailing list, but I did not find one.]
I hope this solves your problem.
Clive
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: CPM FCC1 & FCC2
2007-02-24 22:19 ` CPM FCC1 & FCC2 Charles Krinke
@ 2007-02-26 12:45 ` Pantelis Antoniou
0 siblings, 0 replies; 7+ messages in thread
From: Pantelis Antoniou @ 2007-02-26 12:45 UTC (permalink / raw)
To: Charles Krinke; +Cc: linuxppc-embedded
On 25 =CE=A6=CE=B5=CE=B2 2007, at 12:19 =CE=A0=CE=9C, Charles Krinke =
wrote:
> In our design for an 8541 board, we are going to be using FCC1 & =20
> FCC2 in addition to the FAST controller.
>
> I have been looking through the Linux-2.6.17.11 source we are using =20=
> and although I can find some references to MPC85xx_CPM_FCC1, I =20
> cannot quite identify the driver used with the 85xx in Linux.
>
> Can someone help me determine the name of the appropriate driver =20
> for the two FCC sections of the 8541 please?
>
> Charles
>
>
Hi Charles,
There's FCC support in the fs_enet driver, but I'm afraid it's not being
ported to the 85xx yet I'm afraid. The only supported family for the =20
fcc's is 82xx.
It shouldn't be very hard to add this, and I'd be glad to help with =20
some pointers.
Regards
-- Pantelis
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2007-02-26 12:52 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2007-02-24 1:20 MPC834x global timers question Bruce_Leonard
2007-02-24 2:16 ` Bruce_Leonard
2007-02-24 21:17 ` using gdb/kgdb Charles Krinke
2007-02-24 22:19 ` CPM FCC1 & FCC2 Charles Krinke
2007-02-26 12:45 ` Pantelis Antoniou
2007-02-26 9:51 ` using gdb/kgdb Jenkins, Clive
2007-02-24 3:13 ` MPC834x global timers question Ben Warren
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