RE: [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt

[Biju Das <biju.das.jz@bp.renesas.com>]

Hi Prabhakar,

> Subject: Re: [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain
> to handle GPIO interrupt
> 
> Hi Biju,
> 
> Thank you for the review.
> 
> On Thu, May 12, 2022 at 6:35 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> >
> > Hi Prabhakar,
> >
> > Thanks for the patch.
> >
> > > Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > Subject: [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ
> > > domain to handle GPIO interrupt
> > >
> > > Add IRQ domian to RZ/G2L pinctrl driver to handle GPIO interrupt.
> > >
> > > GPIO0-GPIO122 pins can be used as IRQ lines but only 32 pins can be
> > > used as IRQ lines at given time. Selection of pins as IRQ lines is
> > > handled by IA55 (which is the IRQC block) which sits in between the
> GPIO and GIC.
> >
> > Do we need to update bindings with interrupt-cells on [1] like [2] as it
> act as parent for GPIO interrupts?
> >
> Yes interrupt-controller and interrupt-parent needs to be added. I'm
> wondering if "interrupt-cells" is not required. If the pin is an interrupt
> it will be passed as an GPIO.

It is same as external interrupt case right?

For eg:- Ethernet PHY case,

     interrupt-parent = <&irqc>;
     interrupts = <3 IRQ_TYPE_LEVEL_LOW>;

if you use GPIO, it will be like this right?

     interrupt-parent = <&pinctrl>;
     interrupts = <RZG2L_GPIO(43, 0) IRQ_TYPE_LEVEL_LOW>;

Cheers,
Biju






> 
> @Geert - your thoughts ?
> 
> Cheers,
> Prabhakar